S3C24XX: Add support for HSSPI on S3C2416/S3C2443
Subsystems (4)
cover S3C24XX: Add support for HSSPI on S3C2416/S3C2443
The S3C2416/S3C2443/S3C2450 SoCs contain HSSPI controllers compatible with the ones in the S3C64xx and later.
The second patch modifying the dma selection depends on the series enabling the dma support on the S3C2416, but as the whole s3c64xx-spi driver needs dma support this should be ok.
Tested on an Asus DR-900 ebook reader with a Marvell MR8686 using the libertas driver.
This is a repost of the series adapted to changes resulting from the other cleanup series.
Heiko Stuebner (6):
ARM: S3C24XX: Add forgotten clock lookup table to S3C2443
ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443
ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devices
ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spi
ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driver spi/s3c64xx: Allow usage for ARCH_S3C24XX
arch/arm/mach-s3c24xx/Kconfig | 5 ++++ arch/arm/mach-s3c24xx/Makefile | 1 + arch/arm/mach-s3c24xx/clock-s3c2416.c | 1 + arch/arm/mach-s3c24xx/clock-s3c2443.c | 6 ++++ arch/arm/mach-s3c24xx/common-s3c2443.c | 15 +++++++---- arch/arm/mach-s3c24xx/dma-s3c2443.c | 16 +++++++++--- arch/arm/mach-s3c24xx/include/mach/dma.h | 4 +++ arch/arm/mach-s3c24xx/include/mach/map.h | 5 ++++ arch/arm/mach-s3c24xx/setup-spi.c | 39 ++++++++++++++++++++++++++++++ drivers/spi/Kconfig | 2 +- 10 files changed, 84 insertions(+), 10 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/setup-spi.c
Signature · 1 line
1.7.2.3
PATCH 1/6 ARM: S3C24XX: Add forgotten clock lookup table to S3C2443
When the hsmmc clock lookup was changed to be lookup tables based, it seems the S3C2443 was forgotten.
As subsequent patches will want to add more lookups to it, this patch adds the base table with the missing hsmmc lookup.
--- arch/arm/mach-s3c24xx/clock-s3c2443.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
arch/arm/mach-s3c24xx/clock-s3c2443.c +5 -0
@@ -179,6 +179,10 @@ static struct clk *clks[] __initdata = { &clk_hsmmc, }; +static struct clk_lookup s3c2443_clk_lookup[] = { +CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.2" , &clk_hsmmc), +}; +void __init s3c2443_init_clocks (int xtal) {unsigned long epllcon =__raw_readl (S3C2443_EPLLCON );
@@ -210,6 +214,7 @@ void __init s3c2443_init_clocks(int xtal)s3c_register_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off));s3c_disable_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off)); +clkdev_add_table (s3c2443_clk_lookup,ARRAY_SIZE (s3c2443_clk_lookup));s3c_pwmclk_init (); }
Signature · 1 line
1.7.2.3
PATCH 1/6 ARM: S3C24XX: Add forgotten clock lookup table to S3C2443
Quoted 27 lines · Heiko St?bner
When the hsmmc clock lookup was changed to be lookup tables based, it seems the S3C2443 was forgotten.
As subsequent patches will want to add more lookups to it, this patch adds the base table with the missing hsmmc lookup.
Signed-off-by Heiko Stuebner<[email protected]>--- arch/arm/mach-s3c24xx/clock-s3c2443.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)arch/arm/mach-s3c24xx/clock-s3c2443.c +4
-0@@ -179,6 +179,10 @@ static struct clk *clks[] __initdata = { &clk_hsmmc, }; +static struct clk_lookup s3c2443_clk_lookup[] = { +CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.2" ,&clk_hsmmc), +}; +void __init s3c2443_init_clocks (int xtal) {unsigned long epllcon =__raw_readl (S3C2443_EPLLCON );
arch/arm/mach-s3c24xx/clock-s3c2443.c void __init s3c2443_init_clocks(int xtal) · line 220
Quoted 7 lines
arch/arm/mach-s3c24xx/clock-s3c2443.c +1
-0@@ -210,6 +214,7 @@ void __init s3c2443_init_clocks(int xtal)s3c_register_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off));s3c_disable_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off)); +clkdev_add_table (s3c2443_clk_lookup,ARRAY_SIZE (s3c2443_clk_lookup));s3c_pwmclk_init (); }
Uhm..how about mach-s3c24xx/common-s3c2443.c?
I think, we need to sort out some files in mach-s3c24xx/ and some remained mach-s3c24.. directories, actually, as you know, we didn't have much time to do it last time :)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.
PATCH 1/6 ARM: S3C24XX: Add forgotten clock lookup table to S3C2443
Am Montag 02 April 2012, 23:08:10 schrieb Kukjin Kim:
Quoted 38 lines
Quoted 37 lines · Heiko St?bner
When the hsmmc clock lookup was changed to be lookup tables based, it seems the S3C2443 was forgotten.
As subsequent patches will want to add more lookups to it, this patch adds the base table with the missing hsmmc lookup.
Signed-off-by Heiko Stuebner<[email protected]>---
arch/arm/mach-s3c24xx/clock-s3c2443.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)(quoted diff) +0
-0
b/arch/arm/mach-s3c24xx/clock-s3c2443.cindex efb3ac3..bce1cd3 100644arch/arm/mach-s3c24xx/clock-s3c2443.c +4
-0@@ -179,6 +179,10 @@ static struct clk *clks[] __initdata = { &clk_hsmmc, }; +static struct clk_lookup s3c2443_clk_lookup[] = { +CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.2" ,&clk_hsmmc), +}; +void __init s3c2443_init_clocks(int xtal) { unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);arch/arm/mach-s3c24xx/clock-s3c2443.c +0
-0@@ -210,6 +214,7 @@ void __init s3c2443_init_clocks(int xtal)s3c_register_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off));s3c_disable_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off));
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arch/arm/mach-s3c24xx/clock-s3c2443.c +1
-0+clkdev_add_table (s3c2443_clk_lookup,ARRAY_SIZE (s3c2443_clk_lookup));s3c_pwmclk_init ();}Uhm..how about
mach-s3c24xx/common-s3c2443.c?
Nope. This clock is really specific to only the s3c2443. There is only one hsmmc clock that is identical on both the s3c2443 and s3c2416/2450 and this one already is in common-s3c2443.c .
common-s3c2443.c was meant for stuff common to s3c2443 _and newer_, i.e. common clocks and so on.
Quoted 3 lines
I think, we need to sort out some files in mach-s3c24xx/ and some remained mach-s3c24.. directories, actually, as you know, we didn't have much time to do it last time :)
yeah, we did cut it quite close :-), but it also doesn't seem to have produced much fall-out. I moved my s3c2416 based development code to 3.4-rc1 without major hickups.
Getting rid of the remaining mach-directories and also the plat-s3c24xx would be good. But I'm not sure what you would want to change in mach-s3c24xx directory itself.
I don't know the earlier SoCs, but the s3c2443 and s3c2416/2450 SoCs currently don't have redundancies and in the current layout it's quite easy to understand what belongs to which SoC.
Heiko
PATCH 1/6 ARM: S3C24XX: Add forgotten clock lookup table to S3C2443
Quoted 43 lines · Heiko St?bner
Am Montag 02 April 2012, 23:08:10 schrieb Kukjin Kim:
Quoted 42 lines
Quoted 41 lines · Heiko St?bner
When the hsmmc clock lookup was changed to be lookup tables based, it seems the S3C2443 was forgotten.
As subsequent patches will want to add more lookups to it, this patch adds the base table with the missing hsmmc lookup.
Signed-off-by Heiko Stuebner<[email protected]>---
arch/arm/mach-s3c24xx/clock-s3c2443.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)(quoted diff) +0
-0
b/arch/arm/mach-s3c24xx/clock-s3c2443.cindex efb3ac3..bce1cd3 100644arch/arm/mach-s3c24xx/clock-s3c2443.c +4
-0@@ -179,6 +179,10 @@ static struct clk *clks[] __initdata = { &clk_hsmmc, }; +static struct clk_lookup s3c2443_clk_lookup[] = { +CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.2" ,&clk_hsmmc), +}; +void __init s3c2443_init_clocks(int xtal) { unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);arch/arm/mach-s3c24xx/clock-s3c2443.c +1
-0@@ -210,6 +214,7 @@ void __init s3c2443_init_clocks(int xtal)s3c_register_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off));s3c_disable_clocks (init_clocks_off,ARRAY_SIZE (init_clocks_off)); +clkdev_add_table (s3c2443_clk_lookup,ARRAY_SIZE (s3c2443_clk_lookup));s3c_pwmclk_init ();
Quoted 8 lines
Quoted 3 lines
Quoted 1 line
}Uhm..how about
mach-s3c24xx/common-s3c2443.c?Nope. This clock is really specific to only the s3c2443. There is only one hsmmc clock that is identical on both the s3c2443 and s3c2416/2450 and this one already is in
common-s3c2443.c.
OK, you're right, I forgot s3c2443_common_init_clocks() is for s3c2416 and s3c2443 :-)
Quoted 11 lines
common-s3c2443.cwas meant for stuff common to s3c2443_andnewer_, i.e. common clocks and so on.Quoted 3 lines
I think, we need to sort out some files in mach-s3c24xx/ and some remained mach-s3c24.. directories, actually, as you know, we didn't have much time to do it last time :)
yeah, we did cut it quite close :-), but it also doesn't seem to have produced much fall-out. I moved my s3c2416 based development code to 3.4-rc1 without major hickups.
Quoted 8 lines
Getting rid of the remaining mach-directories and also the plat-s3c24xx would be good. But I'm not sure what you would want to change in mach-s3c24xx directory itself.
I don't know the earlier SoCs, but the s3c2443 and s3c2416/2450 SoCs currently don't have redundancies and in the current layout it's quite easy to understand what belongs to which SoC.
Hmm...I'm sorting that out and if any updates, let you know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.
PATCH 2/6 ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443
In reply to Heiko StübnerSoCs starting with the S3C2443 contain SPI controllers compatible with the spi-s3c64xx driver and therefore need separate dma channels for rx and tx.
This patch introduces dma channel declarations for these and changes the dma-s3c2443.c accordingly.
None of the older SoCs use the spi-dma at all. Most boards bitbang their spi use and the spi-s3c24xx driver also does not use the dma system.
--- arch/arm/mach-s3c24xx/dma-s3c2443.c | 16 ++++++++++++---- arch/arm/mach-s3c24xx/include/mach/dma.h | 4 ++++ 2 files changed, 16 insertions(+), 4 deletions(-)
arch/arm/mach-s3c24xx/dma-s3c2443.c +12 -4
@@ -55,12 +55,20 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { .name = "sdi", .channels = MAP(S3C2443_DMAREQSEL_SDI), }, - [DMACH_SPI0] = { - .name = "spi0", + [DMACH_SPI0_RX] = { + .name = "spi0-rx", + .channels = MAP(S3C2443_DMAREQSEL_SPI0RX), + }, + [DMACH_SPI0_TX] = { + .name = "spi0-tx", .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), }, - [DMACH_SPI1] = { /* only on S3C2443/S3C2450 */ - .name = "spi1", + [DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */ + .name = "spi1-rx", + .channels = MAP(S3C2443_DMAREQSEL_SPI1RX), + }, + [DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */ + .name = "spi1-tx", .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), }, [DMACH_UART0] = {
arch/arm/mach-s3c24xx/include/mach/dma.h +4 -0
@@ -47,6 +47,10 @@ enum dma_ch {DMACH_UART2_SRC2 ,DMACH_UART3 ,/* s3c2443 has extra uart */ DMACH_UART3_SRC2 , +DMACH_SPI0_TX ,/* s3c2443/2416/2450 hsspi0 */ +DMACH_SPI0_RX ,/* s3c2443/2416/2450 hsspi0 */ +DMACH_SPI1_TX ,/* s3c2443/2450 hsspi1 */ +DMACH_SPI1_RX ,/* s3c2443/2450 hsspi1 */ DMACH_MAX, /* the end entry */ };
Signature · 1 line
1.7.2.3
PATCH 3/6 ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devices
In reply to Heiko StübnerThe S3C_PA_SPIx constants are only used by the s3c64xx-spi driver and don't conflict with the older SoCs as they don't support hsspi.
--- arch/arm/mach-s3c24xx/include/mach/map.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
arch/arm/mach-s3c24xx/include/mach/map.h +5 -0
@@ -98,6 +98,8 @@/* SPI */ #define S3C2410_PA_SPI (0x59000000) +#define S3C2443_PA_SPI0 (0x52000000) +#define S3C2443_PA_SPI1 S3C2410_PA_SPI/* SDI */ #define S3C2410_PA_SDI (0x5A000000)
@@ -162,4 +164,7 @@#define S3C_PA_WDT S3C2410_PA_WATCHDOG#define S3C_PA_NAND S3C24XX_PA_NAND +#define S3C_PA_SPI0 S3C2443_PA_SPI0 +#define S3C_PA_SPI1 S3C2443_PA_SPI1 +#endif /* __ASM_ARCH_MAP_H */
Signature · 1 line
1.7.2.3
PATCH 4/6 ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spi
In reply to Heiko StübnerCurrently usable are busclk0 and busclk2.
--- arch/arm/mach-s3c24xx/clock-s3c2416.c | 1 + arch/arm/mach-s3c24xx/clock-s3c2443.c | 1 + arch/arm/mach-s3c24xx/common-s3c2443.c | 15 ++++++++++----- 3 files changed, 12 insertions(+), 5 deletions(-)
arch/arm/mach-s3c24xx/clock-s3c2416.c +1 -0
@@ -144,6 +144,7 @@ static struct clk_lookup s3c2416_clk_lookup[] = {CLKDEV_INIT ("s3c-sdhci.0" ,"mmc_busclk.0" , &hsmmc0_clk),CLKDEV_INIT ("s3c-sdhci.0" ,"mmc_busclk.2" , &hsmmc_mux0.clk),CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.2" , &hsmmc_mux1.clk), + CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &hsspi_mux.clk), };void __init s3c2416_init_clocks (int xtal)
arch/arm/mach-s3c24xx/clock-s3c2443.c +1 -0
@@ -181,6 +181,7 @@ static struct clk *clks[] __initdata = {static struct clk_lookup s3c2443_clk_lookup[] = {CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.2" , &clk_hsmmc), +CLKDEV_INIT ("s3c64xx-spi.0" ,"spi_busclk2" , &clk_hsspi.clk), };void __init s3c2443_init_clocks (int xtal)
arch/arm/mach-s3c24xx/common-s3c2443.c +10 -5
@@ -424,11 +424,6 @@ static struct clk init_clocks_off[] = { .enable = s3c2443_clkcon_enable_p, .ctrlbit = S3C2443_PCLKCON_IIS, }, { - .name = "hsspi", - .parent = &clk_p, - .enable = s3c2443_clkcon_enable_p, - .ctrlbit = S3C2443_PCLKCON_HSSPI, - }, { .name = "adc", .parent = &clk_p, .enable = s3c2443_clkcon_enable_p,
@@ -562,6 +557,14 @@ static struct clk hsmmc1_clk = { .ctrlbit = S3C2443_HCLKCON_HSMMC, }; +static struct clk hsspi_clk = { + .name ="spi" , + .devname ="s3c64xx-spi.0" , + .parent = &clk_p, + .enable = s3c2443_clkcon_enable_p, + .ctrlbit =S3C2443_PCLKCON_HSSPI , +}; +/* EPLLCON compatible enough to get on/off information */ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)
@@ -612,6 +615,7 @@ static struct clk *clks[] __initdata = { &clk_usb_bus, &clk_armdiv, &hsmmc1_clk, + &hsspi_clk, }; static struct clksrc_clk *clksrcs[] __initdata = {
@@ -629,6 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = {CLKDEV_INIT (NULL ,"clk_uart_baud2" , &clk_p),CLKDEV_INIT (NULL ,"clk_uart_baud3" , &clk_esys_uart.clk),CLKDEV_INIT ("s3c-sdhci.1" ,"mmc_busclk.0" , &hsmmc1_clk), + CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &hsspi_clk), }; void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
Signature · 1 line
1.7.2.3
PATCH v2 5/6 ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driver
In reply to Heiko StübnerThis lets the s3c64xx-spi driver know the specifics of the controller- variant and also setups the gpios and the misccr bit.
This setup is valid for all S3C24XX SoCs containing a HSSPI controller (i.e. S3C2416/2450 and S3C2443)
---
changes since v1: adapt to changes in Makefile
arch/arm/mach-s3c24xx/Kconfig | 5 ++++ arch/arm/mach-s3c24xx/Makefile | 1 + arch/arm/mach-s3c24xx/setup-spi.c | 39 +++++++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/setup-spi.c
arch/arm/mach-s3c24xx/Kconfig +5 -0
@@ -518,6 +518,11 @@ config S3C2443_DMA help Internal config node for S3C2443 DMA support +config S3C2443_SETUP_SPI + bool + help + Common setup code for SPI GPIO configurations + endif # CPU_S3C2443 || CPU_S3C2416 if CPU_S3C2443
arch/arm/mach-s3c24xx/Makefile +1 -0
@@ -91,5 +91,6 @@ obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o # device setup obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o +obj-$(CONFIG_S3C2443_SETUP_SPI) += setup-spi.o obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c.o obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts.o
arch/arm/mach-s3c24xx/setup-spi.c new file +39 -0
@@ -0,0 +1,39 @@ +/* +* HS-SPI device setup for S3C2443/S3C2416 +* +* Copyright (C) 2011 Samsung Electronics Ltd. +* http://www.samsung.com/ +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/gpio.h> +#include <linux/platform_device.h> + +#include <plat/gpio-cfg.h> +#include <plat/s3c64xx-spi.h> + +#include <mach/hardware.h> +#include <mach/regs-gpio.h> + +#ifdef CONFIG_S3C64XX_DEV_SPI0 +struct s3c64xx_spi_info s3c64xx_spi0_pdata__initdata = { + .fifo_lvl_mask =0x7f , + .rx_lvl_offset =13 , + .tx_st_done =21 , + .high_speed =1 , +}; + +int s3c64xx_spi0_cfg_gpio (struct platform_device *pdev) +{ +/* enable hsspi bit in misccr */ +s3c2410_modify_misccr (S3C2416_MISCCR_HSSPI_EN2 ,1 ); + +s3c_gpio_cfgall_range (S3C2410_GPE (11 ),3 , +S3C_GPIO_SFN (2 ),S3C_GPIO_PULL_UP ); + +return 0 ; +} +#endif
Signature · 1 line
1.7.2.3
PATCH 6/6 spi/s3c64xx: Allow usage for ARCH_S3C24XX
In reply to Heiko StübnerNewer SoCs from the S3C24XX line, namely S3C2416/2443/2450 contain hsspi-controllers compatible with the s3c64xx type.
The previous patches enabled platform support for it, so make the driver also usable for the S3C24xx architecture.
--- drivers/spi/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/spi/Kconfig +1 -1
@@ -305,7 +305,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX series type SPI" - depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) + depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) select S3C64XX_DMA if ARCH_S3C64XX help SPI driver for Samsung S3C64XX and newer SoCs.
Signature · 1 line
1.7.2.3
cover S3C24XX: Add support for HSSPI on S3C2416/S3C2443
In reply to Heiko StübnerAm Montag 12 M?rz 2012, 19:59:32 schrieb Heiko St?bner:
Quoted 7 lines
The S3C2416/S3C2443/S3C2450 SoCs contain HSSPI controllers compatible with the ones in the S3C64xx and later.
The second patch modifying the dma selection depends on the series enabling the dma support on the S3C2416, but as the whole s3c64xx-spi driver needs dma support this should be ok.
Quoted 6 lines
Tested on an Asus DR-900 ebook reader with a Marvell MR8686 using the libertas driver.
This is a repost of the series adapted to changes resulting from the other cleanup series.
ping :-)
Thanks
Heiko
Quoted 22 lines
Heiko Stuebner (6):
ARM: S3C24XX: Add forgotten clock lookup table to S3C2443
ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443
ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devices
ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spi
ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driver spi/s3c64xx: Allow usage forARCH_S3C24XXarch/arm/mach-s3c24xx/Kconfig | 5 ++++ arch/arm/mach-s3c24xx/Makefile | 1 + arch/arm/mach-s3c24xx/clock-s3c2416.c | 1 + arch/arm/mach-s3c24xx/clock-s3c2443.c | 6 ++++ arch/arm/mach-s3c24xx/common-s3c2443.c | 15 +++++++---- arch/arm/mach-s3c24xx/dma-s3c2443.c | 16 +++++++++--- arch/arm/mach-s3c24xx/include/mach/dma.h | 4 +++ arch/arm/mach-s3c24xx/include/mach/map.h | 5 ++++ arch/arm/mach-s3c24xx/setup-spi.c | 39 ++++++++++++++++++++++++++++++ drivers/spi/Kconfig | 2 +- 10 files changed, 84 insertions(+), 10 deletions(-) create mode 100644 arch/arm/mach-s3c24xx/setup-spi.c
cover S3C24XX: Add support for HSSPI on S3C2416/S3C2443
Quoted 8 lines · Heiko St?bner
Am Montag 12 M?rz 2012, 19:59:32 schrieb Heiko St?bner:
Quoted 7 lines
The S3C2416/S3C2443/S3C2450 SoCs contain HSSPI controllers compatible with the ones in the S3C64xx and later.
The second patch modifying the dma selection depends on the series enabling the dma support on the S3C2416, but as the whole s3c64xx-spi driver needs dma support this should be ok.
Quoted 9 lines
Quoted 6 lines
Tested on an Asus DR-900 ebook reader with a Marvell MR8686 using the libertas driver.
This is a repost of the series adapted to changes resulting from the other cleanup series.
ping :-)
Thanks for your reminder ;)
Let me review it soon.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.
cover S3C24XX: Add support for HSSPI on S3C2416/S3C2443
Quoted 13 lines · Kukjin Kim
Quoted 12 lines · Heiko St?bner
Am Montag 12 M?rz 2012, 19:59:32 schrieb Heiko St?bner:
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The S3C2416/S3C2443/S3C2450 SoCs contain HSSPI controllers compatible with the ones in the S3C64xx and later.
The second patch modifying the dma selection depends on the series enabling the dma support on the S3C2416, but as the whole s3c64xx-spi driver needs dma support this should be ok.
Tested on an Asus DR-900 ebook reader with a Marvell MR8686 using the libertas driver.
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This is a repost of the series adapted to changes resulting from the other cleanup series.
ping :-)
Thanks for your reminder ;)
Let me review it soon.
Heiko, sorry for late.
Looks ok to me, will apply.
Thanks.
Best regards,
Kgene.
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Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.