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ARM: ux500: Enable Snowball for Device Tree

PATCH New Lee Jones 5 participants 35 messages Mar 14, 2012 – Mar 15, 2012

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Lee Jones

author
#0 lore raw

cover ARM: ux500: Enable Snowball for Device Tree

Hopefully the first of many, this patch-set starts the process of enabling Device Tree for ST-Ericsson's low-cost development platform, Snowball.

 arch/arm/boot/dts/db8500.dtsi      |  275 ++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/snowball.dts     |  139 ++++++++++++++++++
 arch/arm/configs/u8500_defconfig   |    1 +
 arch/arm/mach-ux500/Kconfig        |    6 +
 arch/arm/mach-ux500/Makefile.boot  |    1 +
 arch/arm/mach-ux500/board-mop500.c |   99 +++++++++++++-
 arch/arm/mach-ux500/cache-l2x0.c   |    7 +-
 arch/arm/mach-ux500/cpu.c          |   12 ++-
 arch/arm/mach-ux500/localtimer.c   |   18 +++-
 9 files changed, 553 insertions(+), 5 deletions(-)
author
#1 lore raw

PATCH 1/10 ARM: ux500: CONFIG: Enable Device Tree support for future endeavours

---
 arch/arm/configs/u8500_defconfig |    1 +
 arch/arm/mach-ux500/Kconfig      |    6 ++++++
 2 files changed, 7 insertions(+), 0 deletions(-)
arch/arm/configs/u8500_defconfig +1 -0
index 2d7b6e7..889d73a 100644
@@ -13,6 +13,7 @@ CONFIG_UX500_SOC_DB8500=y
 CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_U5500=y
+CONFIG_MACH_UX500_DT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SMP=y
arch/arm/mach-ux500/Kconfig +6 -0
index 5cfa539..afb3706 100644
@@ -50,6 +50,12 @@ config MACH_U5500
 	depends on UX500_SOC_DB5500
 	help
 	  Include support for the U5500 development platform.
+
+config MACH_UX500_DT
+	bool "Generic U8500 support using device tree"
+	depends on MACH_U8500
+	select USE_OF
+
 endmenu
 
 config UX500_DEBUG_UART
Signature · 1 line
1.7.5.4
author
#3 lore raw

PATCH 2/10 ARM: ux500: Initial Device Tree support for Snowball

In reply to Lee Jones

From: Arnd Bergmann <[email protected]>

This provides very basic Device Tree support for ST-Ericsson's low-cost development platform, Snowball. If Device Tree for ux500 is enabled and the correct board is configured within the Device Tree blob, the correct *_init_machine() will be called.

This patch is based on some original work completed by:
Niklas Hernaeus <[email protected]>

---
 arch/arm/boot/dts/snowball.dts     |   31 +++++++++++++++++++++++++++++++
 arch/arm/mach-ux500/Makefile.boot  |    1 +
 arch/arm/mach-ux500/board-mop500.c |   34 ++++++++++++++++++++++++++++++++++
 3 files changed, 66 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/snowball.dts
arch/arm/boot/dts/snowball.dts new file +31 -0
new file mode 100644
index 0000000..ebcff9a
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2011 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+/ {
+	model = "Calao Systems Snowball platform with device tree";
+	compatible = "calaosystems,snowball-a9500";
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	memory {
+		reg = <0x00000000 0x20000000>;
+	};
+
+	soc-u9500 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges;
+	};
+};
arch/arm/mach-ux500/Makefile.boot +1 -0
index ff0a4b5..dd5cd00 100644
@@ -2,3 +2,4 @@
 params_phys-y	:= 0x00000100
 initrd_phys-y	:= 0x00800000
 
+dtb-$(CONFIG_MACH_SNOWBALL) += snowball.dtb
arch/arm/mach-ux500/board-mop500.c +34 -0
index 04afcdf..0fb5dfd 100644
@@ -30,6 +30,9 @@
 #include <linux/gpio_keys.h>
 #include <linux/delay.h>
 
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
 #include <linux/leds.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -738,3 +741,34 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
 	.handle_irq	= gic_handle_irq,
 	.init_machine	= snowball_init_machine,
 MACHINE_END
+
+#ifdef CONFIG_MACH_UX500_DT
+static void __init u8500_init_machine(void)
+{
+	if (of_machine_is_compatible("calaosystems,snowball-a9500"))
+		return snowball_init_machine();
+	else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
+		return hrefv60_init_machine();
+	else if (of_machine_is_compatible("st-ericsson,mop500"))
+		return mop500_init_machine();
+}
+
+static const char * u8500_dt_board_compat[] = {
+	"calaosystems,snowball-a9500",
+	"st-ericsson,hrefv60+",
+	"st-ericsson,u8500",
+	"st-ericsson,mop500",
+	NULL,
+};
+
+
+DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
+	.map_io		= u8500_map_io,
+	.init_irq	= ux500_init_irq,
+	/* we re-use nomadik timer here */
+	.timer		= &ux500_timer,
+	.handle_irq	= gic_handle_irq,
+	.init_machine	= u8500_init_machine,
+	.dt_compat      = u8500_dt_board_compat,
+MACHINE_END
+#endif
Signature · 1 line
1.7.5.4
#4 lore raw

PATCH 2/10 ARM: ux500: Initial Device Tree support for Snowball

Quoted 8 lines · Lee Jones

From: Arnd Bergmann <[email protected]>

This provides very basic Device Tree support for ST-Ericsson's low-cost development platform, Snowball. If Device Tree for ux500 is enabled and the correct board is configured within the Device Tree blob, the correct *_init_machine() will be called.

Quoted 6 lines

This patch is based on some original work completed by:
Niklas Hernaeus <[email protected]>

As mentioned on IRC, the order of the S-o-B should be such that the person submitting a patch comes last, so this one should be

or maybe

The patch itself looks good to me, but that is not surprising, given that I wrote it ;-).

Arnd

author
#5 lore raw

PATCH 2/10 ARM: ux500: Initial Device Tree support for Snowball

Quoted 23 lines · Arnd Bergmann
Quoted 8 lines · Lee Jones

From: Arnd Bergmann <[email protected]>

This provides very basic Device Tree support for ST-Ericsson's low-cost development platform, Snowball. If Device Tree for ux500 is enabled and the correct board is configured within the Device Tree blob, the correct *_init_machine() will be called.

Quoted 6 lines

This patch is based on some original work completed by:
Niklas Hernaeus <[email protected]>

As mentioned on IRC, the order of the S-o-B should be such that the person submitting a patch comes last, so this one should be

Quoted 5 lines

or maybe

Sorry I missed that.

Just for my clarification, how important is that?

Is it re-spin a patch-set important?

Quoted 2 lines

The patch itself looks good to me, but that is not surprising, given that I wrote it ;-).

Signature · 5 lines
Lee Jones
Linaro ST-Ericsson Landing Team Lead
M: +44 77 88 633 515
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
#6 lore raw

PATCH 2/10 ARM: ux500: Initial Device Tree support for Snowball

Quoted 6 lines · Lee Jones

Sorry I missed that.

Just for my clarification, how important is that?

Is it re-spin a patch-set important?

No need to send the patches out by email for this, but please fix it up for the pull request.

Arnd

#7 lore raw

PATCH 2/10 ARM: ux500: Initial Device Tree support for Snowball

Quoted 9 lines · Arnd Bergmann
Quoted 6 lines · Lee Jones

Sorry I missed that.

Just for my clarification, how important is that?

Is it re-spin a patch-set important?

No need to send the patches out by email for this, but please fix it up for the pull request.

Add this:

Yours,
Linus Walleij

author
#8 lore raw

PATCH 3/10 ARM: ux500: combine the board init functions for DT boot

In reply to Lee Jones

From: Arnd Bergmann <[email protected]>

This lets us move over evertything to device tree one by one.

---
 arch/arm/mach-ux500/board-mop500.c |   57 ++++++++++++++++++++++++++++++++----
 1 files changed, 51 insertions(+), 6 deletions(-)
arch/arm/mach-ux500/board-mop500.c +51 -6
index 0fb5dfd..e2932fc 100644
@@ -745,12 +745,57 @@ MACHINE_END
 #ifdef CONFIG_MACH_UX500_DT
 static void __init u8500_init_machine(void)
 {
-	if (of_machine_is_compatible("calaosystems,snowball-a9500"))
-		return snowball_init_machine();
-	else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
-		return hrefv60_init_machine();
-	else if (of_machine_is_compatible("st-ericsson,mop500"))
-		return mop500_init_machine();
+	struct device *parent = NULL;
+	int i2c0_devs;
+	int i;
+
+	parent = u8500_init_devices();
+	i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
+
+	for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
+		mop500_platform_devs[i]->dev.parent = parent;
+	for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
+		snowball_platform_devs[i]->dev.parent = parent;
+
+
+	if (of_machine_is_compatible("st-ericsson,mop500")) {
+		mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
+		mop500_pins_init();
+
+		platform_add_devices(mop500_platform_devs,
+				ARRAY_SIZE(mop500_platform_devs));
+
+		mop500_sdi_init(parent);
+	} else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
+		snowball_pins_init();
+		platform_add_devices(snowball_platform_devs,
+				ARRAY_SIZE(snowball_platform_devs));
+
+		snowball_sdi_init(parent);
+	} else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
+		/*
+		 * The HREFv60 board removed a GPIO expander and routed
+		 * all these GPIO pins to the internal GPIO controller
+		 * instead.
+		 */
+		mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
+		i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
+		hrefv60_pins_init();
+		platform_add_devices(mop500_platform_devs,
+				ARRAY_SIZE(mop500_platform_devs));
+
+		hrefv60_sdi_init(parent);
+	}
+	mop500_i2c_init(parent);
+	mop500_spi_init(parent);
+	mop500_uart_init(parent);
+
+	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
+	i2c_register_board_info(2, mop500_i2c2_devices,
+				ARRAY_SIZE(mop500_i2c2_devices));
+
+	/* This board has full regulator constraints */
+	regulator_has_full_constraints();
 }
 
 static const char * u8500_dt_board_compat[] = {
Signature · 1 line
1.7.5.4
author
#10 lore raw

PATCH 4/10 ARM: ux500: split dts file for snowball into generic part

In reply to Lee Jones

From: Arnd Bergmann <[email protected]>

db8500.dtsi can be used by all systems with a db8500 or db9500 SoC, while snowball.dts is board specific.

---
 arch/arm/boot/dts/db8500.dtsi  |   21 +++++++++++++++++++++
 arch/arm/boot/dts/snowball.dts |    8 +-------
 2 files changed, 22 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/boot/dts/db8500.dtsi
arch/arm/boot/dts/db8500.dtsi new file +21 -0
new file mode 100644
index 0000000..50c84b2
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2012 Linaro Ltd
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	soc-u9500 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges;
+	};
+};
arch/arm/boot/dts/snowball.dts +1 -7
index ebcff9a..0ea9470 100644
@@ -10,22 +10,16 @@
  */
 
 /dts-v1/;
+/include/ "db8500.dtsi"
 
 / {
 	model = "Calao Systems Snowball platform with device tree";
 	compatible = "calaosystems,snowball-a9500";
 
-	#address-cells = <1>;
-	#size-cells = <1>;
-
 	memory {
 		reg = <0x00000000 0x20000000>;
 	};
 
 	soc-u9500 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
 	};
 };
Signature · 1 line
1.7.5.4
author
#12 lore raw

PATCH 5/10 ARM: ux500: db8500: list most devices in the snowball device tree

In reply to Lee Jones

From: Arnd Bergmann <[email protected]>

This adds all devices that are normally present through the u8500_init_machine function in the device tree as well, which will duplicate the devices that are visible.

This will not do much by itself because the device from the device tree are not matched by any device driver until they are converted as well. The next step is to move over one device at a time to actually be used from the device tree instead of the hardcoded device using auxdata to pass the correct platform_data.

---
 arch/arm/boot/dts/db8500.dtsi      |  228 +++++++++++++++++++++++++++++++++++-
 arch/arm/boot/dts/snowball.dts     |  102 ++++++++++++++++
 arch/arm/mach-ux500/board-mop500.c |   14 +++
 3 files changed, 343 insertions(+), 1 deletions(-)
arch/arm/boot/dts/db8500.dtsi +227 -1
index 50c84b2..0521cea 100644
@@ -15,7 +15,233 @@
 	soc-u9500 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "simple-bus";
+		compatible = "stericsson,db8500";
 		ranges;
+
+		pmu {
+			compatible = "arm,cortex-a9-pmu";
+			interrupts = <7>;
+		};
+
+		rtc at 80154000 {
+			compatible = "stericsson,db8500-rtc";
+			reg = <0x80154000 0x1000>;
+			interrupts = <18>;
+		};
+
+		gpio0: gpio at 8012e000 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8012e000 0x80>;
+			interrupts = <119>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio1: gpio at 8012e080 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8012e080 0x80>;
+			interrupts = <120>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio2: gpio at 8000e000 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8000e000 0x80>;
+			interrupts = <121>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio3: gpio at 8000e080 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8000e080 0x80>;
+			interrupts = <122>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio4: gpio at 8000e100 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8000e100 0x80>;
+			interrupts = <123>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio5: gpio at 8000e180 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8000e180 0x80>;
+			interrupts = <124>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio6: gpio at 8011e000 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8011e000 0x80>;
+			interrupts = <125>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio7: gpio at 8011e080 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0x8011e080 0x80>;
+			interrupts = <126>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		gpio8: gpio at a03fe000 {
+			compatible = "stericsson,db8500-gpio",
+				"stmicroelectronics,nomadik-gpio";
+			reg =  <0xa03fe000 0x80>;
+			interrupts = <127>;
+			supports-sleepmode;
+			gpio-controller;
+		};
+
+		usb at a03e0000 {
+			compatible = "stericsson,db8500-musb",
+				"mentor,musb";
+			reg = <0xa03e0000 0x10000>;
+			interrupts = <23>;
+		};
+
+		dma-controller at 801C0000 {
+			compatible = "stericsson,db8500-dma40",
+					"stericsson,dma40";
+			reg = <0x801C0000 0x1000 0x40010000 0x800>;
+			interrupts = <25>;
+		};
+
+		prcmu at 80157000 {
+			compatible = "stericsson,db8500-prcmu";
+			reg = <0x80157000 0x1000>;
+			interrupts = <46 47>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			ab8500 at 5 {
+				compatible = "stericsson,ab8500";
+				reg = <5>; /* mailbox 5 is i2c */
+				interrupts = <40>;
+			};
+		};
+
+		i2c at 80004000 {
+			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+			reg = <0x80004000 0x1000>;
+			interrupts = <21>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c at 80122000 {
+			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+			reg = <0x80122000 0x1000>;
+			interrupts = <22>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c at 80128000 {
+			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+			reg = <0x80128000 0x1000>;
+			interrupts = <55>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c at 80110000 {
+			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+			reg = <0x80110000 0x1000>;
+			interrupts = <12>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c at 8012a000 {
+			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+			reg = <0x8012a000 0x1000>;
+			interrupts = <51>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		ssp at 80002000 {
+			compatible = "arm,pl022", "arm,primecell";
+			reg = <80002000 0x1000>;
+			interrupts = <14>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+			cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
+		};
+
+		uart at 80120000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x80120000 0x1000>;
+			interrupts = <11>;
+			status = "disabled";
+		};
+		uart at 80121000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x80121000 0x1000>;
+			interrupts = <19>;
+			status = "disabled";
+		};
+		uart at 80007000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x80007000 0x1000>;
+			interrupts = <26>;
+			status = "disabled";
+		};
+
+		sdi at 80126000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			reg = <0x80126000 0x1000>;
+			interrupts = <60>;
+			status = "disabled";
+		};
+		sdi at 80118000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			reg = <0x80118000 0x1000>;
+			interrupts = <50>;
+			status = "disabled";
+		};
+		sdi at 80005000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			reg = <0x80005000 0x1000>;
+			interrupts = <41>;
+			status = "disabled";
+		};
+		sdi at 80119000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			reg = <0x80119000 0x1000>;
+			interrupts = <59>;
+			status = "disabled";
+		};
+		sdi at 80114000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			reg = <0x80114000 0x1000>;
+			interrupts = <99>;
+			status = "disabled";
+		};
+		sdi at 80008000 {
+			compatible = "arm,pl18x", "arm,primecell";
+			reg = <0x80114000 0x1000>;
+			interrupts = <100>;
+			status = "disabled";
+		};
 	};
 };
arch/arm/boot/dts/snowball.dts +102 -0

108 lines not on this page · raw message

arch/arm/mach-ux500/board-mop500.c +14 -0
index e2932fc..482b86e 100644
@@ -621,6 +621,7 @@ static void __init mop500_init_machine(void)
 
 	mop500_pins_init();
 
+	/* FIXME: parent of ab8500 should be prcmu */
 	for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
 		mop500_platform_devs[i]->dev.parent = parent;
 
@@ -743,6 +744,17 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
 MACHINE_END
 
 #ifdef CONFIG_MACH_UX500_DT
+
+struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+	{},
+};
+
+static const struct of_device_id u8500_soc_node[] = {
+	/* only create devices below soc node */
+	{ .compatible = "stericsson,db8500", },
+	{ },
+};
+
 static void __init u8500_init_machine(void)
 {
 	struct device *parent = NULL;
@@ -757,6 +769,8 @@ static void __init u8500_init_machine(void)
 	for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
 		snowball_platform_devs[i]->dev.parent = parent;
 
+	/* automatically probe child nodes of db8500 device */
+	of_platform_populate(NULL, u8500_soc_node, u8500_auxdata_lookup, parent);
 
 	if (of_machine_is_compatible("st-ericsson,mop500")) {
 		mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
Signature · 1 line
1.7.5.4
#13 lore raw

PATCH 5/10 ARM: ux500: db8500: list most devices in the snowball device tree

Quoted 9 lines · Lee Jones
arch/arm/boot/dts/db8500.dtsi +9 -0
+               pmu {
+                       compatible = "arm,cortex-a9-pmu";
+                       interrupts = <7>;
+               };
+
+               rtc at 80154000 {
+                       compatible = "stericsson,db8500-rtc";
+                       reg = <0x80154000 0x1000>;
+                       interrupts = <18>;

arch/arm/boot/dts/db8500.dtsi line 39

Quoted 10 lines
arch/arm/boot/dts/db8500.dtsi +10 -0
+               };
+
+               gpio0: gpio at 8012e000 {
+                       compatible = "stericsson,db8500-gpio",
+                               "stmicroelectronics,nomadik-gpio";
+                       reg =  <0x8012e000 0x80>;
+                       interrupts = <119>;
+                       supports-sleepmode;
+                       gpio-controller;
+               };

Reading through it one more time, I realized that all the interrupt numbers are incorrect here and you fix them up one by one in the later patches. I think it would be more logical if you could just fix correct them here and then later just add the additional properties and enable the device.

Arnd

#14 lore raw

PATCH 5/10 ARM: ux500: db8500: list most devices in the snowball device tree

Quoted 18 lines · Arnd Bergmann
Quoted 17 lines · Lee Jones

+ ? ? ? ? ? ? ? pmu {
+ ? ? ? ? ? ? ? ? ? ? ? compatible = "arm,cortex-a9-pmu";
+ ? ? ? ? ? ? ? ? ? ? ? interrupts = <7>;
+ ? ? ? ? ? ? ? };

(quoted diff) +13 -0
+
+ ? ? ? ? ? ? ? rtc at 80154000 {
+ ? ? ? ? ? ? ? ? ? ? ? compatible = "stericsson,db8500-rtc";
+ ? ? ? ? ? ? ? ? ? ? ? reg = <0x80154000 0x1000>;
+ ? ? ? ? ? ? ? ? ? ? ? interrupts = <18>;
+ ? ? ? ? ? ? ? };
+
+ ? ? ? ? ? ? ? gpio0: gpio at 8012e000 {
+ ? ? ? ? ? ? ? ? ? ? ? compatible = "stericsson,db8500-gpio",
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? "stmicroelectronics,nomadik-gpio";
+ ? ? ? ? ? ? ? ? ? ? ? reg = ?<0x8012e000 0x80>;
+ ? ? ? ? ? ? ? ? ? ? ? interrupts = <119>;
+ ? ? ? ? ? ? ? ? ? ? ? supports-sleepmode;
Quoted 8 lines
Quoted 2 lines

+ ? ? ? ? ? ? ? ? ? ? ? gpio-controller;
+ ? ? ? ? ? ? ? };

Reading through it one more time, I realized that all the interrupt numbers are incorrect here and you fix them up one by one in the later patches. I think it would be more logical if you could just fix correct them here and then later just add the additional properties and enable the device.

Lee, fix up the IRQs and it's

Thanks,
Linus Walleij

author
#15 lore raw

PATCH 6/10 ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree

In reply to Lee Jones

This enables the embedded GIC on all u8500 based hardware using DT.

---
 arch/arm/boot/dts/db8500.dtsi |   11 +++++++++++
 arch/arm/mach-ux500/cpu.c     |   12 +++++++++++-
 2 files changed, 22 insertions(+), 1 deletions(-)
arch/arm/boot/dts/db8500.dtsi +11 -0
index 0521cea..cce5df8 100644
@@ -16,8 +16,19 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "stericsson,db8500";
+		interrupt-parent = <&intc>;
 		ranges;
 
+		intc: interrupt-controller at a0411000 {
+			compatible = "arm,cortex-a9-gic";
+			#interrupt-cells = <3>;
+			#address-cells = <1>;
+			interrupt-controller;
+			interrupt-parent;
+			reg = <0xa0411000 0x1000>,
+			      <0xa0410100 0x100>;
+		};
+
 		pmu {
 			compatible = "arm,cortex-a9-pmu";
 			interrupts = <7>;
arch/arm/mach-ux500/cpu.c +11 -1
index 055fb6e..bd7f1dd 100644
@@ -16,6 +16,8 @@
 #include <linux/err.h>
 #include <linux/slab.h>
 #include <linux/stat.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>
@@ -29,6 +31,11 @@
 
 void __iomem *_PRCMU_BASE;
 
+static const struct of_device_id ux500_dt_irq_match[] = {
+	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+	{},
+};
+
 void __init ux500_init_irq(void)
 {
 	void __iomem *dist_base;
@@ -43,7 +50,10 @@ void __init ux500_init_irq(void)
 	} else
 		ux500_unknown_soc();
 
-	gic_init(0, 29, dist_base, cpu_base);
+	if (of_have_populated_dt())
+		of_irq_init(ux500_dt_irq_match);
+	else
+		gic_init(0, 29, dist_base, cpu_base);
 
 	/*
 	 * Init clocks here so that they are available for system timer
Signature · 1 line
1.7.5.4
author
#18 lore raw

PATCH 7/10 ARM: ux500: Provide local timer support for Device Tree

In reply to Lee Jones

This enables local timer (AKA: private timer) support for all u8500 based hardware using DT.

---
 arch/arm/boot/dts/db8500.dtsi    |    6 ++++++
 arch/arm/mach-ux500/localtimer.c |   18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 1 deletions(-)
arch/arm/boot/dts/db8500.dtsi +6 -0
index cce5df8..35d0146 100644
@@ -34,6 +34,12 @@
 			interrupts = <7>;
 		};
 
+		timer at a0410600 {
+			compatible = "arm,smp-twd";
+			reg = <0xa0410600 0x20>;
+			interrupts = <1 13 0x304>;
+		};
+
 		rtc at 80154000 {
 			compatible = "stericsson,db8500-rtc";
 			reg = <0x80154000 0x1000>;
arch/arm/mach-ux500/localtimer.c +17 -1
index 5ba1133..295e580 100644
@@ -14,6 +14,10 @@
 #include <linux/smp.h>
 #include <linux/clockchips.h>
 
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
 #include <asm/irq.h>
 #include <asm/smp_twd.h>
 #include <asm/localtimer.h>
@@ -23,7 +27,19 @@
  */
 int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
-	evt->irq = IRQ_LOCALTIMER;
+	struct device_node *np;
+
+	np = of_find_compatible_node(NULL, NULL, "arm,smp-twd");
+	if (np) {
+		if (!twd_base) {
+			twd_base = of_iomap(np, 0);
+			WARN_ON(!twd_base);
+		}
+		evt->irq = irq_of_parse_and_map(np, 0);
+	}
+	else
+		evt->irq = IRQ_LOCALTIMER;
+
 	twd_timer_setup(evt);
 	return 0;
 }
Signature · 1 line
1.7.5.4
#20 lore raw

PATCH 7/10 ARM: ux500: Provide local timer support for Device Tree

In reply to Lee Jones
Quoted 52 lines · Lee Jones

This enables local timer (AKA: private timer) support for all u8500 based hardware using DT.

---
 arch/arm/boot/dts/db8500.dtsi    |    6 ++++++
 arch/arm/mach-ux500/localtimer.c |   18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 1 deletions(-)
arch/arm/boot/dts/db8500.dtsi +6 -0
index cce5df8..35d0146 100644
@@ -34,6 +34,12 @@
 			interrupts = <7>;
 		};
 
+		timer at a0410600 {
+			compatible = "arm,smp-twd";
+			reg = <0xa0410600 0x20>;
+			interrupts = <1 13 0x304>;
+		};
+
 		rtc at 80154000 {
 			compatible = "stericsson,db8500-rtc";
 			reg = <0x80154000 0x1000>;
arch/arm/mach-ux500/localtimer.c +10 -1
index 5ba1133..295e580 100644
@@ -14,6 +14,10 @@
 #include <linux/smp.h>
 #include <linux/clockchips.h>
 
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
 #include <asm/irq.h>
 #include <asm/smp_twd.h>
 #include <asm/localtimer.h>
@@ -23,7 +27,19 @@
  */
 int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
-	evt->irq = IRQ_LOCALTIMER;
+	struct device_node *np;
+
+	np = of_find_compatible_node(NULL, NULL, "arm,smp-twd");
+	if (np) {
+		if (!twd_base) {
+			twd_base = of_iomap(np, 0);

arch/arm/mach-ux500/localtimer.c line 45

Quoted 10 lines
arch/arm/mach-ux500/localtimer.c +7 -0
+			WARN_ON(!twd_base);
+		}
+		evt->irq = irq_of_parse_and_map(np, 0);
+	}
+	else
+		evt->irq = IRQ_LOCALTIMER;
+
 	twd_timer_setup(evt);
 	return 0;
 }

FYI, this will probably collide with Marc Z's local timer changes queued up for 3.4.

Rob

#21 lore raw

PATCH 7/10 ARM: ux500: Provide local timer support for Device Tree

Quoted 58 lines · Rob Herring
Quoted 57 lines · Lee Jones

This enables local timer (AKA: private timer) support for all u8500 based hardware using DT.

---
 arch/arm/boot/dts/db8500.dtsi    |    6 ++++++
 arch/arm/mach-ux500/localtimer.c |   18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 1 deletions(-)
arch/arm/boot/dts/db8500.dtsi +6 -0
index cce5df8..35d0146 100644
@@ -34,6 +34,12 @@
 			interrupts = <7>;
 		};
 
+		timer at a0410600 {
+			compatible = "arm,smp-twd";
+			reg = <0xa0410600 0x20>;
+			interrupts = <1 13 0x304>;
+		};
+
 		rtc at 80154000 {
 			compatible = "stericsson,db8500-rtc";
 			reg = <0x80154000 0x1000>;
arch/arm/mach-ux500/localtimer.c +15 -1
index 5ba1133..295e580 100644
@@ -14,6 +14,10 @@
 #include <linux/smp.h>
 #include <linux/clockchips.h>
 
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
 #include <asm/irq.h>
 #include <asm/smp_twd.h>
 #include <asm/localtimer.h>
@@ -23,7 +27,19 @@
  */
 int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
-	evt->irq = IRQ_LOCALTIMER;
+	struct device_node *np;
+
+	np = of_find_compatible_node(NULL, NULL, "arm,smp-twd");
+	if (np) {
+		if (!twd_base) {
+			twd_base = of_iomap(np, 0);
+			WARN_ON(!twd_base);
+		}
+		evt->irq = irq_of_parse_and_map(np, 0);
+	}
+	else
Quoted 8 lines

arch/arm/mach-ux500/localtimer.c line 45

Quoted 5 lines
arch/arm/mach-ux500/localtimer.c +2 -0
+		evt->irq = IRQ_LOCALTIMER;
+
 	twd_timer_setup(evt);
 	return 0;
 }

FYI, this will probably collide with Marc Z's local timer changes queued up for 3.4.

Indeed. localtimer.c is gone in -next. This can be replaced by a single call to twd_local_timer_of_register() from your board file.

See arch/arm/mach-highbank/highbank.c for reference ;-).

	M.
Signature · 1 line
Jazz is not dead. It just smells funny...
author
#23 lore raw

PATCH 8/10 ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree

In reply to Lee Jones

Enables the 3 UARTs found on a u8500 using DT.

---
 arch/arm/boot/dts/db8500.dtsi      |    6 +++---
 arch/arm/boot/dts/snowball.dts     |   12 ++++++++++++
 arch/arm/mach-ux500/board-mop500.c |    4 +++-
 3 files changed, 18 insertions(+), 4 deletions(-)
arch/arm/boot/dts/db8500.dtsi +3 -3
index 35d0146..9b5e06e 100644
@@ -208,19 +208,19 @@
 		uart at 80120000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80120000 0x1000>;
-			interrupts = <11>;
+			interrupts = <0 11 0x4>;
 			status = "disabled";
 		};
 		uart at 80121000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80121000 0x1000>;
-			interrupts = <19>;
+			interrupts = <0 19 0x4>;
 			status = "disabled";
 		};
 		uart at 80007000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80007000 0x1000>;
-			interrupts = <26>;
+			interrupts = <0 26 0x4>;
 			status = "disabled";
 		};
 
arch/arm/boot/dts/snowball.dts +12 -0
index 34bfd79..359c6d6 100644
@@ -96,6 +96,18 @@
 			status = "enabled";
 		};
 
+		uart at 80120000 {
+			status = "okay";
+		};
+
+		uart at 80121000 {
+			status = "okay";
+		};
+
+		uart at 80007000 {
+			status = "okay";
+		};
+
 		i2c at 80004000 {
 			tc3589x at 42 {
 				//compatible = "tc3589x";
arch/arm/mach-ux500/board-mop500.c +3 -1
index 482b86e..ea0242a 100644
@@ -746,6 +746,9 @@ MACHINE_END
 #ifdef CONFIG_MACH_UX500_DT
 
 struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
+	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
+	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
 	{},
 };
 
@@ -802,7 +805,6 @@ static void __init u8500_init_machine(void)
 	}
 	mop500_i2c_init(parent);
 	mop500_spi_init(parent);
-	mop500_uart_init(parent);
 
 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 	i2c_register_board_info(2, mop500_i2c2_devices,
Signature · 1 line
1.7.5.4
#25 lore raw

PATCH 8/10 ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree

In reply to Lee Jones
Quoted 64 lines · Lee Jones

Enables the 3 UARTs found on a u8500 using DT.

---
 arch/arm/boot/dts/db8500.dtsi      |    6 +++---
 arch/arm/boot/dts/snowball.dts     |   12 ++++++++++++
 arch/arm/mach-ux500/board-mop500.c |    4 +++-
 3 files changed, 18 insertions(+), 4 deletions(-)
arch/arm/boot/dts/db8500.dtsi +3 -3
index 35d0146..9b5e06e 100644
@@ -208,19 +208,19 @@
 		uart at 80120000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80120000 0x1000>;
-			interrupts = <11>;
+			interrupts = <0 11 0x4>;
 			status = "disabled";
 		};
 		uart at 80121000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80121000 0x1000>;
-			interrupts = <19>;
+			interrupts = <0 19 0x4>;
 			status = "disabled";
 		};
 		uart at 80007000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80007000 0x1000>;
-			interrupts = <26>;
+			interrupts = <0 26 0x4>;
 			status = "disabled";
 		};
 
arch/arm/boot/dts/snowball.dts +12 -0
index 34bfd79..359c6d6 100644
@@ -96,6 +96,18 @@
 			status = "enabled";
 		};
 
+		uart at 80120000 {
+			status = "okay";
+		};
+
+		uart at 80121000 {
+			status = "okay";
+		};
+
+		uart at 80007000 {
+			status = "okay";
+		};
+
 		i2c at 80004000 {
 			tc3589x at 42 {
 				//compatible = "tc3589x";
arch/arm/mach-ux500/board-mop500.c +0 -0
index 482b86e..ea0242a 100644

arch/arm/mach-ux500/board-mop500.c MACHINE_END · line 751

Quoted 6 lines
arch/arm/mach-ux500/board-mop500.c +3 -0
@@ -746,6 +746,9 @@ MACHINE_END
 #ifdef CONFIG_MACH_UX500_DT
 
 struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
+	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
+	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),

Unless I'm blind, the pl011 driver doesn't take any platform data.

Rob

Quoted 11 lines
arch/arm/mach-ux500/board-mop500.c +0 -1
 	{},
 };
 
@@ -802,7 +805,6 @@ static void __init u8500_init_machine(void)
 	}
 	mop500_i2c_init(parent);
 	mop500_spi_init(parent);
-	mop500_uart_init(parent);
 
 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 	i2c_register_board_info(2, mop500_i2c2_devices,
author
#26 lore raw

PATCH 8/10 ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree

Quoted 67 lines · Rob Herring
Quoted 66 lines · Lee Jones

Enables the 3 UARTs found on a u8500 using DT.

---
 arch/arm/boot/dts/db8500.dtsi      |    6 +++---
 arch/arm/boot/dts/snowball.dts     |   12 ++++++++++++
 arch/arm/mach-ux500/board-mop500.c |    4 +++-
 3 files changed, 18 insertions(+), 4 deletions(-)
arch/arm/boot/dts/db8500.dtsi +3 -3
index 35d0146..9b5e06e 100644
@@ -208,19 +208,19 @@
 		uart at 80120000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80120000 0x1000>;
-			interrupts = <11>;
+			interrupts = <0 11 0x4>;
 			status = "disabled";
 		};
 		uart at 80121000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80121000 0x1000>;
-			interrupts = <19>;
+			interrupts = <0 19 0x4>;
 			status = "disabled";
 		};
 		uart at 80007000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x80007000 0x1000>;
-			interrupts = <26>;
+			interrupts = <0 26 0x4>;
 			status = "disabled";
 		};
 
arch/arm/boot/dts/snowball.dts +12 -0
index 34bfd79..359c6d6 100644
@@ -96,6 +96,18 @@
 			status = "enabled";
 		};
 
+		uart at 80120000 {
+			status = "okay";
+		};
+
+		uart at 80121000 {
+			status = "okay";
+		};
+
+		uart at 80007000 {
+			status = "okay";
+		};
+
 		i2c at 80004000 {
 			tc3589x at 42 {
 				//compatible = "tc3589x";
arch/arm/mach-ux500/board-mop500.c +0 -0
index 482b86e..ea0242a 100644
@@ -746,6 +746,9 @@ MACHINE_END
 #ifdef CONFIG_MACH_UX500_DT
 
Quoted 6 lines

arch/arm/mach-ux500/board-mop500.c MACHINE_END · line 751

Quoted 4 lines
arch/arm/mach-ux500/board-mop500.c +3 -0
 struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
+	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
+	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),

Unless I'm blind, the pl011 driver doesn't take any platform data.

I guess you must be blind then? =:-)

linux/amba/serial.h:

struct amba_pl011_data {
        bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
        void *dma_rx_param;
        void *dma_tx_param;
        void (*init) (void);
        void (*exit) (void);
        void (*reset) (void);
};
Quoted 12 lines
Quoted 11 lines
arch/arm/mach-ux500/board-mop500.c +0 -1
 	{},
 };
 
@@ -802,7 +805,6 @@ static void __init u8500_init_machine(void)
 	}
 	mop500_i2c_init(parent);
 	mop500_spi_init(parent);
-	mop500_uart_init(parent);
 
 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 	i2c_register_board_info(2, mop500_i2c2_devices,
Signature · 5 lines
Lee Jones
Linaro ST-Ericsson Landing Team Lead
M: +44 77 88 633 515
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
author
#28 lore raw

PATCH 9/10 ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree

In reply to Lee Jones

This provides PL310 Level 2 Cache Controller Device Tree support for all u8500 based devices.

---
 arch/arm/boot/dts/db8500.dtsi    |    8 ++++++++
 arch/arm/mach-ux500/cache-l2x0.c |    7 ++++++-
 2 files changed, 14 insertions(+), 1 deletions(-)
arch/arm/boot/dts/db8500.dtsi +8 -0
index 9b5e06e..6ae7f69 100644
@@ -29,6 +29,14 @@
 			      <0xa0410100 0x100>;
 		};
 
+		L2: l2-cache {
+			compatible = "arm,pl310-cache";
+			reg = <0xa0412000 0x1000>;
+			interrupts = <0 13 4>;
+			cache-unified;
+			cache-level = <2>;
+		};
+
 		pmu {
 			compatible = "arm,cortex-a9-pmu";
 			interrupts = <7>;
arch/arm/mach-ux500/cache-l2x0.c +6 -1
index da5569d..77a75ed 100644
@@ -5,6 +5,8 @@
  */
 
 #include <linux/io.h>
+#include <linux/of.h>
+
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <mach/hardware.h>
@@ -45,7 +47,10 @@ static int __init ux500_l2x0_init(void)
 	ux500_l2x0_unlock();
 
 	/* 64KB way size, 8 way associativity, force WA */
-	l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
+	if (of_have_populated_dt())
+		l2x0_of_init(0x3e060000, 0xc0000fff);
+	else
+		l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
 
 	/*
 	 * We can't disable l2 as we are in non secure mode, currently
Signature · 1 line
1.7.5.4
author
#31 lore raw

PATCH 10/10 ARM: ux500: Enable PL022 SSP Controller in Device Tree

In reply to Lee Jones

This SSP Controller supports a number of serial communication methods.

Namely:

/**
* enum ssp_interface - interfaces allowed for this SSP Controller
* @SSP_INTERFACE_MOTOROLA_SPI: Motorola Interface
* @SSP_INTERFACE_TI_SYNC_SERIAL: Texas Instrument Synchronous Serial
* interface
* @SSP_INTERFACE_NATIONAL_MICROWIRE: National Semiconductor Microwire
* interface
* @SSP_INTERFACE_UNIDIRECTIONAL: Unidirectional interface (STn8810
* &STn8815 only)
*/

... and as such cannot be registered using of_register_spi_devices. Instead it can be registered simply as a primecell device.

---
 arch/arm/boot/dts/db8500.dtsi      |    5 ++++-
 arch/arm/mach-ux500/board-mop500.c |    6 +++---
 2 files changed, 7 insertions(+), 4 deletions(-)
arch/arm/boot/dts/db8500.dtsi +4 -1
index 6ae7f69..a9866a3 100644
@@ -206,11 +206,14 @@
 		ssp at 80002000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <80002000 0x1000>;
-			interrupts = <14>;
+			interrupts = <0 14 4>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
+
+			// Add one of these for each child device
 			cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
+
 		};
 
 		uart at 80120000 {
arch/arm/mach-ux500/board-mop500.c +3 -3
index ea0242a..d0799d5 100644
@@ -443,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
 };
 #endif
 
-static struct pl022_ssp_controller ssp0_platform_data = {
+static struct pl022_ssp_controller ssp0_plat = {
 	.bus_id = 0,
 #ifdef CONFIG_STE_DMA40
 	.enable_dma = 1,
@@ -461,7 +461,7 @@ static struct pl022_ssp_controller ssp0_platform_data = {
 
 static void __init mop500_spi_init(struct device *parent)
 {
-	db8500_add_ssp0(parent, &ssp0_platform_data);
+	db8500_add_ssp0(parent, &ssp0_plat);
 }
 
 #ifdef CONFIG_STE_DMA40
@@ -749,6 +749,7 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
 	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
 	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+	OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
 	{},
 };
 
@@ -804,7 +805,6 @@ static void __init u8500_init_machine(void)
 		hrefv60_sdi_init(parent);
 	}
 	mop500_i2c_init(parent);
-	mop500_spi_init(parent);
 
 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 	i2c_register_board_info(2, mop500_i2c2_devices,
Signature · 1 line
1.7.5.4
#32 lore raw

PATCH 10/10 ARM: ux500: Enable PL022 SSP Controller in Device Tree

Quoted 15 lines · Lee Jones

This SSP Controller supports a number of serial communication methods.

Namely:

/**
* enum ssp_interface - interfaces allowed for this SSP Controller
* @SSP_INTERFACE_MOTOROLA_SPI: Motorola Interface
* @SSP_INTERFACE_TI_SYNC_SERIAL: Texas Instrument Synchronous Serial
* interface
* @SSP_INTERFACE_NATIONAL_MICROWIRE: National Semiconductor Microwire
* interface
* @SSP_INTERFACE_UNIDIRECTIONAL: Unidirectional interface (STn8810
* &STn8815 only)
*/

Quoted 4 lines

... and as such cannot be registered using of_register_spi_devices. Instead it can be registered simply as a primecell device.

Looks good to me, but this one needs review from Grant as the maintainer for both device tree and SPI.

For this to be functional, I think you also need a way for the SPI controller to find the child devices from the device tree, but I don't see how ux500 currently does it, or how it should be done.

Quoted 67 lines
---
 arch/arm/boot/dts/db8500.dtsi      |    5 ++++-
 arch/arm/mach-ux500/board-mop500.c |    6 +++---
 2 files changed, 7 insertions(+), 4 deletions(-)
arch/arm/boot/dts/db8500.dtsi +4 -1
index 6ae7f69..a9866a3 100644
@@ -206,11 +206,14 @@
 		ssp at 80002000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <80002000 0x1000>;
-			interrupts = <14>;
+			interrupts = <0 14 4>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
+
+			// Add one of these for each child device
 			cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
+
 		};
 
 		uart at 80120000 {
arch/arm/mach-ux500/board-mop500.c +3 -3
index ea0242a..d0799d5 100644
@@ -443,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
 };
 #endif
 
-static struct pl022_ssp_controller ssp0_platform_data = {
+static struct pl022_ssp_controller ssp0_plat = {
 	.bus_id = 0,
 #ifdef CONFIG_STE_DMA40
 	.enable_dma = 1,
@@ -461,7 +461,7 @@ static struct pl022_ssp_controller ssp0_platform_data = {
 
 static void __init mop500_spi_init(struct device *parent)
 {
-	db8500_add_ssp0(parent, &ssp0_platform_data);
+	db8500_add_ssp0(parent, &ssp0_plat);
 }
 
 #ifdef CONFIG_STE_DMA40
@@ -749,6 +749,7 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
 	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
 	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
 	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+	OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
 	{},
 };
 
@@ -804,7 +805,6 @@ static void __init u8500_init_machine(void)
 		hrefv60_sdi_init(parent);
 	}
 	mop500_i2c_init(parent);
-	mop500_spi_init(parent);
 
 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 	i2c_register_board_info(2, mop500_i2c2_devices,
Signature · 1 line
1.7.5.4
#33 lore raw

PATCH 10/10 ARM: ux500: Enable PL022 SSP Controller in Device Tree

Quoted 3 lines · Arnd Bergmann

For this to be functional, I think you also need a way for the SPI controller to find the child devices from the device tree, but I don't see how ux500 currently does it, or how it should be done.

It will be functional as long as you use the onholy hybrid of supplying the SPI devices (like the I2C devices!) from the board files instead.

But both drivers/spi/spi-pl022.c and drivers/i2c/busses/i2c-nomadik.c needs patches to register child devices from DT.

Yours,
Linus Walleij

#34 lore raw

PATCH 10/10 ARM: ux500: Enable PL022 SSP Controller in Device Tree

In reply to Lee Jones
Quoted 15 lines · Lee Jones

This SSP Controller supports a number of serial communication methods.

Namely:

/**
?* enum ssp_interface - interfaces allowed for this SSP Controller ?* @SSP_INTERFACE_MOTOROLA_SPI: Motorola Interface
?* @SSP_INTERFACE_TI_SYNC_SERIAL: Texas Instrument Synchronous Serial ?* interface
?* @SSP_INTERFACE_NATIONAL_MICROWIRE: National Semiconductor Microwire ?* interface
?* @SSP_INTERFACE_UNIDIRECTIONAL: Unidirectional interface (STn8810 ?* &STn8815 only)
?*/

Quoted 4 lines

... and as such cannot be registered using of_register_spi_devices. Instead it can be registered simply as a primecell device.

Why is the commit message all about what the patch cannot do rather than on what it does, anyway, begin with stating what you do and its:

Yours,
Linus Walleij