x86/asm changes for v3.4
Subsystems (3)
Linus,
Please pull the latest x86-asm-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-asm-for-linus
HEAD: a240ada241dafe290e7532d1ddeb98fdf1419068 x86: Include probe_roms.h in probe_roms.c
out-of-topic modifications in x86-asm-for-linus:
------------------------------------------------include/asm-generic/getorder.h # b893485: bitops: Add missing parentheses t
# d66acc3: bitops: Optimise get_order() # e0891a9: bitops: Adjust the comment on get
Thanks,
Ingo
------------------>
Alex Shi (1):
x86/numa: Improve internode cache alignment
David Howells (2):
bitops: Adjust the comment on get_order() to describe the size==0 case
bitops: Optimise get_order()
Jan Beulich (10):
x86-64: Slightly shorten copy_page()
x86-64: Fix memset() to support sizes of 4Gb and above
x86-64: Fix memcpy() to support sizes of 4Gb and above
x86-64: Handle byte-wise tail copying in memcpy() without a loop x86/spinlocks: Eliminate TICKET_MASK
x86-64: Fix CFI annotations for NMI nesting code
x86-64: Improve insn scheduling in SAVE_ARGS_IRQ
x86: Tighten dependencies of CPU_SUP_*_32
x86/32: Print control and debug registers for kerenel context
x86: Include probe_roms.h in probe_roms.c
Joerg Roedel (1):
bitops: Add missing parentheses to new get_order macro
Steven Rostedt (1):
x86: Fix the NMI nesting comments
arch/x86/Kconfig.cpu | 5 +- arch/x86/include/asm/spinlock.h | 4 +- arch/x86/include/asm/spinlock_types.h | 1 - arch/x86/kernel/dumpstack_32.c | 2 +- arch/x86/kernel/entry_64.S | 71 +++++++++++++++++--------------- arch/x86/kernel/probe_roms.c | 1 + arch/x86/lib/copy_page_64.S | 12 ++---- arch/x86/lib/memcpy_64.S | 44 +++++++++----------- arch/x86/lib/memset_64.S | 33 +++++++-------- include/asm-generic/getorder.h | 53 +++++++++++++++++++++---- 10 files changed, 128 insertions(+), 98 deletions(-)
arch/x86/Kconfig.cpu +2 -3
@@ -303,7 +303,6 @@ config X86_GENERIC config X86_INTERNODE_CACHE_SHIFT int default "12" if X86_VSMP - default "7" if NUMA default X86_L1_CACHE_SHIFT config X86_CMPXCHG
@@ -441,7 +440,7 @@ config CPU_SUP_INTEL config CPU_SUP_CYRIX_32 default y bool "Support Cyrix processors" if PROCESSOR_SELECT - depends on !64BIT + depends on M386 || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT) ---help--- This enables detection, tunings and quirks for Cyrix processors
@@ -495,7 +494,7 @@ config CPU_SUP_TRANSMETA_32 config CPU_SUP_UMC_32 default y bool "Support UMC processors" if PROCESSOR_SELECT - depends on !64BIT + depends on M386 || M486 || (EXPERT && !64BIT) ---help--- This enables detection, tunings and quirks for UMC processors
arch/x86/include/asm/spinlock.h +2 -2
@@ -88,14 +88,14 @@ static inline int __ticket_spin_is_locked(arch_spinlock_t *lock) {struct __raw_tickets tmp =ACCESS_ONCE (lock->tickets); -return !!(tmp.tail ^ tmp.head); +return tmp.tail != tmp.head; }static inline int __ticket_spin_is_contended (arch_spinlock_t *lock) {struct __raw_tickets tmp =ACCESS_ONCE (lock->tickets); -return ((tmp.tail - tmp.head) &TICKET_MASK ) >1 ; +return (__ticket_t)(tmp.tail - tmp.head) >1 ; }#ifndef CONFIG_PARAVIRT_SPINLOCKS
arch/x86/include/asm/spinlock_types.h +0 -1
@@ -16,7 +16,6 @@ typedef u32 __ticketpair_t;#endif #define TICKET_SHIFT (sizeof(__ticket_t) * 8) -#define TICKET_MASK ((__ticket_t)((1 << TICKET_SHIFT) - 1)) typedef struct arch_spinlock { union {
arch/x86/kernel/dumpstack_32.c +1 -1
@@ -87,7 +87,7 @@ void show_registers(struct pt_regs *regs)int i;print_modules (); -__show_regs (regs,0 ); +__show_regs (regs, !user_mode_vm (regs)); printk(KERN_EMERG "Process %.*s (pid: %d, ti=%p task=%p task.ti=%p)\n", TASK_COMM_LEN, current->comm, task_pid_nr(current),
arch/x86/kernel/entry_64.S +38 -33
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arch/x86/kernel/probe_roms.c +1 -0
@@ -12,6 +12,7 @@#include <linux/pci.h> #include <linux/export.h> +#include <asm/probe_roms.h> #include <asm/pci-direct.h> #include <asm/e820.h> #include <asm/mmzone.h>
arch/x86/lib/copy_page_64.S +4 -8
@@ -20,14 +20,12 @@ ENDPROC(copy_page_c) ENTRY(copy_page) CFI_STARTPROC - subq $3*8,%rsp - CFI_ADJUST_CFA_OFFSET 3*8 + subq $2*8,%rsp + CFI_ADJUST_CFA_OFFSET 2*8 movq %rbx,(%rsp) CFI_REL_OFFSET rbx, 0 movq %r12,1*8(%rsp) CFI_REL_OFFSET r12, 1*8 - movq %r13,2*8(%rsp) - CFI_REL_OFFSET r13, 2*8 movl $(4096/64)-5,%ecx .p2align 4
@@ -91,10 +89,8 @@ ENTRY(copy_page) CFI_RESTORE rbx movq 1*8(%rsp),%r12 CFI_RESTORE r12 - movq 2*8(%rsp),%r13 - CFI_RESTORE r13 - addq $3*8,%rsp - CFI_ADJUST_CFA_OFFSET -3*8 + addq $2*8,%rsp + CFI_ADJUST_CFA_OFFSET -2*8 ret .Lcopy_page_end: CFI_ENDPROC
arch/x86/lib/memcpy_64.S +20 -24
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arch/x86/lib/memset_64.S +15 -18
@@ -19,16 +19,15 @@ .section .altinstr_replacement, "ax", @progbits .Lmemset_c: movq %rdi,%r9 - movl %edx,%r8d - andl $7,%r8d - movl %edx,%ecx - shrl $3,%ecx + movq %rdx,%rcx + andl $7,%edx + shrq $3,%rcx /* expand byte value */ movzbl %sil,%esi movabs $0x0101010101010101,%rax - mulq %rsi /* with rax, clobbers rdx */ + imulq %rsi,%rax rep stosq - movl %r8d,%ecx + movl %edx,%ecx rep stosb movq %r9,%rax ret
@@ -50,7 +49,7 @@ .Lmemset_c_e: movq %rdi,%r9 movb %sil,%al - movl %edx,%ecx + movq %rdx,%rcx rep stosb movq %r9,%rax ret
@@ -61,12 +60,11 @@ ENTRY(memset) ENTRY(__memset) CFI_STARTPROC movq %rdi,%r10 - movq %rdx,%r11 /* expand byte value */ movzbl %sil,%ecx movabs $0x0101010101010101,%rax - mul %rcx /* with rax, clobbers rdx */ + imulq %rcx,%rax /* align dst */ movl %edi,%r9d
@@ -75,13 +73,13 @@ ENTRY(__memset) CFI_REMEMBER_STATE .Lafter_bad_alignment: - movl %r11d,%ecx - shrl $6,%ecx + movq %rdx,%rcx + shrq $6,%rcx jz .Lhandle_tail .p2align 4 .Lloop_64: - decl %ecx + decq %rcx movq %rax,(%rdi) movq %rax,8(%rdi) movq %rax,16(%rdi)
@@ -97,7 +95,7 @@ ENTRY(__memset) to predict jump tables. */ .p2align 4 .Lhandle_tail: - movl %r11d,%ecx + movl %edx,%ecx andl $63&(~7),%ecx jz .Lhandle_7 shrl $3,%ecx
@@ -109,12 +107,11 @@ ENTRY(__memset) jnz .Lloop_8 .Lhandle_7: - movl %r11d,%ecx - andl $7,%ecx + andl $7,%edx jz .Lende .p2align 4 .Lloop_1: - decl %ecx + decl %edx movb %al,(%rdi) leaq 1(%rdi),%rdi jnz .Lloop_1
@@ -125,13 +122,13 @@ ENTRY(__memset) CFI_RESTORE_STATE .Lbad_alignment: - cmpq $7,%r11 + cmpq $7,%rdx jbe .Lhandle_7 movq %rax,(%rdi) /* unaligned store */ movq $8,%r8 subq %r9,%r8 addq %r8,%rdi - subq %r8,%r11 + subq %r8,%rdx jmp .Lafter_bad_alignment .Lfinal: CFI_ENDPROC
include/asm-generic/getorder.h +45 -8
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