Skip to contentSkip to conversation

MIPS: fix endianess handling

PATCH New Daniel Schwierzeck 5 participants 11 messages Nov 28, 2011 – Mar 31, 2012 2 messages not in the archive MIPS

lore
Share & tools
lore
#0 lore raw

PATCH 1/1 MIPS: fix endianess handling

Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through endianess options to LD.

Build tested with:
- ELDK 4 mips_4KC- and mips4KCle
- Sourcery CodeBench Lite 2011.03-93

Cc Thomas Lange <[email protected]>
Cc Mike Frysinger <[email protected]>
Cc Wolfgang Denk <[email protected]>

---
Another try to finally fix this originated by discussion:
[1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/118111/focus=118122

Related discussions:
[2] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81572
[3] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/45404

 README                         |    6 ++++++
 arch/mips/cpu/mips32/config.mk |   21 +++++++++++++++------
 boards.cfg                     |    4 ++--
 examples/standalone/Makefile   |    6 +++++-
 4 files changed, 28 insertions(+), 9 deletions(-)
README +6 -0
index 07f1d11..468bfdf 100644
@@ -374,6 +374,12 @@ The following options need to be configured:
 		Defines the string to utilize when trying to match PCIe device
 		tree nodes for the given platform.
 
+- Generic CPU options:
+		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
+
+		Defines the endianess of the CPU. Implementation of those
+		values is arch specific.
+
 - Intel Monahans options:
 		CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
 
arch/mips/cpu/mips32/config.mk +15 -6
index 4d1b273..a1cd590 100644
@@ -27,14 +27,23 @@
 # Note: Toolchains with binutils prior to v2.16
 # are no longer supported by U-Boot MIPS tree!
 #
-MIPSFLAGS = -march=mips32r2
+MIPSFLAGS := -march=mips32r2
 
+# Handle special prefix in ELDK 4.0 toolchain
 ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
-ENDIANNESS = -EL
-else
-ENDIANNESS = -EB
+ENDIANNESS := -EL
 endif
 
-MIPSFLAGS += $(ENDIANNESS)
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+ENDIANNESS := -EL
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+ENDIANNESS := -EB
+endif
+
+# Default to EB if no endianess is configured
+ENDIANNESS ?= -EB
 
-PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS)
+PLATFORM_LDFLAGS += $(ENDIANNESS)
boards.cfg +2 -2
index c83d861..2cd917e 100644
@@ -324,13 +324,13 @@ dbau1000                     mips        mips32      dbau1x00            -
 dbau1100                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1100
 dbau1500                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1500
 dbau1550                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
-dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
+dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN
 gth2                         mips        mips32      -                   -              au1x00
 incaip                       mips        mips32      incaip              -              incaip
 incaip_100MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=100000000
 incaip_133MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=133000000
 incaip_150MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=150000000
-pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000
+pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000,SYS_LITTLE_ENDIAN
 qemu_mips                    mips        mips32      qemu-mips           -              -           qemu-mips
 tb0229                       mips        mips32
 vct_premium                  mips        mips32      vct                 micronas       -           vct:VCT_PREMIUM
examples/standalone/Makefile +5 -1
index e23865b..eab23b4 100644
@@ -88,6 +88,10 @@ endif
 CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder)
 CFLAGS += $(CFLAGS_NTR)
 
+# Pass through endianess settings in LDFLAGS to LD
+LDFLAGS_ENDIAN += $(filter -EB,$(LDFLAGS))
+LDFLAGS_ENDIAN += $(filter -EL,$(LDFLAGS))
+
 all:	$(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF)
 
 #########################################################################
@@ -96,7 +100,7 @@ $(LIB):	$(obj).depend $(LIBOBJS)
 
 $(ELF):
 $(obj)%:	$(obj)%.o $(LIB)
-		$(LD) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
+		$(LD) $(LDFLAGS_ENDIAN) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
 			-o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
 			-L$(gcclibdir) -lgcc
 
Signature · 1 line
1.7.7.2

A message that is not in the archive (sent off-list or not yet received): CACUy__XYf2Zo3d0SQ7Ub-ea37C2X=gZ+bTMTX95vz+YdAeQhDw@mail.gmail.com

#2 lore raw

PATCH 1/1 MIPS: fix endianess handling

Quoted 10 lines · Daniel Schwierzeck

boards.cfg dbau1000 mips mips32 dbau1x00 - · line 327

Quoted 10 lines
boards.cfg +1 -1
index c83d861..2cd917e 100644
@@ -324,13 +324,13 @@ dbau1000                     mips        mips32      dbau1x00            -
   dbau1100                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1100
   dbau1500                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1500
   dbau1550                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
-dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
+dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN

This looks Ok.

Quoted 10 lines

boards.cfg dbau1000 mips mips32 dbau1x00 - · line 336

Quoted 10 lines
boards.cfg +1 -1
   gth2                         mips        mips32      -                   -              au1x00
   incaip                       mips        mips32      incaip              -              incaip
   incaip_100MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=100000000
   incaip_133MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=133000000
   incaip_150MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=150000000
-pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000
+pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000,SYS_LITTLE_ENDIAN
   qemu_mips                    mips        mips32      qemu-mips           -              -           qemu-mips
   tb0229                       mips        mips32
   vct_premium                  mips        mips32      vct                 micronas       -           vct:VCT_PREMIUM

But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in boards.cfg. Just putting it in configs/pb1000.h is enough, isn't it?

Quoted 1 line

Shinya, do you have an opinion about this?

No, if it works for you, I'm fine. Thanks for tackling this issue. Does anyone disagree with this change? If not, I'll pick this up.

Quoted 9 lines

examples/standalone/Makefile endif · line 91

Quoted 9 lines
examples/standalone/Makefile +1 -0
index e23865b..eab23b4 100644
@@ -88,6 +88,10 @@ endif
   CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder)
   CFLAGS += $(CFLAGS_NTR)
 
+# Pass through endianess settings in LDFLAGS to LD

s/endianess/endianness/

#3 lore raw

PATCH 1/1 MIPS: fix endianess handling

Dear Shinya Kuribayashi,

Quoted 3 lines · In message <[email protected]> you wrote:
Quoted 3 lines
Quoted 3 lines
boards.cfg +1 -1
-pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000
+pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000,SYS_LITTLE_ENDIAN

...

Quoted 2 lines

But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in boards.cfg. Just putting it in configs/pb1000.h is enough, isn't it?

Agreed. In almost all cases this should be done in the board config file only. Only if there are cases where a board suppors both LE and BE configurations (is there any such board??) then we should need a SYS_*_ENDIAN setting in boards.cfg (but even then, only one - not two).

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Real computer scientists don't comment their  code.  The  identifiers
are so long they can't afford the disk space.
#4 lore raw

PATCH 1/1 MIPS: fix endianess handling

Quoted 7 lines · Wolfgang Denk

Dear Shinya Kuribayashi,

Quoted 3 lines · In message<[email protected]> you wrote:
Quoted 3 lines
Quoted 3 lines
boards.cfg +1 -1
-pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000
+pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000,SYS_LITTLE_ENDIAN

...

Quoted 8 lines
Quoted 2 lines

But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in boards.cfg. Just putting it in configs/pb1000.h is enough, isn't it?

Agreed. In almost all cases this should be done in the board config file only. Only if there are cases where a board suppors both LE and BE configurations (is there any such board??) then we should need a SYS_*_ENDIAN setting in boards.cfg (but even then, only one - not two).

I did this because of dbau1550 and dbau1550_el. For the pb1000 I'll move it to the board config.

Quoted 5 lines

Best regards,

Wolfgang Denk

Signature · 2 lines
Best regards,
Daniel
#5 lore raw

PATCH 1/1 MIPS: fix endianess handling

Dear Daniel Schwierzeck,

Quoted 14 lines · Wolfgang Denk
Quoted 13 lines

Dear Shinya Kuribayashi,

Quoted 4 lines · In message<[email protected]> you wrote:
Quoted 4 lines
Quoted 4 lines

-pb1000 mips mips32 pb1x00
- au1x00 pb1x00:PB1000 +pb1000
mips mips32 pb1x00 - au1x00
pb1x00:PB1000,SYS_LITTLE_ENDIAN

...

Quoted 2 lines

But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in boards.cfg. Just putting it in configs/pb1000.h is enough, isn't it?

Quoted 12 lines
Quoted 5 lines

Agreed. In almost all cases this should be done in the board config file only. Only if there are cases where a board suppors both LE and BE configurations (is there any such board??) then we should need a SYS_*_ENDIAN setting in boards.cfg (but even then, only one - not two).

I did this because of dbau1550 and dbau1550_el. For the pb1000 I'll move it to the board config.

Quoted 3 lines

Best regards,

Wolfgang Denk

Will we see V2 of this patch please?

Best regards,
Marek Vasut

A message that is not in the archive (sent off-list or not yet received): [email protected]

#7 lore raw

PATCH 1/1 MIPS: fix endianess handling

Dear Daniel Schwierzeck,

Quoted 3 lines · In message <[email protected]> you wrote:

Wolfgang, is there any reason why standalone apps are linked without LDFLAGS (especially PLATFORM_LDFLAGS)?

None that I know, at least.

In general, standalone applications are a rarely used special feature, and the few people who actually ever used this for a purpose probably used custom code and custom linker scripts, so the mainline code is eventually not that good supproted.

Quoted 3 lines

This patch fixes a general issue with standalone apps on archs supporting both endianess types when running MAKEALL. I guess this could be relevant for ARM too if U-Boot has support for big-endian ARM boards.

It does, but I doubt anybody ever used standalone applications on these.

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Computers are not intelligent.  They only think they are.
#8 lore raw

PATCH 1/1 MIPS: fix endianess handling

Quoted 7 lines · Wolfgang Denk

Dear Daniel Schwierzeck,

Quoted 3 lines · In message<[email protected]> you wrote:

Wolfgang, is there any reason why standalone apps are linked without LDFLAGS (especially PLATFORM_LDFLAGS)?

Quoted 6 lines

None that I know, at least.

In general, standalone applications are a rarely used special feature, and the few people who actually ever used this for a purpose probably used custom code and custom linker scripts, so the mainline code is eventually not that good supproted.

the problem is those apps are always compiled. Maybe we should introduce a config option to enable building only if someone really needs them?

Quoted 12 lines
Quoted 4 lines

This patch fixes a general issue with standalone apps on archs supporting both endianess types when running MAKEALL. I guess this could be relevant for ARM too if U-Boot has support for big-endian ARM boards.

It does, but I doubt anybody ever used standalone applications on these.

Best regards,

Wolfgang Denk

Signature · 2 lines
Best regards,
Daniel
#9 lore raw

PATCH 1/1 MIPS: fix endianess handling

Dear Daniel Schwierzeck,

Quoted 8 lines · In message <[email protected]> you wrote:
Quoted 5 lines

In general, standalone applications are a rarely used special feature, and the few people who actually ever used this for a purpose probably used custom code and custom linker scripts, so the mainline code is eventually not that good supproted.

the problem is those apps are always compiled. Maybe we should introduce a config option to enable building only if someone really needs them?

As is, they are rarely used, so they tend to collect bit-rot.

If we stop to even compile them, they wil rot much faster. This is not a good idea.

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
In C we had to code our own bugs, in C++ we can inherit them.
#10 lore raw

PATCH v2 1/1 MIPS: fix endianess handling

In reply to Daniel Schwierzeck

Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through endianess options to LD.

Build tested with:
- ELDK 4 mips_4KC- and mips4KCle
- Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips".

---
Changes for v2:
- moved CONFIG_SYS_LITTLE_ENDIAN from boards.cfg to configs/pb1x00.h
- fixed typo in comment
- updated patch summary

Note:
qemu_mips and tb0229 boards are still broken.

Build result with Sourcery CodeBench Lite 2011.03-93:

~/devel/u-boot$ CROSS_COMPILE=/opt/codesourcery/mips-2011.03/bin/mips-linux-gnu- BUILD_NCPUS=2 ./MAKEALL -a mips Configuring for dbau1000 - Board: dbau1x00, Options: DBAU1000
text data bss dec hex filename
120604 4390 16068 141062 22706 ./u-boot
Configuring for dbau1100 - Board: dbau1x00, Options: DBAU1100
text data bss dec hex filename
120604 4390 16068 141062 22706 ./u-boot
Configuring for dbau1500 - Board: dbau1x00, Options: DBAU1500
text data bss dec hex filename
120604 4390 16068 141062 22706 ./u-boot
Configuring for dbau1550 - Board: dbau1x00, Options: DBAU1550
text data bss dec hex filename
119148 4454 18732 142334 22bfe ./u-boot
Configuring for dbau1550_el - Board: dbau1x00, Options: DBAU1550,SYS_LITTLE_ENDIAN
text data bss dec hex filename
120316 4454 18732 143502 2308e ./u-boot
Configuring for gth2 board...
text data bss dec hex filename
113668 4390 13752 131810 202e2 ./u-boot
Configuring for incaip board...
text data bss dec hex filename
147500 5066 15676 168242 29132 ./u-boot
Configuring for incaip_100MHz - Board: incaip, Options: CPU_CLOCK_RATE=100000000
text data bss dec hex filename
147500 5066 15676 168242 29132 ./u-boot
Configuring for incaip_133MHz - Board: incaip, Options: CPU_CLOCK_RATE=133000000
text data bss dec hex filename
147500 5066 15676 168242 29132 ./u-boot
Configuring for incaip_150MHz - Board: incaip, Options: CPU_CLOCK_RATE=150000000
text data bss dec hex filename
147500 5066 15676 168242 29132 ./u-boot
Configuring for pb1000 - Board: pb1x00, Options: PB1000
text data bss dec hex filename
110084 5090 15896 131070 1fffe ./u-boot
Configuring for qemu_mips board...
net/libnet.o: In function `eth_halt':
(.text.eth_halt+0x0): multiple definition of eth_halt' drivers/net/libnet.o:/home/schwierd/devel/u-boot/drivers/net/ne2000_base.c:721: first defined here net/libnet.o: In function eth_rx':
(.text.eth_rx+0x0): multiple definition of eth_rx' drivers/net/libnet.o:/home/schwierd/devel/u-boot/drivers/net/ne2000_base.c:729: first defined here net/libnet.o: In function eth_init':
(.text.eth_init+0x0): multiple definition of eth_init' drivers/net/libnet.o:/home/schwierd/devel/u-boot/drivers/net/ne2000_base.c:668: first defined here net/libnet.o: In function eth_send':
(.text.eth_send+0x0): multiple definition of `eth_send' drivers/net/libnet.o:/home/schwierd/devel/u-boot/drivers/net/ne2000_base.c:734: first defined here
make: *** [u-boot] Error 1
/opt/codesourcery/mips-2011.03/bin/mips-linux-gnu-size: './u-boot': No such file
Configuring for tb0229 board...
flash.c:27:24: fatal error: asm/ppc4xx.h: No such file or directory
compilation terminated.
make[1]: *** No rule to make target .depend', needed by _depend'. Stop.
make: *** [depend] Error 2
/opt/codesourcery/mips-2011.03/bin/mips-linux-gnu-size: './u-boot': No such file
Configuring for vct_premium - Board: vct, Options: VCT_PREMIUM
text data bss dec hex filename
197880 12100 272852 482832 75e10 ./u-boot
Configuring for vct_premium_small - Board: vct, Options: VCT_PREMIUM,VCT_SMALL_IMAGE
board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
88104 3640 14372 106116 19e84 ./u-boot
Configuring for vct_premium_onenand - Board: vct, Options: VCT_PREMIUM,VCT_ONENAND
text data bss dec hex filename
292552 14564 274068 581184 8de40 ./u-boot
Configuring for vct_premium_onenand_small - Board: vct, Options: VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
181884 6056 15604 203544 31b18 ./u-boot
Configuring for vct_platinum - Board: vct, Options: VCT_PLATINUM
text data bss dec hex filename
197880 12100 272852 482832 75e10 ./u-boot
Configuring for vct_platinum_small - Board: vct, Options: VCT_PLATINUM,VCT_SMALL_IMAGE board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
88104 3640 14372 106116 19e84 ./u-boot
Configuring for vct_platinum_onenand - Board: vct, Options: VCT_PLATINUM,VCT_ONENAND
text data bss dec hex filename
292552 14564 274068 581184 8de40 ./u-boot
Configuring for vct_platinum_onenand_small - Board: vct, Options: VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
181884 6056 15604 203544 31b18 ./u-boot
Configuring for vct_platinumavc - Board: vct, Options: VCT_PLATINUMAVC
board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
118196 4752 15576 138524 21d1c ./u-boot
Configuring for vct_platinumavc_small - Board: vct, Options: VCT_PLATINUMAVC,VCT_SMALL_IMAGE board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
87608 3640 14372 105620 19c94 ./u-boot
Configuring for vct_platinumavc_onenand - Board: vct, Options: VCT_PLATINUMAVC,VCT_ONENAND board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
213024 7212 16820 237056 39e00 ./u-boot
Configuring for vct_platinumavc_onenand_small - Board: vct, Options: VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
text data bss dec hex filename
181380 6056 15604 203040 31920 ./u-boot
Configuring for qi_lb60 board...
cpu.c: In function '_machine_restart':
cpu.c:65:2: warning: dereferencing type-punned pointer will break strict-aliasing rules cpu.c:65:2: warning: large integer implicitly truncated to unsigned type
board.c: In function 'board_init_r':
board.c:266:8: warning: unused variable 's'
timer.c: In function 'reset_timer_masked':
timer.c:37:2: warning: dereferencing type-punned pointer will break strict-aliasing rules timer.c: In function 'get_timer_masked':
timer.c:43:2: warning: dereferencing type-punned pointer will break strict-aliasing rules timer.c: In function 'timer_init':
timer.c:86:2: warning: dereferencing type-punned pointer will break strict-aliasing rules timer.c:88:2: warning: dereferencing type-punned pointer will break strict-aliasing rules timer.c:89:2: warning: dereferencing type-punned pointer will break strict-aliasing rules timer.c:90:2: warning: dereferencing type-punned pointer will break strict-aliasing rules qi_lb60.c: In function 'cpm_init':
qi_lb60.c:72:2: warning: dereferencing type-punned pointer will break strict-aliasing rules qi_lb60.c:84:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
text data bss dec hex filename
123064 8304 2528 133896 20b08 ./u-boot

--------------------- SUMMARY ----------------------------
Boards compiled: 26
Boards with warnings or errors: 11 ( qemu_mips tb0229 vct_premium_small vct_premium_onenand_small vct_platinum_small vct_platinum_onenand_small vct_platinumavc vct_platinumavc_small vct_platinumavc_onenand vct_platinumavc_onenand_small qi_lb60 )
----------------------------------------------------------

 README                         |    6 ++++++
 arch/mips/cpu/mips32/config.mk |   21 +++++++++++++++------
 boards.cfg                     |    2 +-
 examples/standalone/Makefile   |    6 +++++-
 include/configs/pb1x00.h       |    2 ++
 5 files changed, 29 insertions(+), 8 deletions(-)
README +6 -0
index 3ddec77..0e09842 100644
@@ -374,6 +374,12 @@ The following options need to be configured:
 		Defines the string to utilize when trying to match PCIe device
 		tree nodes for the given platform.
 
+- Generic CPU options:
+		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
+
+		Defines the endianess of the CPU. Implementation of those
+		values is arch specific.
+
 - Intel Monahans options:
 		CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
 
arch/mips/cpu/mips32/config.mk +15 -6
index 4d1b273..a1cd590 100644
@@ -27,14 +27,23 @@
 # Note: Toolchains with binutils prior to v2.16
 # are no longer supported by U-Boot MIPS tree!
 #
-MIPSFLAGS = -march=mips32r2
+MIPSFLAGS := -march=mips32r2
 
+# Handle special prefix in ELDK 4.0 toolchain
 ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
-ENDIANNESS = -EL
-else
-ENDIANNESS = -EB
+ENDIANNESS := -EL
 endif
 
-MIPSFLAGS += $(ENDIANNESS)
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+ENDIANNESS := -EL
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+ENDIANNESS := -EB
+endif
+
+# Default to EB if no endianess is configured
+ENDIANNESS ?= -EB
 
-PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS)
+PLATFORM_LDFLAGS += $(ENDIANNESS)
boards.cfg +1 -1
index b678547..e99fde6 100644
@@ -323,7 +323,7 @@ dbau1000                     mips        mips32      dbau1x00            -
 dbau1100                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1100
 dbau1500                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1500
 dbau1550                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
-dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
+dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN
 gth2                         mips        mips32      -                   -              au1x00
 incaip                       mips        mips32      incaip              -              incaip
 incaip_100MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=100000000
examples/standalone/Makefile +5 -1
index e23865b..8c9e4cf 100644
@@ -88,6 +88,10 @@ endif
 CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder)
 CFLAGS += $(CFLAGS_NTR)
 
+# Pass through endianness settings in LDFLAGS to LD
+LDFLAGS_ENDIAN += $(filter -EB,$(LDFLAGS))
+LDFLAGS_ENDIAN += $(filter -EL,$(LDFLAGS))
+
 all:	$(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF)
 
 #########################################################################
@@ -96,7 +100,7 @@ $(LIB):	$(obj).depend $(LIBOBJS)
 
 $(ELF):
 $(obj)%:	$(obj)%.o $(LIB)
-		$(LD) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
+		$(LD) $(LDFLAGS_ENDIAN) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
 			-o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
 			-L$(gcclibdir) -lgcc
 
include/configs/pb1x00.h +2 -0
index eea8ed3..d056884 100644
@@ -46,6 +46,8 @@
 #endif
 #endif
 
+#define CONFIG_SYS_LITTLE_ENDIAN
+
 #define CONFIG_ETHADDR		DE:AD:BE:EF:01:01    /* Ethernet address */
 
 #define CONFIG_BOOTDELAY	2	/* autoboot after 2 seconds	*/
Signature · 1 line
1.7.8
#11 lore raw

PATCH v3 1/1 MIPS: fix endianess handling

Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through endianess options to LD.

Build tested with:
- ELDK 4 mips_4KC- and mips4KCle
- Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips".

---
Changes for v3:
- rebased against current master

Changes for v2:
- moved CONFIG_SYS_LITTLE_ENDIAN from boards.cfg to configs/pb1x00.h
- fixed typo in comment
- updated patch summary

 README                         |    6 ++++++
 arch/mips/cpu/mips32/config.mk |   21 +++++++++++++++------
 boards.cfg                     |    2 +-
 examples/standalone/Makefile   |    6 +++++-
 include/configs/pb1x00.h       |    2 ++
 5 files changed, 29 insertions(+), 8 deletions(-)
README +6 -0
index ff72e47..afcfc8f 100644
@@ -374,6 +374,12 @@ The following options need to be configured:
 		Defines the string to utilize when trying to match PCIe device
 		tree nodes for the given platform.
 
+- Generic CPU options:
+		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
+
+		Defines the endianess of the CPU. Implementation of those
+		values is arch specific.
+
 - Intel Monahans options:
 		CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
 
arch/mips/cpu/mips32/config.mk +15 -6
index 4d1b273..a1cd590 100644
@@ -27,14 +27,23 @@
 # Note: Toolchains with binutils prior to v2.16
 # are no longer supported by U-Boot MIPS tree!
 #
-MIPSFLAGS = -march=mips32r2
+MIPSFLAGS := -march=mips32r2
 
+# Handle special prefix in ELDK 4.0 toolchain
 ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
-ENDIANNESS = -EL
-else
-ENDIANNESS = -EB
+ENDIANNESS := -EL
 endif
 
-MIPSFLAGS += $(ENDIANNESS)
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+ENDIANNESS := -EL
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+ENDIANNESS := -EB
+endif
+
+# Default to EB if no endianess is configured
+ENDIANNESS ?= -EB
 
-PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS)
+PLATFORM_LDFLAGS += $(ENDIANNESS)
boards.cfg +1 -1
index a0a2bba..cbeba0c 100644
@@ -348,7 +348,7 @@ dbau1000                     mips        mips32      dbau1x00            -
 dbau1100                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1100
 dbau1500                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1500
 dbau1550                     mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
-dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550
+dbau1550_el                  mips        mips32      dbau1x00            -              au1x00      dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN
 gth2                         mips        mips32      -                   -              au1x00
 pb1000                       mips        mips32      pb1x00              -              au1x00      pb1x00:PB1000
 incaip                       mips        mips32      incaip              -              incaip
examples/standalone/Makefile +5 -1
index e23865b..8c9e4cf 100644
@@ -88,6 +88,10 @@ endif
 CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder)
 CFLAGS += $(CFLAGS_NTR)
 
+# Pass through endianness settings in LDFLAGS to LD
+LDFLAGS_ENDIAN += $(filter -EB,$(LDFLAGS))
+LDFLAGS_ENDIAN += $(filter -EL,$(LDFLAGS))
+
 all:	$(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF)
 
 #########################################################################
@@ -96,7 +100,7 @@ $(LIB):	$(obj).depend $(LIBOBJS)
 
 $(ELF):
 $(obj)%:	$(obj)%.o $(LIB)
-		$(LD) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
+		$(LD) $(LDFLAGS_ENDIAN) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
 			-o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
 			-L$(gcclibdir) -lgcc
 
include/configs/pb1x00.h +2 -0
index eea8ed3..d056884 100644
@@ -46,6 +46,8 @@
 #endif
 #endif
 
+#define CONFIG_SYS_LITTLE_ENDIAN
+
 #define CONFIG_ETHADDR		DE:AD:BE:EF:01:01    /* Ethernet address */
 
 #define CONFIG_BOOTDELAY	2	/* autoboot after 2 seconds	*/
Signature · 1 line
1.7.8
#12 lore raw

PATCH v3 1/1 MIPS: fix endianess handling

README The following options need to be configured: · line 381

Quoted 11 lines · On Sunday 11 December 2011 11:53:11 Daniel Schwierzeck wrote:
README +5 -0
@@ -374,6 +374,12 @@ The following options need to be configured:
 		Defines the string to utilize when trying to match PCIe device
 		tree nodes for the given platform.
 
+- Generic CPU options:
+		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
+
+		Defines the endianess of the CPU. Implementation of those
+		values is arch specific.

might be useful to describe what these do. something like:
Adds options to explicitly add compiler flags that select the desired endianness. Otherwise, the endian will be whatever the toolchain defaults to.

arch/mips/cpu/mips32/config.mk line 43

Quoted 10 lines
arch/mips/cpu/mips32/config.mk +7 -0
 
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+ENDIANNESS := -EL
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+ENDIANNESS := -EB
+endif

the GNU linker should treat -EL/-EB the same for all targets. so we should be able to add to the common .mk files in the top level:

	LDFLAGS-$(CONFIG_SYS_LITTLE_ENDIAN) += -EL
	LDFLAGS-$(CONFIG_SYS_BIG_ENDIAN) += -EB

-mike
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: This is a digitally signed message part.
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20111216/e7a4a6ac/attachment.pgp>