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x86, amd: Probe CPUs by APICID instead of initial APICID

PATCH In review Vlad Zolotarov 2 participants 2 messages Apr 17, 2012 x86

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PATCH 1/1 x86, amd: Probe CPUs by APICID instead of initial APICID

From: Shai Fultheim <[email protected]>

Make AMD identify processors using APICID (32 bit) rather than the initial APICID (8 bit). This is critical to make sure the last level cache (llc), which is used for sibling detection, will be different between boards - on aggregated systems with more than 8 processors.

---
 arch/x86/kernel/cpu/amd.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)
arch/x86/kernel/cpu/amd.c +5 -5
index 0bab2b1..33d9502 100644
@@ -277,7 +277,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
 
 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
 		nodes = ((ecx >> 8) & 7) + 1;
-		node_id = ecx & 7;
+		node_id = (ecx & 7) + (c->phys_proc_id << 3);
 
 		/* get compute unit information */
 		smp_num_siblings = ((ebx >> 8) & 3) + 1;
@@ -288,7 +288,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
 
 		rdmsrl(MSR_FAM10H_NODE_ID, value);
 		nodes = ((value >> 3) & 7) + 1;
-		node_id = value & 7;
+		node_id = (value & 7) + (c->phys_proc_id << 3);
 	} else
 		return;
 
@@ -323,9 +323,9 @@ static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
 
 	bits = c->x86_coreid_bits;
 	/* Low order bits define the core id (index of core in socket) */
-	c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);
-	/* Convert the initial APIC ID into the socket ID */
-	c->phys_proc_id = c->initial_apicid >> bits;
+	c->cpu_core_id = c->apicid & ((1 << bits)-1);
+	/* Convert the APIC ID into the socket ID */
+	c->phys_proc_id = c->apicid >> bits;
 	/* use socket ID also for last level cache */
 	per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
 	amd_get_topology(c);
Signature · 1 line
1.7.7.6
#1 lore raw
Quoted 10 lines · Vlad Zolotarov

From: Shai Fultheim <[email protected]>

Make AMD identify processors using APICID (32 bit) rather than the initial APICID (8 bit). This is critical to make sure the last level cache (llc), which is used for sibling detection, will be different between boards - on aggregated systems with more than 8 processors.

I think instead of fiddling with the generic code you rather should do what was implemented for numascale support. See apic_numachip.c

Especially changing node_id will break other stuff.

Quoted 27 lines
---
 arch/x86/kernel/cpu/amd.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)
arch/x86/kernel/cpu/amd.c +2 -2
index 0bab2b1..33d9502 100644
@@ -277,7 +277,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
 
 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
 		nodes = ((ecx >> 8) & 7) + 1;
-		node_id = ecx & 7;
+		node_id = (ecx & 7) + (c->phys_proc_id << 3);
 
 		/* get compute unit information */
 		smp_num_siblings = ((ebx >> 8) & 3) + 1;
@@ -288,7 +288,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
 
 		rdmsrl(MSR_FAM10H_NODE_ID, value);
 		nodes = ((value >> 3) & 7) + 1;
-		node_id = value & 7;
+		node_id = (value & 7) + (c->phys_proc_id << 3);
 	} else
 		return;
 

arch/x86/kernel/cpu/amd.c static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c) · line 328

Quoted 9 lines
arch/x86/kernel/cpu/amd.c +3 -3
@@ -323,9 +323,9 @@ static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
 
 	bits = c->x86_coreid_bits;
 	/* Low order bits define the core id (index of core in socket) */
-	c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);
-	/* Convert the initial APIC ID into the socket ID */
-	c->phys_proc_id = c->initial_apicid >> bits;
+	c->cpu_core_id = c->apicid & ((1 << bits)-1);
+	/* Convert the APIC ID into the socket ID */
+	c->phys_proc_id = c->apicid >> bits;

Extracting phys_proc_id from apicid will result in wrong socket enumeration on several systems. E.g. they would start with package_id 1 instead of 0.

Thanks,

Andreas