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tegra2: trivially enable 13 mhz crystal frequency

PATCH New Lucas Stach 3 participants 3 messages May 1, 2012 – May 3, 2012

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PATCH 1/1 tegra2: trivially enable 13 mhz crystal frequency

This is needed for upcoming Toradex Colibri T20 upstream support.

---
 arch/arm/cpu/armv7/tegra2/clock.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
arch/arm/cpu/armv7/tegra2/clock.c +4 -1
index 39376ab..8084631 100644
@@ -1027,7 +1027,10 @@ void clock_early_init(void)
 		clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8);
 		break;
 
-	case CLOCK_OSC_FREQ_13_0:
+	case CLOCK_OSC_FREQ_13_0: /* OSC is 13Mhz */
+		clock_set_rate(CLOCK_ID_PERIPH, 432, 13, 1, 8);
+		clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8);
+		break;
 	case CLOCK_OSC_FREQ_19_2:
 	default:
 		/*
Signature · 1 line
1.7.10
#1 lore raw

PATCH 1/1 tegra2: trivially enable 13 mhz crystal frequency

Quoted 1 line · Lucas Stach

This is needed for upcoming Toradex Colibri T20 upstream support.

You probably want to CC the Tegra maintainer, so he notices this patch. I've done so here.

#2 lore raw

PATCH 1/1 tegra2: trivially enable 13 mhz crystal frequency

In reply to Lucas Stach

Dear Lucas Stach,

Quoted 1 line

This is needed for upcoming Toradex Colibri T20 upstream support.

Neat, you're doing support for this board? That'd be great to have :) Keep me in CC, I have one and I'd be glad to review patches. (I hope you noticed the work of antmicro on the tegra/u-boot)

Quoted 12 lines
---
 arch/arm/cpu/armv7/tegra2/clock.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/tegra2/clock.c index 39376ab..8084631 100644

arch/arm/cpu/armv7/tegra2/clock.c +0 -0
@@ -1027,7 +1027,10 @@ void clock_early_init(void)
 		clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8);

arch/arm/cpu/armv7/tegra2/clock.c void clock_early_init(void) · line 1036

Quoted 10 lines
arch/arm/cpu/armv7/tegra2/clock.c +4 -1
 		break;
 
-	case CLOCK_OSC_FREQ_13_0:
+	case CLOCK_OSC_FREQ_13_0: /* OSC is 13Mhz */
+		clock_set_rate(CLOCK_ID_PERIPH, 432, 13, 1, 8);
+		clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8);
+		break;
 	case CLOCK_OSC_FREQ_19_2:
 	default:
 		/*

Best regards,
Marek Vasut