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This patch series contains support for interrupt and USB gadget in MSM7x27a surf board

PATCH New Srikanth Reddy Vintha 3 participants 7 messages May 11, 2012 – Jun 21, 2012

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#0 lore raw

cover This patch series contains support for interrupt and USB gadget in MSM7x27a surf board

Srikanth Reddy Vintha (2):
MSM7x27a:Add support for interrupt
MSM7x27a:Add support for USB gadget

 arch/arm/cpu/armv7/msm7x27a/Makefile            |    1 +
 arch/arm/cpu/armv7/msm7x27a/acpuclock.c         |    7 +
 arch/arm/cpu/armv7/msm7x27a/interrupts.c        |  136 +++++++++++++++++
 arch/arm/include/asm/arch-msm7x27a/exclusion.h  |   42 +++++
 arch/arm/include/asm/arch-msm7x27a/hsusb.h      |  183 +++++++++++++++++++++++
 arch/arm/include/asm/arch-msm7x27a/interrupts.h |   39 +++++
 arch/arm/include/asm/arch-msm7x27a/iomap.h      |    2 +
 arch/arm/include/asm/arch-msm7x27a/irqs.h       |   98 ++++++++++++
 board/qcom/msm7x27a_surf/msm7x27a_surf.c        |    2 +
 drivers/usb/gadget/msm_udc.c                    |   11 +-
 include/configs/msm7x27a_surf.h                 |   14 +-
 11 files changed, 524 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/hsusb.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
#1 lore raw

PATCH 1/2 MSM7x27a:Add support for interrupt

* support for msm7x27a interrupt

---
 arch/arm/cpu/armv7/msm7x27a/Makefile            |    1 +
 arch/arm/cpu/armv7/msm7x27a/interrupts.c        |  136 +++++++++++++++++++++++
 arch/arm/include/asm/arch-msm7x27a/exclusion.h  |   42 +++++++
 arch/arm/include/asm/arch-msm7x27a/interrupts.h |   39 +++++++
 arch/arm/include/asm/arch-msm7x27a/irqs.h       |   98 ++++++++++++++++
 board/qcom/msm7x27a_surf/msm7x27a_surf.c        |    2 +
 include/configs/msm7x27a_surf.h                 |    2 +-
 7 files changed, 319 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
arch/arm/cpu/armv7/msm7x27a/Makefile +1 -0
index 5f493d7..19e7546 100644
@@ -34,6 +34,7 @@ COBJS-y	:= board.o
 COBJS-y	+= timer.o
 COBJS-y	+= acpuclock.o
 COBJS-y	+= gpio.o
+COBJS-$(CONFIG_USE_IRQ)	+= interrupts.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +136 -0

136 lines not on this page · raw message

arch/arm/include/asm/arch-msm7x27a/exclusion.h new file +42 -0

42 lines not on this page · raw message

arch/arm/include/asm/arch-msm7x27a/interrupts.h new file +39 -0
new file mode 100644
index 0000000..c8e0368
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd. <www.lntinfotech.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __PLATFORM_INTERRUPTS_H
+#define __PLATFORM_INTERRUPTS_H
+
+enum handler_return {
+	INT_NO_RESCHEDULE = 0,
+	INT_RESCHEDULE,
+};
+
+typedef enum handler_return (*int_handler)(void *arg);
+
+void register_int_handler(unsigned int vector, int_handler handler, void *arg);
+int mask_interrupt(unsigned int vector);
+int unmask_interrupt(unsigned int vector);
+#endif
arch/arm/include/asm/arch-msm7x27a/irqs.h new file +98 -0

98 lines not on this page · raw message

board/qcom/msm7x27a_surf/msm7x27a_surf.c +2 -0
index 9199f48..cc8f000 100644
@@ -29,11 +29,13 @@
 #include <asm/arch/proc_comm.h>
 #include "msm7x27a_surf.h"
 
+int critical_section_count;
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f()
 {
+	critical_section_count = 0;
 	uart1_clock_init();
 	return 0;
 }
include/configs/msm7x27a_surf.h +1 -1
index a82ba59..2b5efb8 100644
@@ -98,7 +98,7 @@
 /*---------------------------------------------------------------------
  * IRQ Settings
  */
-
+#define CONFIG_USE_IRQ
 #define CONFIG_STACKSIZE_IRQ    (4*1024)	/* IRQ stack */
 #define CONFIG_STACKSIZE_FIQ    (4*1024)	/* FIQ stack */
 
Signature · 1 line
1.7.1
#2 lore raw

PATCH 1/2 MSM7x27a:Add support for interrupt

Dear Srikanth Reddy Vintha,

Quoted 58 lines

* support for msm7x27a interrupt

---
 arch/arm/cpu/armv7/msm7x27a/Makefile            |    1 +
 arch/arm/cpu/armv7/msm7x27a/interrupts.c        |  136
+++++++++++++++++++++++ arch/arm/include/asm/arch-msm7x27a/exclusion.h  | 
 42 +++++++
 arch/arm/include/asm/arch-msm7x27a/interrupts.h |   39 +++++++
 arch/arm/include/asm/arch-msm7x27a/irqs.h       |   98 ++++++++++++++++
 board/qcom/msm7x27a_surf/msm7x27a_surf.c        |    2 +
 include/configs/msm7x27a_surf.h                 |    2 +-
 7 files changed, 319 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/msm7x27a/Makefile index 5f493d7..19e7546 100644

arch/arm/cpu/armv7/msm7x27a/Makefile +1 -0
@@ -34,6 +34,7 @@ COBJS-y	:= board.o
 COBJS-y	+= timer.o
 COBJS-y	+= acpuclock.o
 COBJS-y	+= gpio.o
+COBJS-$(CONFIG_USE_IRQ)	+= interrupts.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/msm7x27a/interrupts.c new file mode 100644 index 0000000..cc45c4b

arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +22 -0
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd. <www.lntinfotech.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *	notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *	notice, this list of conditions and the following disclaimer in
+ *	the documentation and/or other materials provided with the
+ *	distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *	may be used to endorse or promote products derived from this
+ *	software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

arch/arm/cpu/armv7/msm7x27a/interrupts.c line 32

Quoted 10 lines
arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +10 -0
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.

So this is not GPL? Until this is cleared (or WD claims otherwise), I'm not reviewing further.

Btw if you submit any patches, make sure to CC the proper custodian so the patches are not lost http://www.denx.de/wiki/U-Boot/Custodians

#3 lore raw

PATCH 1/2 MSM7x27a:Add support for interrupt

Hi Wolfgang Denk,

could you please clarify on the below review comment.
________________________________________
From: Marek Vasut [marek.vasut at gmail.com]
Sent: Saturday, May 12, 2012 11:50 AM
To: u-boot at lists.denx.de
Cc: Srikanth Reddy; Mohamed Haneef; Shrinivas Sahukar; wd at denx.de
Subject: Re: [U-Boot] [PATCH 1/2] MSM7x27a:Add support for interrupt

Dear Srikanth Reddy Vintha,

Quoted 58 lines

* support for msm7x27a interrupt

---
 arch/arm/cpu/armv7/msm7x27a/Makefile            |    1 +
 arch/arm/cpu/armv7/msm7x27a/interrupts.c        |  136
+++++++++++++++++++++++ arch/arm/include/asm/arch-msm7x27a/exclusion.h  |
 42 +++++++
 arch/arm/include/asm/arch-msm7x27a/interrupts.h |   39 +++++++
 arch/arm/include/asm/arch-msm7x27a/irqs.h       |   98 ++++++++++++++++
 board/qcom/msm7x27a_surf/msm7x27a_surf.c        |    2 +
 include/configs/msm7x27a_surf.h                 |    2 +-
 7 files changed, 319 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/msm7x27a/Makefile index 5f493d7..19e7546 100644

arch/arm/cpu/armv7/msm7x27a/Makefile +1 -0
@@ -34,6 +34,7 @@ COBJS-y     := board.o
 COBJS-y      += timer.o
 COBJS-y      += acpuclock.o
 COBJS-y      += gpio.o
+COBJS-$(CONFIG_USE_IRQ)      += interrupts.o
 
 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/msm7x27a/interrupts.c new file mode 100644 index 0000000..cc45c4b

arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +22 -0
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd. <www.lntinfotech.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *   may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

arch/arm/cpu/armv7/msm7x27a/interrupts.c line 32

Quoted 10 lines
arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +10 -0
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.

So this is not GPL? Until this is cleared (or WD claims otherwise), I'm not reviewing further.

Btw if you submit any patches, make sure to CC the proper custodian so the patches are not lost http://www.denx.de/wiki/U-Boot/Custodians

Is it compatible with GPL?, If not how do we overcome this.

Best regards,
SrikanthR V

#4 lore raw

PATCH 1/2 MSM7x27a:Add support for interrupt

Hi,

I observed few files are Dual licensed in U-Boot.

In my case To resolve license incompatibility ,Is it ok to add GPLV2 on top of existing license in the same file . so that the final file having two license .

please comment on this ...

Thanks,
Srikanth R V

________________________________________
From: Srikanth Reddy
Sent: Monday, May 14, 2012 5:28 PM
To: wd at denx.de; u-boot at lists.denx.de
Cc: Marek Vasut; Mohamed Haneef; Murugadoss P; Shrinivas Sahukar
Subject: RE: [U-Boot] [PATCH 1/2] MSM7x27a:Add support for interrupt

Hi Wolfgang Denk,

could you please clarify on the below review comment.
________________________________________
From: Marek Vasut [marek.vasut at gmail.com]
Sent: Saturday, May 12, 2012 11:50 AM
To: u-boot at lists.denx.de
Cc: Srikanth Reddy; Mohamed Haneef; Shrinivas Sahukar; wd at denx.de
Subject: Re: [U-Boot] [PATCH 1/2] MSM7x27a:Add support for interrupt

Dear Srikanth Reddy Vintha,

Quoted 58 lines

* support for msm7x27a interrupt

---
 arch/arm/cpu/armv7/msm7x27a/Makefile            |    1 +
 arch/arm/cpu/armv7/msm7x27a/interrupts.c        |  136
+++++++++++++++++++++++ arch/arm/include/asm/arch-msm7x27a/exclusion.h  |
 42 +++++++
 arch/arm/include/asm/arch-msm7x27a/interrupts.h |   39 +++++++
 arch/arm/include/asm/arch-msm7x27a/irqs.h       |   98 ++++++++++++++++
 board/qcom/msm7x27a_surf/msm7x27a_surf.c        |    2 +
 include/configs/msm7x27a_surf.h                 |    2 +-
 7 files changed, 319 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/msm7x27a/Makefile index 5f493d7..19e7546 100644

arch/arm/cpu/armv7/msm7x27a/Makefile +1 -0
@@ -34,6 +34,7 @@ COBJS-y     := board.o
 COBJS-y      += timer.o
 COBJS-y      += acpuclock.o
 COBJS-y      += gpio.o
+COBJS-$(CONFIG_USE_IRQ)      += interrupts.o
 
 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
(quoted diff) +0 -0

b/arch/arm/cpu/armv7/msm7x27a/interrupts.c new file mode 100644 index 0000000..cc45c4b

arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +22 -0
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd. <www.lntinfotech.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *   may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

arch/arm/cpu/armv7/msm7x27a/interrupts.c line 32

Quoted 10 lines
arch/arm/cpu/armv7/msm7x27a/interrupts.c new file +10 -0
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.

So this is not GPL? Until this is cleared (or WD claims otherwise), I'm not reviewing further.

Btw if you submit any patches, make sure to CC the proper custodian so the patches are not lost http://www.denx.de/wiki/U-Boot/Custodians

Is it compatible with GPL?, If not how do we overcome this.

Best regards,
SrikanthR V

#5 lore raw

PATCH 1/2 MSM7x27a:Add support for interrupt

In reply to Srikanth Reddy

Dear Srikanth Reddy,

Quoted 2 lines · In message <3C902E36B0BFAD4394CBF7D8633B02A10B5E5987CD@BLRINMSMBX01.bglrodc.lnt…

could you please clarify on the below review comment.

I'm not sure which aditional comment you need.

Quoted 2 lines

So this is not GPL? Until this is cleared (or WD claims otherwise), I'm not reviewing further.

Please fix your quoting. This looks as if it was written by you, but actually this was Marek's remark. See
http://www.netmeister.org/news/learn2quote.html

Quoted 1 line

Is it compatible with GPL?, If not how do we overcome this.

You mentioned you could dual-license it as GPLv2+ as well - that would be obviously best. Thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Well, the way I see it, logic is only a way of being ignorant by num-
bers.                                 - Terry Pratchett, _Small Gods_
#6 lore raw

PATCH 2/2 MSM7x27a:Add support for USB gadget

In reply to Srikanth Reddy Vintha

* USB gadget support

---
 arch/arm/cpu/armv7/msm7x27a/acpuclock.c    |    7 +
 arch/arm/include/asm/arch-msm7x27a/hsusb.h |  183 ++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-msm7x27a/iomap.h |    2 +
 drivers/usb/gadget/msm_udc.c               |   11 +-
 include/configs/msm7x27a_surf.h            |   12 +-
 5 files changed, 205 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-msm7x27a/hsusb.h
arch/arm/cpu/armv7/msm7x27a/acpuclock.c +7 -0
index 7f46d18..ae9db0d 100644
@@ -220,6 +220,13 @@ void acpu_clock_init(void)
 	}
 }
 
+void hsusb_clock_init(void)
+{
+	/* USB local clock control not enabled; use proc comm */
+	usb_clock_init();
+}
+
+
 #ifdef CONFIG_QC_MMC
 /* Configure MMC clock */
 void clock_config_mmc(uint32_t interface, uint32_t freq)
arch/arm/include/asm/arch-msm7x27a/hsusb.h new file +183 -0

183 lines not on this page · raw message

arch/arm/include/asm/arch-msm7x27a/iomap.h +2 -0
index 4c9d434..adc0b02 100644
@@ -48,6 +48,8 @@
 
 #define MSM_SHARED_BASE 0x00100000
 
+#define MSM_USB_BASE 0xA0800000
+
 #define MSM_SDC1_BASE   0xA0400000
 #define MSM_SDC3_BASE   0xA0600000
 
drivers/usb/gadget/msm_udc.c +7 -4
index 7c2a14a..1fbbbfb 100644
@@ -173,8 +173,10 @@ static void msm_udc_handle_setup(void)
 		udcdbg("clear feature\n");
 		if ((s.wValue == 0) && (s.wLength == 0)) {
 			unsigned num = s.wIndex & USB_ENDPOINT_NUMBER_MASK;
-			unsigned direction = s.wIndex & USB_ENDPOINT_DIR_MASK;
-
+			#ifdef DEBUG
+				unsigned direction =
+					 s.wIndex & USB_ENDPOINT_DIR_MASK;
+			#endif
 			udcdbg("Clear feature ep%i%s\n", num, direction ?
 				"in" : "out");
 			msm_udc_ep_enable(num, 1);
@@ -217,7 +219,7 @@ static void msm_udc_handle_setup(void)
 
 static void msm_udc_ep_complete(unsigned num, unsigned direction)
 {
-	struct ept_queue_item *dTD = dTD_list[num];
+	struct ept_queue_item *dTD = (struct ept_queue_item *) dTD_list[num];
 	struct usb_endpoint_instance *epi =
 		&udc_device->bus->endpoint_array[num];
 	struct urb *urb = msm_udc_get_urb_by_dir(num, direction);
@@ -383,7 +385,8 @@ int udc_endpoint_write(struct usb_endpoint_instance *epi)
 	enter_critical_section();
 	/* Handle the case where there are completed dTDs waiting */
 	if (dTD_list[num] != NULL) {
-		struct ept_queue_item *dTDlast = dTD_list[num];
+		struct ept_queue_item *dTDlast =
+				(struct ept_queue_item *)dTD_list[num];
 		unsigned qDepth = 1;
 		while (dTDlast->next != (struct ept_queue_item *) TERMINATE) {
 			dTDlast = dTDlast->next;
include/configs/msm7x27a_surf.h +6 -6
index 2b5efb8..5f0eed3 100644
@@ -38,6 +38,11 @@
  */
 #define CONFIG_SYS_MALLOC_LEN           (2 * 1024)	/* 2KB  */
 
+/* Enable USB */
+#define CONFIG_MSM_UDC
+#define CONFIG_USB_TTY
+#define CONFIG_USB_DEVICE
+
 /*
  * select serial console configuration
  */
@@ -60,7 +65,7 @@
 #undef CONFIG_CMD_NET		/* network support */
 #undef CONFIG_SYS_MAX_FLASH_SECT
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"console=ttyS0,115200n8\0" \
+	"usbtty=cdc_acm\0"
 
 #define CONFIG_BOOTDELAY	-1
 
@@ -106,10 +111,6 @@
  * Physical Memory Map
  */
 
-#if 0
-#define CONFIG_BOOTDELAY       0
-#define CONFIG_BOOTCOMMAND		"mmc part"
-#endif
 #define CONFIG_NR_DRAM_BANKS		1
 
 #define PHYS_SDRAM_1			0x00000000
@@ -124,5 +125,4 @@
 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 						CONFIG_SYS_INIT_RAM_SIZE - \
 						GENERATED_GBL_DATA_SIZE)
-
 #endif
Signature · 1 line
1.7.1