msm7630 usb gadget and emmc support

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new file mode 100644
index 0000000..e7b95de
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd. <www.lntinfotech.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __PLATFORM_INTERRUPTS_H
+#define __PLATFORM_INTERRUPTS_H
+
+enum handler_return {
+	INT_NO_RESCHEDULE = 0,
+	INT_RESCHEDULE,
+};
+
+
+typedef enum handler_return (*int_handler)(void *arg);
+
+void register_int_handler(unsigned int vector, int_handler handler, void *arg);
+int mask_interrupt(unsigned int vector);
+int unmask_interrupt(unsigned int vector);
+#endif

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index 95c9f04..9dcf95b 100644
@@ -30,6 +30,8 @@
 #include <asm/arch/proc_comm.h>
 #include "msm7630_surf.h"
 
+int critical_section_count;
+
 static struct msm_gpio uart2_gpio_table[] = {
 	{
 	.gpio_cfg = GPIO_CFG(49, 2, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA),

@@ -61,6 +63,7 @@ void uart2_mux_init(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f()
 {
+	critical_section_count = 0;
 	uart2_mux_init();
 	uart2_clock_init();
 	return 0;

new file mode 100644
index 0000000..a20f907
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd. <www.lntinfotech.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _HSUSB_H_
+#define _HSUSB_H_
+
+#include <asm/arch/iomap.h>
+
+#ifndef MSM_USB_BASE
+#error Must define base address of USB controller MSM_USB_BASE
+#endif
+
+#define USB_ID               (MSM_USB_BASE + 0x0000)
+#define USB_HWGENERAL        (MSM_USB_BASE + 0x0004)
+#define USB_HWHOST           (MSM_USB_BASE + 0x0008)
+#define USB_HWDEVICE         (MSM_USB_BASE + 0x000C)
+#define USB_HWTXBUF          (MSM_USB_BASE + 0x0010)
+#define USB_HWRXBUF          (MSM_USB_BASE + 0x0014)
+#define USB_SBUSCFG          (MSM_USB_BASE + 0x0090)
+
+#define USB_AHB_BURST        (MSM_USB_BASE + 0x0090)
+#define USB_AHB_MODE         (MSM_USB_BASE + 0x0098)
+#define USB_CAPLENGTH        (MSM_USB_BASE + 0x0100) /* 8 bit */
+#define USB_HCIVERSION       (MSM_USB_BASE + 0x0102) /* 16 bit */
+#define USB_HCSPARAMS        (MSM_USB_BASE + 0x0104)
+#define USB_HCCPARAMS        (MSM_USB_BASE + 0x0108)
+#define USB_DCIVERSION       (MSM_USB_BASE + 0x0120)	/* 16 bit */
+#define USB_USBCMD           (MSM_USB_BASE + 0x0140)
+#define USB_USBSTS           (MSM_USB_BASE + 0x0144)
+#define USB_USBINTR          (MSM_USB_BASE + 0x0148)
+#define USB_FRINDEX          (MSM_USB_BASE + 0x014C)
+#define USB_DEVICEADDR       (MSM_USB_BASE + 0x0154)
+#define USB_ENDPOINTLISTADDR (MSM_USB_BASE + 0x0158)
+#define USB_BURSTSIZE        (MSM_USB_BASE + 0x0160)
+#define USB_TXFILLTUNING     (MSM_USB_BASE + 0x0164)
+#define USB_ULPI_VIEWPORT    (MSM_USB_BASE + 0x0170)
+#define USB_ENDPTNAK         (MSM_USB_BASE + 0x0178)
+#define USB_ENDPTNAKEN       (MSM_USB_BASE + 0x017C)
+#define USB_PORTSC           (MSM_USB_BASE + 0x0184)
+#define USB_OTGSC            (MSM_USB_BASE + 0x01A4)
+#define USB_USBMODE          (MSM_USB_BASE + 0x01A8)
+#define USB_ENDPTSETUPSTAT   (MSM_USB_BASE + 0x01AC)
+#define USB_ENDPTPRIME       (MSM_USB_BASE + 0x01B0)
+#define USB_ENDPTFLUSH       (MSM_USB_BASE + 0x01B4)
+#define USB_ENDPTSTAT        (MSM_USB_BASE + 0x01B8)
+#define USB_ENDPTCOMPLETE    (MSM_USB_BASE + 0x01BC)
+#define USB_ENDPTCTRL(n)     (MSM_USB_BASE + 0x01C0 + (4 * (n)))
+
+#define USBCMD_RESET   2
+#define USBCMD_ATTACH  1
+
+#define USBMODE_DEVICE 2
+#define USBMODE_HOST   3
+
+
+/* Endpoint Txfer Descriptor dTD as defined by DC */
+struct ept_queue_item {
+	struct ept_queue_item *next;
+#define UDC_DTD_TOTAL_BYTES(info) (((info) >> 16) & 0x7FFF)
+	unsigned info; /* 30:16-Total Bytes,7:0-Status */
+	unsigned page0;
+	unsigned page1;
+	unsigned page2;
+	unsigned page3;
+	unsigned page4;
+	unsigned reserved;
+};
+
+/* Endpoint Queue Head (dQH) as defined by the DC must take up 64K.
+ * There must be one dQH for every endpoint and direction. */
+struct ept_queue_head {
+	unsigned config;
+	unsigned current; /* read-only */
+	unsigned next;
+	unsigned info;
+	unsigned page0;
+	unsigned page1;
+	unsigned page2;
+	unsigned page3;
+	unsigned page4;
+	unsigned reserved_0;
+	unsigned char setup_data[8];
+	unsigned reserved_1;
+	unsigned reserved_2;
+	unsigned reserved_3;
+	unsigned reserved_4;
+};
+
+#define CONFIG_MAX_PKT(n)     ((n) << 16)
+#define CONFIG_ZLT            (1 << 29)    /* stop on zero-len xfer */
+#define CONFIG_IOS            (1 << 15)    /* IRQ on setup */
+
+
+
+#define TERMINATE 1
+
+#define INFO_BYTES(n)         ((n) << 16)
+#define INFO_IOC              (1 << 15)
+#define INFO_ACTIVE           (1 << 7)
+#define INFO_HALTED           (1 << 6)
+#define INFO_BUFFER_ERROR     (1 << 5)
+#define INFO_TX_ERROR         (1 << 3)
+
+#define STS_NAKI              (1 << 16)	/* */
+#define STS_SLI               (1 << 8)	/* R/WC - suspend state entered */
+#define STS_SRI               (1 << 7)	/* R/WC - SOF recv'd */
+#define STS_URI               (1 << 6)	/* R/WC - RESET recv'd - write to clear */
+#define STS_FRI               (1 << 3)	/* R/WC - Frame List Rollover */
+#define STS_PCI               (1 << 2)	/* R/WC - Port Change Detect */
+#define STS_UEI               (1 << 1)	/* R/WC - USB Error */
+#define STS_UI                (1 << 0)	/* R/WC - USB Transaction Complete */
+
+/* bits used in all the endpoint status registers */
+#define EPT_TX(n) (1 << ((n) + 16))
+#define EPT_RX(n) (1 << (n))
+
+
+#define CTRL_TXE              (1 << 23)	/* TX Endpoint Enable */
+#define CTRL_TXR              (1 << 22)	/* TX Data Toggle Reset */
+#define CTRL_TXI              (1 << 21)	/* TX Data Toggle Inhibit */
+#define CTRL_TXT(n)           ((n) << 18)	/* TX Endpoint Type */
+#define CTRL_TXD              (1 << 17)	/* TX Endpoint Data Source */
+#define CTRL_TXS              (1 << 16)	/* TX Endpoint Stall */
+#define CTRL_RXE              (1 << 7)	/* RX Endpoint Enable */
+#define CTRL_RXR              (1 << 6)	/* RX Data Toggle Reset */
+#define CTRL_RXI              (1 << 5)	/* RX Data Toggle Inhibit */
+#define CTRL_RXT(n)           ((n) << 2)	/* RX Endpoint Type */
+#define CTRL_RXD              (1 << 1)	/* RX Endpoint Data Source */
+#define CTRL_RXS              (1 << 0)	/* RX Endpint Stall */
+
+#define CTRL_TXT_CTRL         (0 << 18)
+#define CTRL_TXT_ISOCH        (1 << 18)
+#define CTRL_TXT_BULK         (2 << 18)
+#define CTRL_TXT_INT          (3 << 18)
+
+#define CTRL_RXT_CTRL         (0 << 2)
+#define CTRL_RXT_ISOCH        (1 << 2)
+#define CTRL_RXT_BULK         (2 << 2)
+#define CTRL_RXT_INT          (3 << 2)
+
+#define ULPI_WAKEUP           (1 << 31)
+#define ULPI_RUN              (1 << 30)
+#define ULPI_WRITE            (1 << 29)
+#define ULPI_READ             (0 << 29)
+#define ULPI_STATE_NORMAL     (1 << 27)
+#define ULPI_ADDR(n)          (((n) & 255) << 16)
+#define ULPI_DATA(n)          ((n) & 255)
+#define ULPI_DATA_READ(n)     (((n) >> 8) & 255)
+#define PORTSC_PTC           (0xF << 16)
+#define PORTSC_PTC_TST_PKT   (0x4 << 16)
+
+
+#endif

index e449cd7..8321447 100644
@@ -35,6 +35,8 @@
 #include <usb/pxa27x_udc.h>
 #elif defined(CONFIG_SPEAR3XX) || defined(CONFIG_SPEAR600)
 #include <usb/spr_udc.h>
+#elif defined(CONFIG_MSM_UDC)
+#include <usb/msm_udc.h>
 #endif
 
 #include <version.h>

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index 5aa6be0..e334a6f 100644
@@ -36,8 +36,12 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN           (4 * 1024)	/* 4KB  */
-#define CONFIG_MSM7630
+#define CONFIG_SYS_MALLOC_LEN           (4 * 1024)     /* 4KB  */
+
+/* Enable USB */
+#define CONFIG_MSM_UDC
+#define CONFIG_USB_TTY
+#define CONFIG_USB_DEVICE
 
 /*
  * select serial console configuration

@@ -62,8 +66,9 @@
 #undef CONFIG_SYS_MAX_FLASH_SECT
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"console=ttyS0,115200n8\0" \
+	"usbtty=cdc_acm\0"
 
-#define CONFIG_BOOTDELAY        2	/* -1 to disable auto boot */
+#define CONFIG_BOOTDELAY	-1	/* -1 to disable auto boot */
 
 /*
  * Miscellaneous configurable options

@@ -101,6 +106,7 @@
  * IRQ Settings
  */
 
+#define CONFIG_USE_IRQ
 #define CONFIG_STACKSIZE_IRQ    (4*1024)	/* IRQ stack */
 #define CONFIG_STACKSIZE_FIQ    (4*1024)	/* FIQ stack */
 

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index 9dcf95b..9ca6843 100644
@@ -147,7 +147,7 @@ int board_mmc_init(bd_t *bis)
 	mmc_2->init = qc_board_mmc_init;
 	mmc_2->voltages = MMC_VDD_29_30|MMC_VDD_165_195;
 	mmc_2->host_caps = MMC_MODE_4BIT|MMC_MODE_HS|MMC_MODE_8BIT|
-					MMC_MODE_HS_52MHz;
+					MMC_MODE_HS_52MHz|MMC_MODE_HC;
 	mmc_2->f_min = MMC_CLK_400KHZ;
 	mmc_2->f_max = MMC_CLK_48MHZ;
 	sprintf(mmc_2->name, "Internal_Card");