powerpc/85xx: minor clean-ups to the P2020DS board header file

index f0eb029..183d70a 100644
@@ -128,7 +128,6 @@
 #else
 #define CONFIG_FSL_DDR3		1
 #endif
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 /* ECC will be enabled based on perf_mode environment variable */
 /* #define	CONFIG_DDR_ECC */

@@ -207,8 +206,6 @@
  *
  */
 
-#undef CONFIG_CLOCKS_IN_MHZ
-
 /*
  * Memory map
  *

@@ -251,7 +248,6 @@
 
 #define CONFIG_SYS_MAX_FLASH_BANKS	2		/* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	1024		/* sectors per device */
-#undef	CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT	60000		/* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT	500		/* Flash Write Timeout (ms) */
 

@@ -373,7 +369,7 @@
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
 
 #define CONFIG_SYS_BAUDRATE_TABLE	\
-	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 
 #define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CCSRBAR+0x4500)
 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)

@@ -394,7 +390,6 @@
 /* I2C */
 #define CONFIG_FSL_I2C		/* Use FSL common I2C driver */
 #define CONFIG_HARD_I2C		/* I2C with hardware support */
-#undef	CONFIG_SOFT_I2C		/* I2C bit-banged */
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x57

@@ -529,17 +524,6 @@
 #define CONFIG_SYS_SRIO2_MEM_SIZE	0x20000000	/* 512M */
 
 #define CONFIG_PCI_PNP			/* do pci plug-and-play */
-
-#undef CONFIG_EEPRO100
-#undef CONFIG_TULIP
-#define CONFIG_RTL8139
-
-#ifndef CONFIG_PCI_PNP
-	#define PCI_ENET0_IOADDR	CONFIG_SYS_PCIE3_IO_BUS
-	#define PCI_ENET0_MEMADDR	CONFIG_SYS_PCIE3_IO_BUS
-	#define PCI_IDSEL_NUMBER	0x11	/* IDSEL = AD11 */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
 #define CONFIG_DOS_PARTITION
 #define CONFIG_SCSI_AHCI

@@ -566,7 +550,6 @@
 #define CONFIG_TSEC3	1
 #define CONFIG_TSEC3_NAME	"eTSEC3"
 
-#define CONFIG_PIXIS_SGMII_CMD
 #define CONFIG_FSL_SGMII_RISER	1
 #define SGMII_RISER_PHY_OFFSET	0x1b
 

@@ -655,8 +638,6 @@
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
-#undef CONFIG_WATCHDOG			/* watchdog disabled */
-
 /*
  * SDHC/MMC
  */

@@ -732,7 +713,6 @@
 #define CONFIG_LOADADDR		1000000
 
 #define CONFIG_BOOTDELAY 10	/* -1 disables auto-boot */
-#undef  CONFIG_BOOTARGS		/* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE	115200
 

index 8a55fde..6ddf816 100644
@@ -37,31 +37,33 @@
  * ... update that Ethernet node's phy-handle property to point to the
  * ethernet-phy node.  This is how we link an Ethernet node to its PHY, so each
  * PHY in a virtual MDIO node must have an alias.
+ *
+ * Returns 0 on success, or a negative FDT error code on error.
  */
-void fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,
+int fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,
 			const char *alias)
 {
-	int offset, ph;
+	int offset;
+	unsigned int ph;
 	const char *path;
 
 	/* Get a path to the node that 'alias' points to */
 	path = fdt_get_alias(fdt, alias);
-	if (path) {
-		/* Get the offset of that node */
-		int off = fdt_path_offset(fdt, path);
-		if (off > 0)
-			ph = fdt_create_phandle(fdt, off);
-		else
-			return;
-	} else {
-		return ;
-	}
+	if (!path)
+		return -FDT_ERR_BADPATH;
+
+	/* Get the offset of that node */
+	offset = fdt_path_offset(fdt, path);
+	if (offset < 0)
+		return offset;
 
-	/* failed to create a phandle */
-	if (ph <= 0)
-		return ;
+	ph = fdt_create_phandle(fdt, offset);
+	if (!ph)
+		return -FDT_ERR_BADPHANDLE;
 
 	offset = fdt_node_offset_by_compat_reg(fdt, compat, addr);
-	if (offset > 0)
-		fdt_setprop(fdt, offset, "phy-handle", &ph, sizeof(ph));
+	if (offset < 0)
+		return offset;
+
+	return fdt_setprop(fdt, offset, "phy-handle", &ph, sizeof(ph));
 }

index 19ef7c4..d39ef08 100644
@@ -20,7 +20,7 @@
 #ifndef __FMAN_BOARD_HELPER__
 #define __FMAN_BOARD_HELPER__
 
-void fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,
+int fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,
 			const char *alias);
 
 #endif

index 70d751d..9d2f8ea 100644
@@ -488,35 +488,30 @@
 #define CONFIG_LOADADDR		1000000
 
 #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
-#define CONFIG_BOOTARGS
 
 #define CONFIG_BAUDRATE	115200
 
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"perf_mode=stable\0"						\
-	"memctl_intlv_ctl=2\0"						\
-	"netdev=eth0\0"							\
-	"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0"				\
-	"tftpflash=tftpboot $loadaddr $uboot; "				\
-		"protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "	\
-		"erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "		\
-		"cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; "	\
-		"protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "		\
-		"cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0"	\
-	"consoledev=ttyS0\0"						\
-	"ramdiskaddr=2000000\0"						\
-	"ramdiskfile=uramdisk\0"  		      	        	\
-	"fdtaddr=c00000\0"	  			      		\
-	"fdtfile=p1022ds.dtb\0"	  					\
-	"bdev=sda3\0"		  			      		\
-	"diuregs=md e002c000 1d\0"			 		\
-	"dium=mw e002c01c\0" 						\
-	"diuerr=md e002c014 1\0" 					\
+#define	CONFIG_EXTRA_ENV_SETTINGS				\
+	"netdev=eth0\0"						\
+	"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0"			\
+	"ubootaddr=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0"		\
+	"tftpflash=tftpboot $loadaddr $uboot && "		\
+		"protect off $ubootaddr +$filesize && "		\
+		"erase $ubootaddr +$filesize && "		\
+		"cp.b $loadaddr $ubootaddr $filesize && "	\
+		"protect on $ubootaddr +$filesize && "		\
+		"cmp.b $loadaddr $ubootaddr $filesize\0"	\
+	"consoledev=ttyS0\0"					\
+	"ramdiskaddr=2000000\0"					\
+	"ramdiskfile=rootfs.ext2.gz.uboot\0"			\
+	"fdtaddr=c00000\0"	  			      	\
+	"fdtfile=p1022ds.dtb\0"	  				\
+	"bdev=sda3\0"		  			      	\
 	"hwconfig=esdhc;audclk:12\0"
 
 #define CONFIG_HDBOOT					\
 	"setenv bootargs root=/dev/$bdev rw "		\
-	"console=$consoledev,$baudrate $othbootargs;"	\
+	"console=$consoledev,$baudrate $othbootargs $videobootargs;"	\
 	"tftp $loadaddr $bootfile;"			\
 	"tftp $fdtaddr $fdtfile;"			\
 	"bootm $loadaddr - $fdtaddr"

@@ -525,14 +520,14 @@
 	"setenv bootargs root=/dev/nfs rw "				\
 	"nfsroot=$serverip:$rootpath "					\
 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
-	"console=$consoledev,$baudrate $othbootargs;"			\
+	"console=$consoledev,$baudrate $othbootargs $videobootargs;"	\
 	"tftp $loadaddr $bootfile;"					\
 	"tftp $fdtaddr $fdtfile;"					\
 	"bootm $loadaddr - $fdtaddr"
 
 #define CONFIG_RAMBOOTCOMMAND						\
 	"setenv bootargs root=/dev/ram rw "				\
-	"console=$consoledev,$baudrate $othbootargs;"			\
+	"console=$consoledev,$baudrate $othbootargs $videobootargs;"	\
 	"tftp $ramdiskaddr $ramdiskfile;"				\
 	"tftp $loadaddr $bootfile;"					\
 	"tftp $fdtaddr $fdtfile;"					\

index 56ac9fe..6b52a94 100644
@@ -295,7 +295,7 @@ static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
 {
 #ifdef CONFIG_ADDR_MAP
-	return (void *)(addrmap_phys_to_virt(paddr));
+	return addrmap_phys_to_virt(paddr);
 #else
 	return (void *)((unsigned long)paddr);
 #endif

index d55f5f6..36da256 100644
@@ -22,7 +22,7 @@
 #include <asm/types.h>
 
 extern phys_addr_t addrmap_virt_to_phys(void *vaddr);
-extern unsigned long addrmap_phys_to_virt(phys_addr_t paddr);
+void *addrmap_phys_to_virt(phys_addr_t paddr);
 extern void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr,
 				phys_size_t size, int idx);
 

index ff8532c..31384d1 100644
@@ -47,26 +47,29 @@ phys_addr_t addrmap_virt_to_phys(void * vaddr)
 	return (phys_addr_t)(~0);
 }
 
-unsigned long addrmap_phys_to_virt(phys_addr_t paddr)
+void *addrmap_phys_to_virt(phys_addr_t paddr)
 {
 	int i;
 
 	for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++) {
-		u64 base, upper, addr;
+		phys_addr_t base, upper;
 
 		if (address_map[i].size == 0)
 			continue;
 
-		addr = (u64)paddr;
-		base = (u64)(address_map[i].paddr);
-		upper = (u64)(address_map[i].size) + base - 1;
+		base = address_map[i].paddr;
+		upper = address_map[i].size + base - 1;
 
-		if (addr >= base && addr <= upper) {
-			return paddr - address_map[i].paddr + address_map[i].vaddr;
+		if (paddr >= base && paddr <= upper) {
+			phys_addr_t offset;
+
+			offset = address_map[i].paddr - address_map[i].vaddr;
+
+			return (void *)(unsigned long)(paddr - offset);
 		}
 	}
 
-	return (unsigned long)(~0);
+	return (void *)(~0);
 }
 
 void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr,

index e1ccdd8..9637682 100644
@@ -595,11 +595,33 @@ ulong getenv_ulong(const char *name, int base, ulong default_val)
 }
 
 #if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+
+static int __board_start_saveenv(void)
+{
+	return 0;
+}
+int board_start_saveenv(void) __attribute__((weak, alias("__board_start_saveenv")));
+
+static void __board_finish_saveenv(void)
+{
+}
+void board_finish_saveenv(void) __attribute__((weak, alias("__board_finish_saveenv")));
+
 int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
+	int ret;
+
 	printf("Saving Environment to %s...\n", env_name_spec);
 
-	return saveenv() ? 1 : 0;
+	ret = board_start_saveenv();
+	if (ret)
+		return 0;
+
+	ret = saveenv() ? 1 : 0;
+
+	board_finish_saveenv();
+
+	return ret;
 }
 
 U_BOOT_CMD(

index d5428ea..1dd0e1f 100644
@@ -147,10 +147,7 @@ int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
  *
  * On the Freescale P1022, the DIU video signal and the LBC address/data lines
  * share the same pins, which means that when the DIU is active (e.g. the
- * console is on the DVI display), NOR flash cannot be accessed.  So we use the
- * weak accessor feature of the CFI flash code to temporarily switch the pin
- * mux from DIU to LBC whenever we want to read or write flash.  This has a
- * significant performance penalty, but it's the only way to make it work.
+ * console is on the DVI display), NOR flash cannot be accessed.
  *
  * There are two muxes: one on the chip, and one on the board. The chip mux
  * controls whether the pins are used for the DIU or the LBC, and it is

@@ -213,6 +210,33 @@ static void set_mux_to_diu(void)
 }
 
 /*
+ * While the DIU is active, the localbus is not available.  Therefore, in
+ * order to support the saveenv command, we need to temporarily disable the
+ * DIU and enable the localbus.  To do this, we provide our own
+ * implementations of the board_start_saveenv() and board_finish_saveenv()
+ * weak functions.  These functions are called by do_env_save() before and
+ * after the environment is saved.
+ */
+
+/* Remember if we switched the MUX, so that we know to switch it back */
+static int switched;
+
+int board_start_saveenv(void)
+{
+	switched = set_mux_to_lbc();
+
+	return 0;
+}
+
+void board_finish_saveenv(void)
+{
+	if (switched)
+		set_mux_to_diu();
+
+	switched = 0;
+}
+
+/*
  * pixis_read - board-specific function to read from the PIXIS
  *
  * This function overrides the generic pixis_read() function, so that it can

@@ -271,144 +295,3 @@ void pixis_bank_reset(void)
 
 	while (1);
 }
-
-#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
-
-void flash_write8(u8 value, void *addr)
-{
-	int sw = set_mux_to_lbc();
-
-	__raw_writeb(value, addr);
-	if (sw) {
-		/*
-		 * To ensure the post-write is completed to eLBC, software must
-		 * perform a dummy read from one valid address from eLBC space
-		 * before changing the eLBC_DIU from NOR mode to DIU mode.
-		 * set_mux_to_diu() includes a sync that will ensure the
-		 * __raw_readb() completes before it switches the mux.
-		 */
-		__raw_readb(addr);
-		set_mux_to_diu();
-	}
-}
-
-void flash_write16(u16 value, void *addr)
-{
-	int sw = set_mux_to_lbc();
-
-	__raw_writew(value, addr);
-	if (sw) {
-		/*
-		 * To ensure the post-write is completed to eLBC, software must
-		 * perform a dummy read from one valid address from eLBC space
-		 * before changing the eLBC_DIU from NOR mode to DIU mode.
-		 * set_mux_to_diu() includes a sync that will ensure the
-		 * __raw_readb() completes before it switches the mux.
-		 */
-		__raw_readb(addr);
-		set_mux_to_diu();
-	}
-}
-
-void flash_write32(u32 value, void *addr)
-{
-	int sw = set_mux_to_lbc();
-
-	__raw_writel(value, addr);
-	if (sw) {
-		/*
-		 * To ensure the post-write is completed to eLBC, software must
-		 * perform a dummy read from one valid address from eLBC space
-		 * before changing the eLBC_DIU from NOR mode to DIU mode.
-		 * set_mux_to_diu() includes a sync that will ensure the
-		 * __raw_readb() completes before it switches the mux.
-		 */
-		__raw_readb(addr);
-		set_mux_to_diu();
-	}
-}
-
-void flash_write64(u64 value, void *addr)
-{
-	int sw = set_mux_to_lbc();
-	uint32_t *p = addr;
-
-	/*
-	 * There is no __raw_writeq(), so do the write manually.  We don't trust
-	 * the compiler, so we use inline assembly.
-	 */
-	__asm__ __volatile__(
-		"stw%U0%X0 %2,%0;\n"
-		"stw%U1%X1 %3,%1;\n"
-		: "=m" (*p), "=m" (*(p + 1))
-		: "r" ((uint32_t) (value >> 32)), "r" ((uint32_t) (value)));
-
-	if (sw) {
-		/*
-		 * To ensure the post-write is completed to eLBC, software must
-		 * perform a dummy read from one valid address from eLBC space
-		 * before changing the eLBC_DIU from NOR mode to DIU mode.  We
-		 * read addr+4 because we just wrote to addr+4, so that's how we
-		 * maintain execution order.  set_mux_to_diu() includes a sync
-		 * that will ensure the __raw_readb() completes before it
-		 * switches the mux.
-		 */
-		__raw_readb(addr + 4);
-		set_mux_to_diu();
-	}
-}
-
-u8 flash_read8(void *addr)
-{
-	u8 ret;
-
-	int sw = set_mux_to_lbc();
-
-	ret = __raw_readb(addr);
-	if (sw)
-		set_mux_to_diu();
-
-	return ret;
-}
-
-u16 flash_read16(void *addr)
-{
-	u16 ret;
-
-	int sw = set_mux_to_lbc();
-
-	ret = __raw_readw(addr);
-	if (sw)
-		set_mux_to_diu();
-
-	return ret;
-}
-
-u32 flash_read32(void *addr)
-{
-	u32 ret;
-
-	int sw = set_mux_to_lbc();
-
-	ret = __raw_readl(addr);
-	if (sw)
-		set_mux_to_diu();
-
-	return ret;
-}
-
-u64 flash_read64(void *addr)
-{
-	u64 ret;
-
-	int sw = set_mux_to_lbc();
-
-	/* There is no __raw_readq(), so do the read manually */
-	ret = *(volatile u64 *)addr;
-	if (sw)
-		set_mux_to_diu();
-
-	return ret;
-}
-
-#endif

index 9d2f8ea..89e8663 100644
@@ -206,12 +206,6 @@
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
-/*
- * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so
- * disable empty flash sector detection, which is I/O-intensive.
- */
-#undef CONFIG_SYS_FLASH_EMPTY_INFO
 #endif
 
 #ifndef CONFIG_FSL_DIU_FB