ARM: davinci: add support for the am1808 based enbw_cmc board

Add a function to initialize the Common Platform Interrupt Controller (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.

Signed-off-by Heiko Schocher <[email protected]>

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc Grant Likely <[email protected]>

Cc Sekhar Nori <[email protected]>

Cc Wolfgang Denk <[email protected]>

Cc Sergei Shtylyov <[email protected]>

---
- changes for v2:
- add comment from Grant Likely:
- migrate the whole interrupt controller to natively use an irq_domain. Rebased complete patchserie to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
Author: Grant Likely <[email protected]>
Date: Fri Jan 27 06:44:34 2012 -0700

irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case the name of the init function (it calls the "new" __cp_intc_init() function, which was the "old" cp_intc_init()). Through this rework the changes for OF is better visible. As the OF case uses the irq_domain rework from Grant Likely, maybe the none OF case can use this also, but this should be tested on a hw ...
- rebased to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <[email protected]>
Date: Fri Feb 24 14:58:54 2012 -0700

mfd: twl-core: Add IRQ_DOMAIN dependency

 .../devicetree/bindings/arm/davinci/intc.txt       |   27 ++++++
 arch/arm/mach-davinci/cp_intc.c                    |   87 +++++++++++++++++--
 2 files changed, 104 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt

Documentation/devicetree/bindings/arm/davinci/intc.txt new file +27 -0

new file mode 100644
index 0000000..dfd6a560
@@ -0,0 +1,27 @@
+* TI Common Platform Interrupt Controller
+
+Common Platform Interrupt Controller (cp_intc) is used on
+OMAP-L1x SoCs and can support several configurable number
+of interrupts.
+
+Main node required properties:
+
+- compatible : should be:
+	"ti,cp_intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The type shall be a <u32> and the value shall be 1.
+
+  The cell contains the interrupt number in the range [0-128].
+- ti,intc-size: Number of interrupts handled by the interrupt controller.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+	intc: interrupt-controller at 1 {
+		compatible = "ti,cp_intc";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		ti,intc-size = <101>;
+		reg = <0xfffee000 0x2000>;
+	};

arch/arm/mach-davinci/cp_intc.c +48 -10

index f83152d..585114a 100644
@@ -9,9 +9,14 @@
  * kind, whether express or implied.
  */
 
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <mach/common.h>
 #include <mach/cp_intc.h>

@@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
 	.irq_set_wake	= cp_intc_set_wake,
 };
 
-void __init cp_intc_init(void)
+static struct irq_domain *cp_intc_domain;
+
+static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+			  irq_hw_number_t hw)
 {
-	unsigned long num_irq	= davinci_soc_info.intc_irq_num;
+	pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
+
+	irq_set_chip(virq, &cp_intc_irq_chip);
+	set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+	irq_set_handler(virq, handle_edge_irq);
+	return 0;
+}
+
+static const struct irq_domain_ops cp_intc_host_ops = {
+	.map = cp_intc_host_map,
+	.xlate = irq_domain_xlate_onetwocell,
+};
+
+int __init __cp_intc_init(struct device_node *node,
+		struct device_node *parent)
+{
+	u32 num_irq		= davinci_soc_info.intc_irq_num;
 	u8 *irq_prio		= davinci_soc_info.intc_irq_prios;
 	u32 *host_map		= davinci_soc_info.intc_host_map;
 	unsigned num_reg	= BITS_TO_LONGS(num_irq);
-	int i;
+	int i, irq_base;
 
 	davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
-	davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+	if (node) {
+		davinci_intc_base = of_iomap(node, 0);
+		if (of_property_read_u32(node, "ti,intc-size", &num_irq))
+			pr_warn("unable to get intc-size, default to %d\n",
+				num_irq);
+	} else {
+		davinci_intc_base = ioremap(davinci_soc_info.intc_base,
+					SZ_8K);
+	}
 	if (WARN_ON(!davinci_intc_base))
-		return;
+		return -EINVAL;
 
 	cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
 

@@ -165,13 +197,48 @@ void __init cp_intc_init(void)
 		for (i = 0; host_map[i] != -1; i++)
 			cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
 
-	/* Set up genirq dispatching for cp_intc */
-	for (i = 0; i < num_irq; i++) {
-		irq_set_chip(i, &cp_intc_irq_chip);
-		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-		irq_set_handler(i, handle_edge_irq);
+	if (node) {
+		irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+		if (irq_base < 0) {
+			pr_warn("Couldn't allocate IRQ numbers\n");
+			irq_base = 0;
+		}
+
+		/* create a legacy host */
+		cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+					irq_base, 0, &cp_intc_host_ops, NULL);
+		if (cp_intc_domain == NULL) {

arch/arm/mach-davinci/cp_intc.c +10 -0

 	}
 
 	/* Enable global interrupt */
 	cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id irq_match[] __initdata = {
+	{ .compatible = "ti,cp_intc", .data = __cp_intc_init, },
+	{ }
+};
+

Quoted 43 lines · Heiko Schocher

Add a function to initialize the Common Platform Interrupt Controller (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.

Signed-off-by Heiko Schocher <[email protected]>

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc Grant Likely <[email protected]>

Cc Sekhar Nori <[email protected]>

Cc Wolfgang Denk <[email protected]>

Cc Sergei Shtylyov <[email protected]>

---

arch/arm/mach-davinci/cp_intc.c +20 -5

@@ -165,13 +197,48 @@ void __init cp_intc_init(void)
 		for (i = 0; host_map[i] != -1; i++)
 			cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
 
-	/* Set up genirq dispatching for cp_intc */
-	for (i = 0; i < num_irq; i++) {
-		irq_set_chip(i, &cp_intc_irq_chip);
-		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-		irq_set_handler(i, handle_edge_irq);
+	if (node) {
+		irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+		if (irq_base < 0) {
+			pr_warn("Couldn't allocate IRQ numbers\n");
+			irq_base = 0;
+		}
+
+		/* create a legacy host */
+		cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+					irq_base, 0, &cp_intc_host_ops, NULL);
+		if (cp_intc_domain == NULL) {
+			pr_err("CP INTC: failed to allocate irq host!\n");
+			return -EINVAL;
+		}
+	} else {
+		/* Set up genirq dispatching for cp_intc */
+		for (i = 0; i < num_irq; i++) {
+			irq_set_chip(i, &cp_intc_irq_chip);
+			set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+			irq_set_handler(i, handle_edge_irq);

Review void __init cp_intc_init(void) · line 220

Quoted 1 line

(quoted diff) +1 -0

+		}

No need for the if/else clause here. irq_domain should be used for both DT and non-DT. It makes the code a lot simpler that way. The only difference I would suggest is to call irq_domain_add_linear() in the DT case instead of irq_domain_add_legacy()... and this is temporary too until I fix up the irq_domain code to better handle both static and dynamic mapping.

Add a function to initialize the Common Platform Interrupt Controller (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.

Signed-off-by Heiko Schocher <[email protected]>

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc Grant Likely <[email protected]>

Cc Sekhar Nori <[email protected]>

Cc Wolfgang Denk <[email protected]>

Cc Sergei Shtylyov <[email protected]>

---
- changes for v2:
- add comment from Grant Likely:
- migrate the whole interrupt controller to natively use an irq_domain. Rebased complete patchserie to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
Author: Grant Likely <[email protected]>
Date: Fri Jan 27 06:44:34 2012 -0700

irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"

- cp_intc_init() is now also for the of case the name of the init function (it calls the "new" __cp_intc_init() function, which was the "old" cp_intc_init()). Through this rework the changes for OF is better visible. As the OF case uses the irq_domain rework from Grant Likely, maybe the none OF case can use this also, but this should be tested on a hw ...
- rebased to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <[email protected]>
Date: Fri Feb 24 14:58:54 2012 -0700

mfd: twl-core: Add IRQ_DOMAIN dependency

 .../devicetree/bindings/arm/davinci/intc.txt       |   27 ++++++
 arch/arm/mach-davinci/cp_intc.c                    |   87 +++++++++++++++++--
 2 files changed, 104 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt

Documentation/devicetree/bindings/arm/davinci/intc.txt new file +3 -0

new file mode 100644
index 0000000..dfd6a560
@@ -0,0 +1,27 @@
+* TI Common Platform Interrupt Controller
+
+Common Platform Interrupt Controller (cp_intc) is used on

Documentation/devicetree/bindings/arm/davinci/intc.txt new file +14 -0

+
+  The cell contains the interrupt number in the range [0-128].
+- ti,intc-size: Number of interrupts handled by the interrupt controller.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+	intc: interrupt-controller at 1 {
+		compatible = "ti,cp_intc";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		ti,intc-size = <101>;
+		reg = <0xfffee000 0x2000>;
+	};

arch/arm/mach-davinci/cp_intc.c +48 -10

index f83152d..585114a 100644
@@ -9,9 +9,14 @@
  * kind, whether express or implied.
  */
 
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <mach/common.h>
 #include <mach/cp_intc.h>

@@ -99,18 +104,45 @@ static struct irq_chip cp_intc_irq_chip = {
 	.irq_set_wake	= cp_intc_set_wake,
 };
 
-void __init cp_intc_init(void)
+static struct irq_domain *cp_intc_domain;
+
+static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+			  irq_hw_number_t hw)
 {
-	unsigned long num_irq	= davinci_soc_info.intc_irq_num;
+	pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
+
+	irq_set_chip(virq, &cp_intc_irq_chip);
+	set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+	irq_set_handler(virq, handle_edge_irq);
+	return 0;
+}
+
+static const struct irq_domain_ops cp_intc_host_ops = {
+	.map = cp_intc_host_map,
+	.xlate = irq_domain_xlate_onetwocell,
+};
+
+int __init __cp_intc_init(struct device_node *node,
+		struct device_node *parent)
+{
+	u32 num_irq		= davinci_soc_info.intc_irq_num;
 	u8 *irq_prio		= davinci_soc_info.intc_irq_prios;
 	u32 *host_map		= davinci_soc_info.intc_host_map;
 	unsigned num_reg	= BITS_TO_LONGS(num_irq);
-	int i;
+	int i, irq_base;
 
 	davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
-	davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+	if (node) {
+		davinci_intc_base = of_iomap(node, 0);
+		if (of_property_read_u32(node, "ti,intc-size", &num_irq))
+			pr_warn("unable to get intc-size, default to %d\n",
+				num_irq);
+	} else {
+		davinci_intc_base = ioremap(davinci_soc_info.intc_base,
+					SZ_8K);
+	}
 	if (WARN_ON(!davinci_intc_base))
-		return;
+		return -EINVAL;
 
 	cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
 

@@ -165,13 +197,48 @@ void __init cp_intc_init(void)
 		for (i = 0; host_map[i] != -1; i++)
 			cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
 
-	/* Set up genirq dispatching for cp_intc */
-	for (i = 0; i < num_irq; i++) {
-		irq_set_chip(i, &cp_intc_irq_chip);
-		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-		irq_set_handler(i, handle_edge_irq);
+	if (node) {
+		irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+		if (irq_base < 0) {
+			pr_warn("Couldn't allocate IRQ numbers\n");
+			irq_base = 0;
+		}
+
+		/* create a legacy host */
+		cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+					irq_base, 0, &cp_intc_host_ops, NULL);
+		if (cp_intc_domain == NULL) {

arch/arm/mach-davinci/cp_intc.c +10 -0

 	}
 
 	/* Enable global interrupt */
 	cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id irq_match[] __initdata = {
+	{ .compatible = "ti,cp_intc", .data = __cp_intc_init, },
+	{ }
+};
+

Quoted 23 lines

Add a function to initialize the Common Platform Interrupt Controller (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.

Signed-off-by Heiko Schocher<[email protected]>

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc Grant Likely<[email protected]>

Cc Sekhar Nori<[email protected]>

Cc Wolfgang Denk<[email protected]>

Cc Sergei Shtylyov<[email protected]>

---
- changes for v2:
- add comment from Grant Likely:
- migrate the whole interrupt controller to natively use an irq_domain. Rebased complete patchserie to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
Author: Grant Likely<[email protected]>
Date: Fri Jan 27 06:44:34 2012 -0700

Quoted 4 lines

irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"

Nit: DT preference is to use '-' instead of '_'

Quoted 6 lines

Documentation/devicetree/bindings/arm/davinci/intc.txt new file +0 -0

new file mode 100644
index 0000000..dfd6a560
@@ -0,0 +1,27 @@

Documentation/devicetree/bindings/arm/davinci/intc.txt

Quoted 5 lines

+- compatible : should be:

Documentation/devicetree/bindings/arm/davinci/intc.txt new file +4 -0

+	"ti,cp_intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The type shall be a<u32>  and the value shall be 1.

Is there any configuration for irq inputs (edge/level) or are they fixed mode? If configurable, then you'll want another cell for flags.

Quoted 5 lines

arch/arm/mach-davinci/cp_intc.c +0 -0

index f83152d..585114a 100644
@@ -9,9 +9,14 @@

Quoted 10 lines

arch/arm/mach-davinci/cp_intc.c +10 -0

+		/* create a legacy host */
+		cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+					irq_base, 0,&cp_intc_host_ops, NULL);
+		if (cp_intc_domain == NULL) {
+			pr_err("CP INTC: failed to allocate irq host!\n");
+			return -EINVAL;
+		}
+	} else {
+		/* Set up genirq dispatching for cp_intc */
+		for (i = 0; i<  num_irq; i++) {

arch/arm/mach-davinci/cp_intc.c void __init cp_intc_init(void) · line 220

Quoted 4 lines

arch/arm/mach-davinci/cp_intc.c +4 -0

+			irq_set_chip(i,&cp_intc_irq_chip);
+			set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+			irq_set_handler(i, handle_edge_irq);
+		}

Instead of the else clause here, even the non-DT mode should still call irq_domain_add. irq_domain is not just for DT. It gets the driver away from manually managing its irq mappings.

Quoted 21 lines

  	/* Enable global interrupt */
  	cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);

arch/arm/mach-davinci/cp_intc.c +18 -0

+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id irq_match[] __initdata = {
+	{ .compatible = "ti,cp_intc", .data = __cp_intc_init, },
+	{ }
+};
+
+void __init cp_intc_init(void)
+{
+	of_irq_init(irq_match);
+}
+#else
+void __init cp_intc_init(void)
+{
+	__cp_intc_init(NULL, NULL);
  }

Quoted 1 line

+#endif

Nack on this hunk because it means you have either a DT kernel or a non-DT kernel. Turning on CONFIG_OF must not break booting on a non-DT platform. This is a policy decision to improve test coverage. Instead the init hook should check at runtime if a DT is available, and if it is call of_irq_init. Otherwise call __cp_initc_init() directly.

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +36 -0

+- reg: Offset and length of the register set for the device
+- ti,davinci-ctrl-reg-offset: offset to control register
+- ti,davinci-ctrl-mod-reg-offset: offset to control module register
+- ti,davinci-ctrl-ram-offset: offset to control module ram
+- ti,davinci-ctrl-ram-size: size of control module ram
+- ti,davinci-rmii-en: use RMII
+- ti,davinci-no-bd-ram: has the emac controller BD RAM
+- phy-handle: Contains a phandle to an Ethernet PHY.
+              if not, davinci_emac driver defaults to 100/FULL
+- interrupts: interrupt mapping for the davinci emac interrupts sources:
+              4 sources: <Receive Threshold Interrupt
+			  Receive Interrupt
+			  Transmit Interrupt
+			  Miscellaneous Interrupt>
+- pinmux-handle: Contains a handle to configure the pinmux settings.
+
+Optional properties:
+- local-mac-address : 6 bytes, mac address
+
+Example (enbw_cmc board):
+	eth0: emac at 1e20000 {
+		compatible = "ti,davinci-dm6460-emac";
+		reg = <0x220000 0x4000>;
+		ti,davinci-ctrl-reg-offset = <0x3000>;
+		ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+		ti,davinci-ctrl-ram-offset = <0>;
+		ti,davinci-ctrl-ram-size = <0x2000>;
+		local-mac-address = [ 00 00 00 00 00 00 ];
+		interrupts = <33
+				34
+				35
+				36
+				>;
+		interrupt-parent = <&intc>;
+		pinmux-handle = <&emac_pins>;
+	};

drivers/net/ethernet/ti/davinci_emac.c +17 -0

index 4fa0bcb..56e1c35 100644
@@ -58,6 +58,12 @@
 #include <linux/io.h>
 #include <linux/uaccess.h>
 #include <linux/davinci_emac.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+
+#include <mach/mux.h>
 
 #include <asm/irq.h>
 #include <asm/page.h>

@@ -339,6 +345,9 @@ struct emac_priv {
 	u32 rx_addr_type;
 	atomic_t cur_tx;
 	const char *phy_id;
+#ifdef CONFIG_OF
+	struct device_node *phy_node;
+#endif
 	struct phy_device *phydev;
 	spinlock_t lock;
 	/*platform specific members*/

@@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
 #endif
 };
 
+#ifdef CONFIG_OF
+static struct emac_platform_data
+	*davinci_emac_of_get_pdata(struct platform_device *pdev,
+	struct emac_priv *priv)
+{
+	struct device_node *np;
+	struct device_node *pinmux_np;
+	struct emac_platform_data *pdata = NULL;

drivers/net/ethernet/ti/davinci_emac.c +35 -0

+
+	pdata = pdev->dev.platform_data;
+	if (!pdata) {
+		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+		if (!pdata)
+			goto nodata;
+	}
+	pdata->version = version;
+
+	mac_addr = of_get_mac_address(np);
+	if (mac_addr)
+		memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
+	if (!ret)
+		pdata->ctrl_reg_offset = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
+		&data);
+	if (!ret)
+		pdata->ctrl_mod_reg_offset = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
+	if (!ret)
+		pdata->ctrl_ram_offset = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
+	if (!ret)
+		pdata->ctrl_ram_size = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
+	if (!ret)
+		pdata->rmii_en = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);

drivers/net/ethernet/ti/davinci_emac.c +14 -1

+
+	pdev->dev.platform_data = pdata;
+nodata:
+	return  pdata;
+}
+#else
+static struct emac_platform_data
+	*davinci_emac_of_get_pdata(struct platform_device *pdev,
+	struct emac_priv *priv)
+{
+	return  pdev->dev.platform_data;
+}
+#endif
 /**
  * davinci_emac_probe: EMAC device probe
  * @pdev: The DaVinci EMAC device that we are removing

@@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
 
 	spin_lock_init(&priv->lock);
 
-	pdata = pdev->dev.platform_data;
+	pdata = davinci_emac_of_get_pdata(pdev, priv);
 	if (!pdata) {
 		dev_err(&pdev->dev, "no platform data\n");
 		rc = -ENODEV;

Hi Heiko,

Quoted 35 lines · Heiko Schocher

add of support for the davinci_emac driver.

Signed-off-by Heiko Schocher <[email protected]>

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc netdev at vger.kernel.org

Cc Grant Likely <[email protected]>

Cc Sekhar Nori <[email protected]>

Cc Wolfgang Denk <[email protected]>

Cc Anatoly Sivov <[email protected]>

---
- changes for v2:
- add comment from Anatoly Sivov
- fix typo in davinci_emac.txt
- add comment from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- use devm_kzalloc()
- use of_match_ptr()
- document all new properties
- remove of_address_to_resource() and do not overwrite resource table
- whitespace fixes
- remove hw_ram_addr as it is not used in current board code
- no changes for v3

 .../bindings/arm/davinci/davinci_emac.txt          |   43 +++++++++
 drivers/net/ethernet/ti/davinci_emac.c             |   94 +++++++++++++++++++-
 2 files changed, 136 insertions(+), 1 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt

Quoted 5 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +0 -0

new file mode 100644
index 0000000..a7b0911

Since DaVinci EMAC driver may be used on platforms other than DaVinci (c6x, OMAP), can we place the bindings documentation in bindings/net/?

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt line 4

Quoted 5 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +4 -0

@@ -0,0 +1,43 @@
+* Texas Instruments Davinci EMAC
+
+This file provides information, what the device node
+for the davinci_emac interface contain.

s/contain/contains

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt line 7

Quoted 3 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +3 -0

+
+Required properties:
+- compatible: "ti,davinci-dm6460-emac";

There is no device called dm6460. If you intend to only support "version 2" of the EMAC IP at this time, you can use dm6467
(http://www.ti.com/product/tms320dm6467)

Quoted 7 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +7 -0

+- reg: Offset and length of the register set for the device
+- ti,davinci-ctrl-reg-offset: offset to control register
+- ti,davinci-ctrl-mod-reg-offset: offset to control module register
+- ti,davinci-ctrl-ram-offset: offset to control module ram
+- ti,davinci-ctrl-ram-size: size of control module ram
+- ti,davinci-rmii-en: use RMII
+- ti,davinci-no-bd-ram: has the emac controller BD RAM

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt line 22

Quoted 8 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +8 -0

+- phy-handle: Contains a phandle to an Ethernet PHY.
+              if not, davinci_emac driver defaults to 100/FULL
+- interrupts: interrupt mapping for the davinci emac interrupts sources:
+              4 sources: <Receive Threshold Interrupt
+			  Receive Interrupt
+			  Transmit Interrupt
+			  Miscellaneous Interrupt>
+- pinmux-handle: Contains a handle to configure the pinmux settings.

Quoted 12 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +12 -0

+
+Optional properties:
+- local-mac-address : 6 bytes, mac address
+
+Example (enbw_cmc board):
+	eth0: emac at 1e20000 {
+		compatible = "ti,davinci-dm6460-emac";
+		reg = <0x220000 0x4000>;
+		ti,davinci-ctrl-reg-offset = <0x3000>;
+		ti,davinci-ctrl-mod-reg-offset = <0x2000>;
+		ti,davinci-ctrl-ram-offset = <0>;
+		ti,davinci-ctrl-ram-size = <0x2000>;

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt line 42

Quoted 8 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +8 -0

+		local-mac-address = [ 00 00 00 00 00 00 ];
+		interrupts = <33
+				34
+				35
+				36
+				>;
+		interrupt-parent = <&intc>;
+		pinmux-handle = <&emac_pins>;

Quoted 44 lines

Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt new file +1 -0

+	};

drivers/net/ethernet/ti/davinci_emac.c +21 -0

index 4fa0bcb..56e1c35 100644
@@ -58,6 +58,12 @@
 #include <linux/io.h>
 #include <linux/uaccess.h>
 #include <linux/davinci_emac.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+
+#include <mach/mux.h>
 
 #include <asm/irq.h>
 #include <asm/page.h>

@@ -339,6 +345,9 @@ struct emac_priv {
 	u32 rx_addr_type;
 	atomic_t cur_tx;
 	const char *phy_id;
+#ifdef CONFIG_OF
+	struct device_node *phy_node;
+#endif
 	struct phy_device *phydev;
 	spinlock_t lock;
 	/*platform specific members*/

@@ -1760,6 +1769,82 @@ static const struct net_device_ops emac_netdev_ops = {
 #endif
 };
 
+#ifdef CONFIG_OF
+static struct emac_platform_data
+	*davinci_emac_of_get_pdata(struct platform_device *pdev,
+	struct emac_priv *priv)
+{
+	struct device_node *np;
+	struct device_node *pinmux_np;
+	struct emac_platform_data *pdata = NULL;
+	const u8 *mac_addr;
+	u32 data;
+	int ret;
+	int version;

drivers/net/ethernet/ti/davinci_emac.c static const struct net_device_ops emac_netdev_ops = { · line 1789

Quoted 6 lines

drivers/net/ethernet/ti/davinci_emac.c +6 -0

+
+	np = pdev->dev.of_node;
+	if (!np)
+		goto nodata;
+	else
+		version = EMAC_VERSION_2;

You could set pdata->version directly here.

Quoted 42 lines

drivers/net/ethernet/ti/davinci_emac.c +42 -0

+
+	pdata = pdev->dev.platform_data;
+	if (!pdata) {
+		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+		if (!pdata)
+			goto nodata;
+	}
+	pdata->version = version;
+
+	mac_addr = of_get_mac_address(np);
+	if (mac_addr)
+		memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-reg-offset", &data);
+	if (!ret)
+		pdata->ctrl_reg_offset = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-mod-reg-offset",
+		&data);
+	if (!ret)
+		pdata->ctrl_mod_reg_offset = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-offset", &data);
+	if (!ret)
+		pdata->ctrl_ram_offset = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-ctrl-ram-size", &data);
+	if (!ret)
+		pdata->ctrl_ram_size = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-rmii-en", &data);
+	if (!ret)
+		pdata->rmii_en = data;
+
+	ret = of_property_read_u32(np, "ti,davinci-no-bd-ram", &data);
+	if (!ret)
+		pdata->no_bd_ram = data;
+
+	priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
+	if (!priv->phy_node)
+		pdata->phy_id = "";
+

drivers/net/ethernet/ti/davinci_emac.c static const struct net_device_ops emac_netdev_ops = { · line 1834

Quoted 3 lines

drivers/net/ethernet/ti/davinci_emac.c +3 -0

+	pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
+	if (pinmux_np)
+		davinci_cfg_reg_of(pinmux_np);

This is a DaVinci specific pinmux function and this driver can be used in non-DaVinci platforms like C6x and OMAP. So, it will not be correct to call a DaVinci specific function here.

Can you drop the pinmux from this patch for now? On DaVinci,

for pinmux, we need to migrate to drivers/pinctrl/ as well.

Doing this will also make this patch independent of the rest of this series can even be merged separately. Can you please make these changes and resend just this patch?

Quoted 29 lines

drivers/net/ethernet/ti/davinci_emac.c +14 -1

+
+	pdev->dev.platform_data = pdata;
+nodata:
+	return  pdata;
+}
+#else
+static struct emac_platform_data
+	*davinci_emac_of_get_pdata(struct platform_device *pdev,
+	struct emac_priv *priv)
+{
+	return  pdev->dev.platform_data;
+}
+#endif
 /**
  * davinci_emac_probe: EMAC device probe
  * @pdev: The DaVinci EMAC device that we are removing

@@ -1803,7 +1888,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
 
 	spin_lock_init(&priv->lock);
 
-	pdata = pdev->dev.platform_data;
+	pdata = davinci_emac_of_get_pdata(pdev, priv);
 	if (!pdata) {
 		dev_err(&pdev->dev, "no platform data\n");
 		rc = -ENODEV;

@@ -2013,6 +2098,12 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
 	.resume		= davinci_emac_resume,
 };
 

drivers/net/ethernet/ti/davinci_emac.c static const struct dev_pm_ops davinci_emac_pm_ops = { · line 2102

Quoted 2 lines

drivers/net/ethernet/ti/davinci_emac.c +2 -0

+static const struct of_device_id davinci_emac_of_match[] = {
+	{.compatible = "ti,davinci-dm6460-emac", },

This needs to be ti,davinci-dm6467-emac as well.

Quoted 14 lines · Sekhar

Quoted 12 lines · Heiko Schocher

drivers/net/ethernet/ti/davinci_emac.c +12 -0

+#ifdef CONFIG_OF
+static struct emac_platform_data
+	*davinci_emac_of_get_pdata(struct platform_device *pdev,
+	struct emac_priv *priv)
+{
+	struct device_node *np;
+	struct device_node *pinmux_np;
+	struct emac_platform_data *pdata = NULL;
+	const u8 *mac_addr;
+	u32 data;
+	int ret;
+	int version;

Quoted 8 lines

drivers/net/ethernet/ti/davinci_emac.c static const struct net_device_ops emac_netdev_ops = { · line 1789

Quoted 6 lines

drivers/net/ethernet/ti/davinci_emac.c +6 -0

+
+	np = pdev->dev.of_node;
+	if (!np)
+		goto nodata;
+	else
+		version = EMAC_VERSION_2;

You could set pdata->version directly here.

done.

Quoted 9 lines

drivers/net/ethernet/ti/davinci_emac.c static const struct net_device_ops emac_netdev_ops = { · line 1834

Quoted 4 lines

drivers/net/ethernet/ti/davinci_emac.c +4 -0

+
+	pinmux_np = of_parse_phandle(np, "pinmux-handle", 0);
+	if (pinmux_np)
+		davinci_cfg_reg_of(pinmux_np);

This is a DaVinci specific pinmux function and this driver can be used in non-DaVinci platforms like C6x and OMAP. So, it will not be correct to call a DaVinci specific function here.

Ah, right!

Quoted 1 line

Can you drop the pinmux from this patch for now? On DaVinci,

Done ... Hmm.. so I think, I should drop this for all patches from my patchset, right?

Quoted 2 lines

for pinmux, we need to migrate to drivers/pinctrl/ as well.

Ah, I see ... take a look at it, maybe I find time to do here something ... or do you know about work in progress here?

Quoted 4 lines

Doing this will also make this patch independent of the rest of this series can even be merged separately. Can you please make these changes and resend just this patch?

Yep, I do some test with the changes you requested and resend this patch ... do you prefer some tree, which I should use as base?

This patchserie add support for the davinci am1808 based enbw_cmc board.

Important: I rebased this patchserie against the irqdomain/next branch from grant likely, as he suggested to rework the OF intcontroller changes to the irqdomain work, branch found here:

http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next

git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <[email protected]>
Date: Fri Feb 24 14:58:54 2012 -0700

mfd: twl-core: Add IRQ_DOMAIN dependency

changes for v2:
Post this patchserie now as v2, as reworked in the comments I got for the RFC serie.

changes for v3:
- Interrupt Controller:
- comment from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case the name of the init function (it calls the "new" __cp_intc_init() function, which was the "old" cp_intc_init()). Through this rework the changes for OF is better visible. As the OF case uses the irq_domain rework from Grant Likely, maybe the none OF case can use this also, but this should be tested on a hw ...

Got no comments to the following points, I noted in the RFC series, so posting this patchseries with them:

- ARM: davinci: configure davinci aemif chipselects through OF not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which uses the davinci aemif, can call davinci_aemif_setup_timing_of()

This is just thought as an RFC ... The enbw_cmc board support not really need to setup this bus timings, as they are setup in U-Boot ... but I want to post this, as I think, it is a nice to have, and I am not really sure, if this has to be a MFD device (If so, all bus interfaces for other SoCs should be converted also to MFD devices) ... as an example how this can be used I add this to the davinci nand controller OF support patch, in this patchserie.

- ARM: davinci: mux: add OF support
I want to get rid of the pin setup code in board code ... This patch introduces a davinci_cfg_reg_of() function, which davinci drivers can call, if they found a "pinmux-handle", so used in the following drivers in this patchserie:

drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c

- post this board support with USB support, even though USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.

- MMC and USB are not using OF support yet, ideas how to port this are welcome. I need for USB and MMC board specific callbacks, how to solve this with OF support?

Signed-off-by Heiko Schocher <[email protected]>

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-mtd at lists.infradead.org

Cc linux-i2c at vger.kernel.org

Cc netdev at vger.kernel.org

Cc David Woodhouse <[email protected]>

Cc Ben Dooks <[email protected]>

Cc Wolfram Sang <[email protected]>

Cc Sekhar Nori <[email protected]>

Cc Kevin Hilman <[email protected]>

Cc Wolfgang Denk <[email protected]>

Cc Sergei Shtylyov <[email protected]>

Heiko Schocher (7):
ARM: davinci, intc: Add OF support for TI interrupt controller
ARM: davinci: configure davinci aemif chipselects through OF
ARM: davinci: mux: add OF support
ARM: davinci: net: davinci_emac: add OF support
ARM: davinci: i2c: add OF support
ARM: mtd: nand: davinci: add OF support for davinci nand controller
ARM: davinci: add support for the am1808 based enbw_cmc board

 .../devicetree/bindings/arm/davinci/aemif.txt      |  119 ++++++
 .../bindings/arm/davinci/davinci_emac.txt          |   43 +++
 .../devicetree/bindings/arm/davinci/i2c.txt        |   33 ++
 .../devicetree/bindings/arm/davinci/intc.txt       |   27 ++
 .../devicetree/bindings/arm/davinci/mux.txt        |   40 ++
 .../devicetree/bindings/arm/davinci/nand.txt       |   74 ++++
 arch/arm/boot/dts/enbw_cmc.dts                     |  268 ++++++++++++++
 arch/arm/configs/enbw_cmc_defconfig                |  123 +++++++
 arch/arm/mach-davinci/Kconfig                      |    9 +
 arch/arm/mach-davinci/Makefile                     |    1 +
 arch/arm/mach-davinci/aemif.c                      |   86 +++++-
 arch/arm/mach-davinci/board-enbw-cmc.c             |  380 ++++++++++++++++++++
 arch/arm/mach-davinci/cp_intc.c                    |   87 ++++-
 arch/arm/mach-davinci/include/mach/aemif.h         |    1 +
 arch/arm/mach-davinci/include/mach/mux.h           |    2 +
 arch/arm/mach-davinci/include/mach/uncompress.h    |    1 +
 arch/arm/mach-davinci/mux.c                        |   73 ++++-
 drivers/i2c/busses/i2c-davinci.c                   |   37 ++
 drivers/mtd/nand/davinci_nand.c                    |   85 +++++-
 drivers/net/ethernet/ti/davinci_emac.c             |   94 +++++-
 20 files changed, 1569 insertions(+), 14 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
 create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
 create mode 100644 arch/arm/configs/enbw_cmc_defconfig
 create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c

Hello,

this v3 patchset is now pending for more than 1 month without seeing comments for it. Are there no more issues?

Should I rebase it (if no further comments occur), as it is pending so long? (If so, against which tree?)

Thanks.

bye,
Heiko

Quoted 128 lines · Heiko Schocher

This patchserie add support for the davinci am1808 based enbw_cmc board.

Important: I rebased this patchserie against the irqdomain/next branch from grant likely, as he suggested to rework the OF intcontroller changes to the irqdomain work, branch found here:

http://git.secretlab.ca/?p=linux-2.6.git;a=shortlog;h=refs/heads/irqdomain/next

git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <[email protected]>
Date: Fri Feb 24 14:58:54 2012 -0700

mfd: twl-core: Add IRQ_DOMAIN dependency

changes for v2:
Post this patchserie now as v2, as reworked in the comments I got for the RFC serie.

changes for v3:
- Interrupt Controller:
- comment from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case the name of the init function (it calls the "new" __cp_intc_init() function, which was the "old" cp_intc_init()). Through this rework the changes for OF is better visible. As the OF case uses the irq_domain rework from Grant Likely, maybe the none OF case can use this also, but this should be tested on a hw ...

Got no comments to the following points, I noted in the RFC series, so posting this patchseries with them:

- ARM: davinci: configure davinci aemif chipselects through OF not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which uses the davinci aemif, can call davinci_aemif_setup_timing_of()

This is just thought as an RFC ... The enbw_cmc board support not really need to setup this bus timings, as they are setup in U-Boot ... but I want to post this, as I think, it is a nice to have, and I am not really sure, if this has to be a MFD device (If so, all bus interfaces for other SoCs should be converted also to MFD devices) ... as an example how this can be used I add this to the davinci nand controller OF support patch, in this patchserie.

- ARM: davinci: mux: add OF support
I want to get rid of the pin setup code in board code ... This patch introduces a davinci_cfg_reg_of() function, which davinci drivers can call, if they found a "pinmux-handle", so used in the following drivers in this patchserie:

drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c

- post this board support with USB support, even though USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.

- MMC and USB are not using OF support yet, ideas how to port this are welcome. I need for USB and MMC board specific callbacks, how to solve this with OF support?

Signed-off-by Heiko Schocher <[email protected]>

Cc linux-arm-kernel at lists.infradead.org

Cc devicetree-discuss at lists.ozlabs.org

Cc davinci-linux-open-source at linux.davincidsp.com

Cc linux-mtd at lists.infradead.org

Cc linux-i2c at vger.kernel.org

Cc netdev at vger.kernel.org

Cc David Woodhouse <[email protected]>

Cc Ben Dooks <[email protected]>

Cc Wolfram Sang <[email protected]>

Cc Sekhar Nori <[email protected]>

Cc Kevin Hilman <[email protected]>

Cc Wolfgang Denk <[email protected]>

Cc Sergei Shtylyov <[email protected]>

Heiko Schocher (7):
ARM: davinci, intc: Add OF support for TI interrupt controller
ARM: davinci: configure davinci aemif chipselects through OF
ARM: davinci: mux: add OF support
ARM: davinci: net: davinci_emac: add OF support
ARM: davinci: i2c: add OF support
ARM: mtd: nand: davinci: add OF support for davinci nand controller
ARM: davinci: add support for the am1808 based enbw_cmc board

 .../devicetree/bindings/arm/davinci/aemif.txt      |  119 ++++++
 .../bindings/arm/davinci/davinci_emac.txt          |   43 +++
 .../devicetree/bindings/arm/davinci/i2c.txt        |   33 ++
 .../devicetree/bindings/arm/davinci/intc.txt       |   27 ++
 .../devicetree/bindings/arm/davinci/mux.txt        |   40 ++
 .../devicetree/bindings/arm/davinci/nand.txt       |   74 ++++
 arch/arm/boot/dts/enbw_cmc.dts                     |  268 ++++++++++++++
 arch/arm/configs/enbw_cmc_defconfig                |  123 +++++++
 arch/arm/mach-davinci/Kconfig                      |    9 +
 arch/arm/mach-davinci/Makefile                     |    1 +
 arch/arm/mach-davinci/aemif.c                      |   86 +++++-
 arch/arm/mach-davinci/board-enbw-cmc.c             |  380 ++++++++++++++++++++
 arch/arm/mach-davinci/cp_intc.c                    |   87 ++++-
 arch/arm/mach-davinci/include/mach/aemif.h         |    1 +
 arch/arm/mach-davinci/include/mach/mux.h           |    2 +
 arch/arm/mach-davinci/include/mach/uncompress.h    |    1 +
 arch/arm/mach-davinci/mux.c                        |   73 ++++-
 drivers/i2c/busses/i2c-davinci.c                   |   37 ++
 drivers/mtd/nand/davinci_nand.c                    |   85 +++++-
 drivers/net/ethernet/ti/davinci_emac.c             |   94 +++++-
 20 files changed, 1569 insertions(+), 14 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/davinci_emac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/mux.txt
 create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
 create mode 100644 arch/arm/boot/dts/enbw_cmc.dts
 create mode 100644 arch/arm/configs/enbw_cmc_defconfig
 create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c