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Added watchdog support for davinchi_dm365evm

PATCH New Stijn Souffriau 3 participants 6 messages May 20, 2012 – Jul 19, 2012

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#0 lore raw

PATCH 1/1 Added watchdog support for davinchi_dm365evm

---
 board/davinci/dm365evm/dm365evm.c  |   68 ++++++++++++++++++++++++++++++++++++
 include/configs/davinci_dm365evm.h |   11 ++++++
 2 files changed, 79 insertions(+), 0 deletions(-)
board/davinci/dm365evm/dm365evm.c +68 -0
index ac54106..fb05019 100644
@@ -150,3 +150,71 @@ int board_mmc_init(bd_t *bis)
 	return err;
 }
 #endif
+
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+        (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/* WDTCR bit definitions */
+#define WDEN                    (1 << 14)
+#define WDFLAG                  (1 << 15)
+#define WDKEY_SEQ0              (0xa5c6 << 16)
+#define WDKEY_SEQ1              (0xda7e << 16)
+
+/* TCR bit definitions */
+#define ENAMODE12_DISABLED      (0 << 6)
+#define ENAMODE12_ONESHOT       (1 << 6)
+#define ENAMODE12_PERIODIC      (2 << 6)
+
+/* TGCR bit definitions */
+#define TIM12RS_UNRESET         (1 << 0)
+#define TIM34RS_UNRESET         (1 << 1)
+#define TIMMODE_64BIT_WDOG      (2 << 2)
+
+static void _hw_watchdog_enable(void)
+{
+        u32 timer_margin;
+        ulong wdt_freq;
+
+	/* disable, internal clock source */
+        writel(0x0, &wdttimer->tcr);
+	/* reset timer, set mode to 64-bit watchdog, and unreset */
+        writel(0x0, &wdttimer->tgcr);
+        writel(TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET, &wdttimer->tgcr);
+	/* clear counter regs */
+        writel(0x0, &wdttimer->tim12);
+        writel(0x0, &wdttimer->tim34);
+
+	/* set timeout period */
+        wdt_freq = CONFIG_SYS_HZ_CLOCK;
+        printf("Setting watchdog period to %llu ticks == %is * %luHz\n",((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq), CONFIG_SYS_WDT_PERIOD_SECONDS, wdt_freq);
+        timer_margin = (((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq) & 0xffffffff);
+        writel(timer_margin, &wdttimer->prd12);
+        timer_margin = (((u64)CONFIG_SYS_WDT_PERIOD_SECONDS * wdt_freq) >> 32);
+        writel(timer_margin, &wdttimer->prd34);
+
+	/* enable run continuously */
+        writel(ENAMODE12_PERIODIC, &wdttimer->tcr);
+
+        /* put watchdog in pre-active state */
+        writel(WDKEY_SEQ0 | WDEN, &wdttimer->wdtcr);
+        /* put watchdog in active state */
+        writel(WDKEY_SEQ1 | WDEN, &wdttimer->wdtcr);
+}
+
+void hw_watchdog_reset(void)
+{
+        writel(WDKEY_SEQ0, &wdttimer->wdtcr);
+        writel(WDKEY_SEQ1, &wdttimer->wdtcr);
+}
+
+#endif
+
+int misc_init_r(void)
+{
+#ifdef CONFIG_HW_WATCHDOG
+        _hw_watchdog_enable();
+#endif
+        return 0;
+}
+
include/configs/davinci_dm365evm.h +11 -0
index a75bce6..04173b9 100644
@@ -245,4 +245,15 @@
 #define CONFIG_SYS_INIT_SP_ADDR		\
 	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
 
+#define CONFIG_MISC_INIT_R
+
+// Hardware watchdog config
+#ifdef CONFIG_HW_WATCHDOG
+#define CONFIG_SYS_WDTTIMERBASE		0x01C21C00 
+#define CONFIG_SYS_WDT_PERIOD_SECONDS	60
+// These two are insignificant but required to build arch/arm/cpu/arm926ejs/davinci/timer.c
+#define CONFIG_SYS_WDT_PERIOD_LOW	0
+#define CONFIG_SYS_WDT_PERIOD_HIGH	0
+#endif
+
 #endif /* __CONFIG_H */
Signature · 1 line
1.7.0.4
#1 lore raw

PATCH 1/1 Added watchdog support for davinchi_dm365evm

board/davinci/dm365evm/dm365evm.c int board_mmc_init(bd_t *bis) · line 162

Quoted 12 lines · On Sunday 20 May 2012 12:50:40 Stijn Souffriau wrote:
board/davinci/dm365evm/dm365evm.c +9 -0
 
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+        (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/* WDTCR bit definitions */
+#define WDEN                    (1 << 14)
+#define WDFLAG                  (1 << 15)
+#define WDKEY_SEQ0              (0xa5c6 << 16)
+#define WDKEY_SEQ1              (0xda7e << 16)

if this is an on-chip hardware block, this stuff should be in an SoC-specific header

include/configs/davinci_dm365evm.h line 250

Quoted 4 lines
include/configs/davinci_dm365evm.h +1 -0
 
+// Hardware watchdog config

don't use // comment blocks. use /* ... */.
-mike
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#2 lore raw

PATCH 1/1 Added watchdog support for davinchi_dm365evm

Quoted 4 lines · Mike Frysinger
Quoted 3 lines · On Sunday 20 May 2012 12:50:40 Stijn Souffriau wrote:
board/davinci/dm365evm/dm365evm.c +0 -0
Quoted 11 lines

board/davinci/dm365evm/dm365evm.c int board_mmc_init(bd_t *bis)

Quoted 9 lines
board/davinci/dm365evm/dm365evm.c +9 -0
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+        (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/* WDTCR bit definitions */
+#define WDEN                    (1<<  14)
+#define WDFLAG                  (1<<  15)
+#define WDKEY_SEQ0              (0xa5c6<<  16)
+#define WDKEY_SEQ1              (0xda7e<<  16)

if this is an on-chip hardware block, this stuff should be in an SoC-specific header

Yes but as far as I know It only works for the davinci dm356evm.

Quoted 6 lines

include/configs/davinci_dm365evm.h line 250

Quoted 5 lines
include/configs/davinci_dm365evm.h +1 -0
 
+// Hardware watchdog config

don't use // comment blocks. use /* ... */.

ok

Quoted 1 line

-mike

#3 lore raw

PATCH 1/1 Added watchdog support for davinchi_dm365evm

Quoted 18 lines · On Saturday 02 June 2012 11:32:14 Stijn Souffriau wrote:
Quoted 4 lines · Mike Frysinger
Quoted 3 lines · On Sunday 20 May 2012 12:50:40 Stijn Souffriau wrote:
board/davinci/dm365evm/dm365evm.c +0 -0
Quoted 12 lines

board/davinci/dm365evm/dm365evm.c int board_mmc_init(bd_t *bis)

Quoted 9 lines
board/davinci/dm365evm/dm365evm.c +9 -0
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+        (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/* WDTCR bit definitions */
+#define WDEN                    (1<<  14)
+#define WDFLAG                  (1<<  15)
+#define WDKEY_SEQ0              (0xa5c6<<  16)
+#define WDKEY_SEQ1              (0xda7e<<  16)

if this is an on-chip hardware block, this stuff should be in an SoC-specific header

Quoted 1 line

Yes but as far as I know It only works for the davinci dm356evm.

if it's part of the SoC, then i don't see how it could only work for one board. SoC bits belong in the SoC tree (arch/arm/<soc>/...) while board bits belong in the board tree (board/...).
-mike
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#4 lore raw

PATCH 1/1 Added watchdog support for davinchi_dm365evm

In reply to Stijn Souffriau

Hello Stijn,

Quoted 4 lines · Stijn Souffriau
---
 board/davinci/dm365evm/dm365evm.c  |   68 ++++++++++++++++++++++++++++++++++++
 include/configs/davinci_dm365evm.h |   11 ++++++
 2 files changed, 79 insertions(+), 0 deletions(-)

Why you add this here board specific? Why you do not use existing watchdog code in arch/arm/cpu/arm926ejs/davinci/timer.c ?

Ok, it needs some cleanup, but this should work for dm365 too ...

bye,
Heiko

Signature · 3 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
#5 lore raw

PATCH 1/1 Added watchdog support for davinchi_dm365evm

Hello Heiko,

First of all, sorry it took so long for me to reply.

Because the code in arch/arm/cpu/arm926ejs/davinci/timer.c didn't work for the davinci dm365evm, I tried. If you look at the code you will find that the operations are similar but different.

Maybe this code works for more chips than the dm365 but I was hoping someone from TI might be able to tell me that. In any case, it's better to have support for one chip than for none.

Best Regards,

Stijn

Quoted 25 lines · Heiko Schocher

Hello Stijn,

Quoted 4 lines · Stijn Souffriau
---
  board/davinci/dm365evm/dm365evm.c  |   68 ++++++++++++++++++++++++++++++++++++
  include/configs/davinci_dm365evm.h |   11 ++++++
  2 files changed, 79 insertions(+), 0 deletions(-)

Why you add this here board specific? Why you do not use existing watchdog code in arch/arm/cpu/arm926ejs/davinci/timer.c ?

Ok, it needs some cleanup, but this should work for dm365 too ...

bye,
Heiko

Signature · 9 lines
Stijn Souffriau
Embedded Software Developer - Mind Embedded Software Division

ESSENSIUM nv
Mind - Embedded Software Division
Gaston Geenslaan 9 - B-3001 Leuven
email : stijn.souffriau at essensium.com
Web: www.essensium.com   /   www.mind.be
BE 872 984 063 RPR Leuven