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omap_dss: add optional 32bit XXRRGGBB framebuffer

PATCH Superseded Jeroen Hofstee 4 participants 13 messages May 16, 2012 – May 25, 2012

Subsystems (2)
Arm (32-bit) Framebuffer layer
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Jeroen Hofstee

author
#0 lore raw

cover omap_dss: add optional 32bit XXRRGGBB framebuffer

I could not resist removing some brackets etc while looking at the file.. These changes are optional and in a seperate patch. I will email a seperate patch which I use for testing, but should NOT be in mainline, since it assumes which LCD is connected.

Beagle owners, please test that I didn't break your orange background; I don't have the board.

Jeroen Hofstee (2):
omap3_dss: add optional framebuffer
omap3_dss: cosmetic changes

 arch/arm/include/asm/arch-omap3/dss.h |   61 ++++++++++++++++----------
 drivers/video/Makefile                |    2 +-
 drivers/video/omap3_dss.c             |   78 ++++++++++++++++++++++++---------
 3 files changed, 98 insertions(+), 43 deletions(-)
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH 1/2 omap3_dss: add optional framebuffer

From: Jeroen Hofstee <[email protected]>

The beagle board uses the background color to show an orange screen during startup. This patch adds the ability to add a frame buffer, with the intention not to break the beagle board use case (I don't have one). videomodes.c is not used. Scrolling depends on this patch:

http://patchwork.ozlabs.org/patch/155662/

cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
---
 arch/arm/include/asm/arch-omap3/dss.h |   41 ++++++++++++++++++++++++++----
 drivers/video/Makefile                |    2 +-
 drivers/video/omap3_dss.c             |   45 +++++++++++++++++++++++++++++++++
 3 files changed, 82 insertions(+), 6 deletions(-)
arch/arm/include/asm/arch-omap3/dss.h +36 -5
index 4c56e5e..ae994ee 100644
@@ -28,15 +28,19 @@
 #ifndef DSS_H
 #define DSS_H
 
-/*
- * DSS Base Registers
- */
-#define OMAP3_DSS_BASE		0x48050040
-#define OMAP3_DISPC_BASE	0x48050440
+/* DSS Base Registers */
+#define OMAP3_DSS_BASE		0x48050000
+#define OMAP3_DISPC_BASE	0x48050400
 #define OMAP3_VENC_BASE		0x48050C00
 
 /* DSS Registers */
 struct dss_regs {
+	u32 revision;				/* 0x00 */
+	u8 res1[12];				/* 0x04 */
+	u32 sysconfig;				/* 0x10 */
+	u32 sysstatus;				/* 0x14 */
+	u32 irqstatus;				/* 0x18 */
+	u8 res2[36];				/* 0x1C */
 	u32 control;				/* 0x40 */
 	u32 sdi_control;			/* 0x44 */
 	u32 pll_control;			/* 0x48 */

@@ -44,6 +48,13 @@ struct dss_regs {
 
 /* DISPC Registers */
 struct dispc_regs {
+	u32 revision;				/* 0x00 */
+	u8 res1[12];				/* 0x04 */
+	u32 sysconfig;				/* 0x10 */
+	u32 sysstatus;				/* 0x14 */
+	u32 irqstatus;				/* 0x18 */
+	u32 irqenable;				/* 0x1C */
+	u8 res2[32];				/* 0x20 */
 	u32 control;				/* 0x40 */
 	u32 config;				/* 0x44 */
 	u32 reserve_2;				/* 0x48 */

@@ -60,6 +71,18 @@ struct dispc_regs {
 	u32 global_alpha;			/* 0x74 */
 	u32 size_dig;				/* 0x78 */
 	u32 size_lcd;				/* 0x7C */
+	u32 gfx_ba0;				/* 0x80 */
+	u32 gfx_ba1;				/* 0x84 */
+	u32 gfx_position;			/* 0x88 */
+	u32 gfx_size;				/* 0x8C */
+	u8 unused[16];				/* 0x90 */
+	u32 gfx_attributes;			/* 0xA0 */
+	u32 gfx_fifo_threshold;			/* 0xA4 */
+	u32 gfx_fifo_size_status;		/* 0xA8 */
+	u32 gfx_row_inc;			/* 0xAC */
+	u32 gfx_pixel_inc;			/* 0xB0 */
+	u32 gfx_window_skip;			/* 0xB4 */
+	u32 gfx_table_ba;			/* 0xB8 */
 };
 
 /* VENC Registers */

@@ -123,6 +146,13 @@ struct venc_regs {
 #define TFTSTN_SHIFT				3
 #define DATALINES_SHIFT				8
 
+#define GFX_ENABLE				1
+#define GFX_FORMAT_SHIFT			1
+#define LOADMODE_SHIFT				1
+
+#define DSS_SOFTRESET				(1 << 1)
+#define DSS_RESETDONE				1
+
 /* Enabling Display controller */
 #define LCD_ENABLE				1
 #define DIG_ENABLE				(1 << 1)

@@ -161,6 +191,7 @@ struct panel_config {
 	u32 data_lines;
 	u32 load_mode;
 	u32 panel_color;
+	void *frame_buffer;
 };
 
 /*
drivers/video/Makefile +1 -1
index 6252f6a..02aa032 100644
@@ -38,7 +38,7 @@ COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
-COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o videomodes.o
+COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
 COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
 COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
 COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
drivers/video/omap3_dss.c +45 -0

66 lines not on this page · raw message

Signature · 1 line
1.7.9.5
author
#2 lore raw

PATCH 2/2 omap3_dss: cosmetic changes

In reply to Jeroen Hofstee

From: Jeroen Hofstee <[email protected]>

Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line.
Moved init values to the source code.

cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
---
 arch/arm/include/asm/arch-omap3/dss.h |   20 +++-----------------
 drivers/video/omap3_dss.c             |   33 +++++++++++++--------------------
 2 files changed, 16 insertions(+), 37 deletions(-)
arch/arm/include/asm/arch-omap3/dss.h +3 -17
index ae994ee..a830c43 100644
@@ -161,26 +161,14 @@ struct venc_regs {
 #define GP_OUT0					(1 << 15)
 #define GP_OUT1					(1 << 16)
 
-#define DISPC_ENABLE				(LCD_ENABLE | \
-						 DIG_ENABLE | \
-						 GO_LCD | \
-						 GO_DIG | \
-						 GP_OUT0| \
-						 GP_OUT1)
-
 /* Configure VENC DSS Params */
 #define VENC_CLK_ENABLE				(1 << 3)
 #define DAC_DEMEN				(1 << 4)
 #define DAC_POWERDN				(1 << 5)
 #define VENC_OUT_SEL				(1 << 6)
 #define DIG_LPP_SHIFT				16
-#define VENC_DSS_CONFIG				(VENC_CLK_ENABLE | \
-						 DAC_DEMEN | \
-						 DAC_POWERDN | \
-						 VENC_OUT_SEL)
-/*
- * Panel Configuration
- */
+
+/* Panel Configuration */
 struct panel_config {
 	u32 timing_h;
 	u32 timing_v;

@@ -194,9 +182,7 @@ struct panel_config {
 	void *frame_buffer;
 };
 
-/*
- * Generic DSS Functions
- */
+/* Generic DSS Functions */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 			u32 height, u32 width);
 void omap3_dss_panel_config(const struct panel_config *panel_cfg);
drivers/video/omap3_dss.c +13 -20
index 9245c06..9b75390 100644
@@ -30,9 +30,7 @@
 #include <asm/arch/dss.h>
 #include <video_fb.h>
 
-/*
- * Configure VENC for a given Mode (NTSC / PAL)
- */
+/* Configure VENC for a given Mode (NTSC / PAL) */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 				u32 height, u32 width)
 {

@@ -65,10 +63,8 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 	writel(venc_cfg->savid__eavid, &venc->savid__eavid);
 	writel(venc_cfg->flen__fal, &venc->flen__fal);
 	writel(venc_cfg->lal__phase_reset, &venc->lal__phase_reset);
-	writel(venc_cfg->hs_int_start_stop_x,
-				&venc->hs_int_start_stop_x);
-	writel(venc_cfg->hs_ext_start_stop_x,
-				&venc->hs_ext_start_stop_x);
+	writel(venc_cfg->hs_int_start_stop_x, &venc->hs_int_start_stop_x);
+	writel(venc_cfg->hs_ext_start_stop_x, &venc->hs_ext_start_stop_x);
 	writel(venc_cfg->vs_int_start_x, &venc->vs_int_start_x);
 	writel(venc_cfg->vs_int_stop_x__vs_int_start_y,
 			&venc->vs_int_stop_x__vs_int_start_y);

@@ -94,15 +90,14 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 	writel(venc_cfg->dac_b__dac_c, &venc->dac_b__dac_c);
 
 	/* Configure DSS for VENC Settings */
-	writel(VENC_DSS_CONFIG, &dss->control);
+	writel(VENC_CLK_ENABLE | DAC_DEMEN | DAC_POWERDN | VENC_OUT_SEL,
+			&dss->control);
 
 	/* Configure height and width for Digital out */
-	writel(((height << DIG_LPP_SHIFT) | width), &dispc->size_dig);
+	writel(height << DIG_LPP_SHIFT | width, &dispc->size_dig);
 }
 
-/*
- * Configure Panel Specific Parameters
- */
+/* Configure Panel Specific Parameters */
 void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 {
 	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;

@@ -117,9 +112,9 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->pol_freq, &dispc->pol_freq);
 	writel(panel_cfg->divisor, &dispc->divisor);
 	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel((panel_cfg->load_mode << FRAME_MODE_SHIFT), &dispc->config);
-	writel(((panel_cfg->panel_type << TFTSTN_SHIFT) |
-		(panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control);
+	writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
+	writel(panel_cfg->panel_type << TFTSTN_SHIFT |
+		panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
 	writel(panel_cfg->panel_color, &dispc->default_color0);
 	writel((u32) panel_cfg->frame_buffer, &dispc->gfx_ba0);
 

@@ -133,16 +128,14 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->lcd_size, &dispc->gfx_size);
 }
 
-/*
- * Enable LCD and DIGITAL OUT in DSS
- */
+/* Enable LCD and DIGITAL OUT in DSS */
 void omap3_dss_enable(void)
 {
 	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
-	u32 l = 0;
+	u32 l;
 
 	l = readl(&dispc->control);
-	l |= DISPC_ENABLE;
+	l |= LCD_ENABLE | GO_LCD | DIG_ENABLE | GO_DIG | GP_OUT0 | GP_OUT1;
 	writel(l, &dispc->control);
 }
Signature · 1 line
1.7.9.5
#3 lore raw

cover omap_dss: add optional 32bit XXRRGGBB framebuffer

In reply to Jeroen Hofstee
Quoted 8 lines · Jeroen Hofstee

I could not resist removing some brackets etc while looking at the file.. These changes are optional and in a seperate patch. I will email a seperate patch which I use for testing, but should NOT be in mainline, since it assumes which LCD is connected.

Beagle owners, please test that I didn't break your orange background; I don't have the board.

Quoted 9 lines

Jeroen Hofstee (2):
omap3_dss: add optional framebuffer
omap3_dss: cosmetic changes

  arch/arm/include/asm/arch-omap3/dss.h |   61 ++++++++++++++++----------
  drivers/video/Makefile                |    2 +-
  drivers/video/omap3_dss.c             |   78 ++++++++++++++++++++++++---------
  3 files changed, 98 insertions(+), 43 deletions(-)

And the promised patch for the twister board, I used for testing; assuming a lg 4.3 inch display. _Not to be applied, testing only_

Jeroen
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author
#4 lore raw

v2 cover omap_dss: add optional 32bit XXRRGGBB framebuffer

In reply to Jeroen Hofstee

changes for v2:
removed an unneeded cast and memset.

v1:
I could not resist removing some brackets etc while looking at the file.. These changes are optional and in a seperate patch. I will email a seperate patch which I use for testing, but should NOT be in mainline, since it assumes which LCD is connected.

Beagle owners, please test that I didn't break your orange background; I don't have the board.

Jeroen Hofstee (2):
omap3_dss: add optional framebuffer
omap3_dss: cosmetic changes

 arch/arm/include/asm/arch-omap3/dss.h |   61 ++++++++++++++++----------
 drivers/video/Makefile                |    2 +-
 drivers/video/omap3_dss.c             |   77 ++++++++++++++++++++++++---------
 3 files changed, 97 insertions(+), 43 deletions(-)
Signature · 1 line
1.7.9.5
author
#5 lore raw

PATCH v2 1/2 omap3_dss: add optional framebuffer

From: Jeroen Hofstee <[email protected]>

The beagle board uses the background color to show an orange screen during startup. This patch adds the ability to add a frame buffer, with the intention not to break the beagle board use case (I don't have one). videomodes.c is not used. Scrolling depends on this patch:

http://patchwork.ozlabs.org/patch/155662/

cc trini at ti.com
cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
---
 arch/arm/include/asm/arch-omap3/dss.h |   37 +++++++++++++++++++++++++--
 drivers/video/Makefile                |    2 +-
 drivers/video/omap3_dss.c             |   44 +++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 3 deletions(-)
arch/arm/include/asm/arch-omap3/dss.h +35 -2
index 4c56e5e..101e8c8 100644
@@ -31,12 +31,18 @@
 /*
  * DSS Base Registers
  */
-#define OMAP3_DSS_BASE		0x48050040
-#define OMAP3_DISPC_BASE	0x48050440
+#define OMAP3_DSS_BASE		0x48050000
+#define OMAP3_DISPC_BASE	0x48050400
 #define OMAP3_VENC_BASE		0x48050C00
 
 /* DSS Registers */
 struct dss_regs {
+	u32 revision;				/* 0x00 */
+	u8 res1[12];				/* 0x04 */
+	u32 sysconfig;				/* 0x10 */
+	u32 sysstatus;				/* 0x14 */
+	u32 irqstatus;				/* 0x18 */
+	u8 res2[36];				/* 0x1C */
 	u32 control;				/* 0x40 */
 	u32 sdi_control;			/* 0x44 */
 	u32 pll_control;			/* 0x48 */

@@ -44,6 +50,13 @@ struct dss_regs {
 
 /* DISPC Registers */
 struct dispc_regs {
+	u32 revision;				/* 0x00 */
+	u8 res1[12];				/* 0x04 */
+	u32 sysconfig;				/* 0x10 */
+	u32 sysstatus;				/* 0x14 */
+	u32 irqstatus;				/* 0x18 */
+	u32 irqenable;				/* 0x1C */
+	u8 res2[32];				/* 0x20 */
 	u32 control;				/* 0x40 */
 	u32 config;				/* 0x44 */
 	u32 reserve_2;				/* 0x48 */

@@ -60,6 +73,18 @@ struct dispc_regs {
 	u32 global_alpha;			/* 0x74 */
 	u32 size_dig;				/* 0x78 */
 	u32 size_lcd;				/* 0x7C */
+	u32 gfx_ba0;				/* 0x80 */
+	u32 gfx_ba1;				/* 0x84 */
+	u32 gfx_position;			/* 0x88 */
+	u32 gfx_size;				/* 0x8C */
+	u8 unused[16];				/* 0x90 */
+	u32 gfx_attributes;			/* 0xA0 */
+	u32 gfx_fifo_threshold;			/* 0xA4 */
+	u32 gfx_fifo_size_status;		/* 0xA8 */
+	u32 gfx_row_inc;			/* 0xAC */
+	u32 gfx_pixel_inc;			/* 0xB0 */
+	u32 gfx_window_skip;			/* 0xB4 */
+	u32 gfx_table_ba;			/* 0xB8 */
 };
 
 /* VENC Registers */

@@ -123,6 +148,13 @@ struct venc_regs {
 #define TFTSTN_SHIFT				3
 #define DATALINES_SHIFT				8
 
+#define GFX_ENABLE				1
+#define GFX_FORMAT_SHIFT			1
+#define LOADMODE_SHIFT				1
+
+#define DSS_SOFTRESET				(1 << 1)
+#define DSS_RESETDONE				1
+
 /* Enabling Display controller */
 #define LCD_ENABLE				1
 #define DIG_ENABLE				(1 << 1)

@@ -161,6 +193,7 @@ struct panel_config {
 	u32 data_lines;
 	u32 load_mode;
 	u32 panel_color;
+	void *frame_buffer;
 };
 
 /*
drivers/video/Makefile +1 -1
index 6252f6a..02aa032 100644
@@ -38,7 +38,7 @@ COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
-COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o videomodes.o
+COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
 COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
 COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
 COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
drivers/video/omap3_dss.c +44 -0

65 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#6 lore raw

PATCH v2 1/2 omap3_dss: add optional framebuffer

Hi,

Quoted 13 lines · On Fri, 18 May 2012 12:51:00 +0200 Jeroen Hofstee <[email protected]> wrote:

From: Jeroen Hofstee <[email protected]>

The beagle board uses the background color to show an orange screen during startup. This patch adds the ability to add a frame buffer, with the intention not to break the beagle board use case (I don't have one). videomodes.c is not used. Scrolling depends on this patch:

http://patchwork.ozlabs.org/patch/155662/

cc trini at ti.com
cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
Quoted 5 lines
---
 arch/arm/include/asm/arch-omap3/dss.h |   37 +++++++++++++++++++++++++--
 drivers/video/Makefile                |    2 +-
 drivers/video/omap3_dss.c             |   44 +++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 3 deletions(-)

Applied to u-boot-video/master, thanks!

Anatolij

author
#7 lore raw

PATCH v2 2/2 omap3_dss: cosmetic changes

In reply to Jeroen Hofstee

From: Jeroen Hofstee <[email protected]>

Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line (as the rest).
Moved init values to the source code.

cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
---
 arch/arm/include/asm/arch-omap3/dss.h |   24 ++++--------------------
 drivers/video/omap3_dss.c             |   33 +++++++++++++--------------------
 2 files changed, 17 insertions(+), 40 deletions(-)
arch/arm/include/asm/arch-omap3/dss.h +4 -20
index 101e8c8..a830c43 100644
@@ -28,9 +28,7 @@
 #ifndef DSS_H
 #define DSS_H
 
-/*
- * DSS Base Registers
- */
+/* DSS Base Registers */
 #define OMAP3_DSS_BASE		0x48050000
 #define OMAP3_DISPC_BASE	0x48050400
 #define OMAP3_VENC_BASE		0x48050C00

@@ -163,26 +161,14 @@ struct venc_regs {
 #define GP_OUT0					(1 << 15)
 #define GP_OUT1					(1 << 16)
 
-#define DISPC_ENABLE				(LCD_ENABLE | \
-						 DIG_ENABLE | \
-						 GO_LCD | \
-						 GO_DIG | \
-						 GP_OUT0| \
-						 GP_OUT1)
-
 /* Configure VENC DSS Params */
 #define VENC_CLK_ENABLE				(1 << 3)
 #define DAC_DEMEN				(1 << 4)
 #define DAC_POWERDN				(1 << 5)
 #define VENC_OUT_SEL				(1 << 6)
 #define DIG_LPP_SHIFT				16
-#define VENC_DSS_CONFIG				(VENC_CLK_ENABLE | \
-						 DAC_DEMEN | \
-						 DAC_POWERDN | \
-						 VENC_OUT_SEL)
-/*
- * Panel Configuration
- */
+
+/* Panel Configuration */
 struct panel_config {
 	u32 timing_h;
 	u32 timing_v;

@@ -196,9 +182,7 @@ struct panel_config {
 	void *frame_buffer;
 };
 
-/*
- * Generic DSS Functions
- */
+/* Generic DSS Functions */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 			u32 height, u32 width);
 void omap3_dss_panel_config(const struct panel_config *panel_cfg);
drivers/video/omap3_dss.c +13 -20
index dfe61b3..6686718 100644
@@ -30,9 +30,7 @@
 #include <asm/arch/dss.h>
 #include <video_fb.h>
 
-/*
- * Configure VENC for a given Mode (NTSC / PAL)
- */
+/* Configure VENC for a given Mode (NTSC / PAL) */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 				u32 height, u32 width)
 {

@@ -65,10 +63,8 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 	writel(venc_cfg->savid__eavid, &venc->savid__eavid);
 	writel(venc_cfg->flen__fal, &venc->flen__fal);
 	writel(venc_cfg->lal__phase_reset, &venc->lal__phase_reset);
-	writel(venc_cfg->hs_int_start_stop_x,
-				&venc->hs_int_start_stop_x);
-	writel(venc_cfg->hs_ext_start_stop_x,
-				&venc->hs_ext_start_stop_x);
+	writel(venc_cfg->hs_int_start_stop_x, &venc->hs_int_start_stop_x);
+	writel(venc_cfg->hs_ext_start_stop_x, &venc->hs_ext_start_stop_x);
 	writel(venc_cfg->vs_int_start_x, &venc->vs_int_start_x);
 	writel(venc_cfg->vs_int_stop_x__vs_int_start_y,
 			&venc->vs_int_stop_x__vs_int_start_y);

@@ -94,15 +90,14 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 	writel(venc_cfg->dac_b__dac_c, &venc->dac_b__dac_c);
 
 	/* Configure DSS for VENC Settings */
-	writel(VENC_DSS_CONFIG, &dss->control);
+	writel(VENC_CLK_ENABLE | DAC_DEMEN | DAC_POWERDN | VENC_OUT_SEL,
+			&dss->control);
 
 	/* Configure height and width for Digital out */
-	writel(((height << DIG_LPP_SHIFT) | width), &dispc->size_dig);
+	writel(height << DIG_LPP_SHIFT | width, &dispc->size_dig);
 }
 
-/*
- * Configure Panel Specific Parameters
- */
+/* Configure Panel Specific Parameters */
 void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 {
 	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;

@@ -117,9 +112,9 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->pol_freq, &dispc->pol_freq);
 	writel(panel_cfg->divisor, &dispc->divisor);
 	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel((panel_cfg->load_mode << FRAME_MODE_SHIFT), &dispc->config);
-	writel(((panel_cfg->panel_type << TFTSTN_SHIFT) |
-		(panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control);
+	writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
+	writel(panel_cfg->panel_type << TFTSTN_SHIFT |
+		panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
 	writel(panel_cfg->panel_color, &dispc->default_color0);
 	writel((u32) panel_cfg->frame_buffer, &dispc->gfx_ba0);
 

@@ -133,16 +128,14 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->lcd_size, &dispc->gfx_size);
 }
 
-/*
- * Enable LCD and DIGITAL OUT in DSS
- */
+/* Enable LCD and DIGITAL OUT in DSS */
 void omap3_dss_enable(void)
 {
 	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
-	u32 l = 0;
+	u32 l;
 
 	l = readl(&dispc->control);
-	l |= DISPC_ENABLE;
+	l |= LCD_ENABLE | GO_LCD | DIG_ENABLE | GO_DIG | GP_OUT0 | GP_OUT1;
 	writel(l, &dispc->control);
 }
Signature · 1 line
1.7.9.5
#8 lore raw

PATCH v2 2/2 omap3_dss: cosmetic changes

Hi,

Quoted 7 lines · On Fri, 18 May 2012 12:51:01 +0200 Jeroen Hofstee <[email protected]> wrote:

From: Jeroen Hofstee <[email protected]>

Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line (as the rest).
Moved init values to the source code.

Quoted 7 lines
cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
---
 arch/arm/include/asm/arch-omap3/dss.h |   24 ++++--------------------
 drivers/video/omap3_dss.c             |   33 +++++++++++++--------------------
 2 files changed, 17 insertions(+), 40 deletions(-)

Applied to u-boot-video/master, thanks!

Anatolij

#9 lore raw

PATCH v2 2/2 omap3_dss: cosmetic changes

Quoted 20 lines · Anatolij Gustschin

Hi,

Quoted 7 lines · On Fri, 18 May 2012 12:51:01 +0200 Jeroen Hofstee <[email protected]> wrote:

From: Jeroen Hofstee <[email protected]>

Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line (as the rest).
Moved init values to the source code.

Quoted 7 lines
cc s-paulraj at ti.com
cc khasim at ti.com
Signed-off-by Jeroen Hofstee <[email protected]>
---
 arch/arm/include/asm/arch-omap3/dss.h |   24 ++++--------------------
 drivers/video/omap3_dss.c             |   33 +++++++++++++--------------------
 2 files changed, 17 insertions(+), 40 deletions(-)
Quoted 1 line

Applied to u-boot-video/master, thanks!

This is fine with me FWIW, I had pulled these into u-boot-ti/master yesterday locally. I'll take them out before I do a pull request later today.

Signature · 1 line
Tom
#10 lore raw

v2 cover omap_dss: add optional 32bit XXRRGGBB framebuffer

In reply to Jeroen Hofstee
Quoted 11 lines · Jeroen Hofstee

changes for v2:
removed an unneeded cast and memset.

v1:
I could not resist removing some brackets etc while looking at the file.. These changes are optional and in a seperate patch. I will email a seperate patch which I use for testing, but should NOT be in mainline, since it assumes which LCD is connected.

Beagle owners, please test that I didn't break your orange background; I don't have the board.

Still seeing orange here.

Signature · 1 line
Tom
#11 lore raw

cover omap_dss: add optional 32bit XXRRGGBB framebuffer

In reply to Jeroen Hofstee

Hi,

Quoted 7 lines · On Wed, 16 May 2012 21:04:56 +0200 Jeroen Hofstee <[email protected]> wrote:

I could not resist removing some brackets etc while looking at the file.. These changes are optional and in a seperate patch. I will email a seperate patch which I use for testing, but should NOT be in mainline, since it assumes which LCD is connected.

Beagle owners, please test that I didn't break your orange background; I don't have the board.

I used similar patches on beagleboard when debugging cfb console output on omap3 and will test your patches soon. You also might need this [1] patch.

Thanks,

Anatolij

[1] http://patchwork.ozlabs.org/patch/155662/

#12 lore raw

cover omap_dss: add optional 32bit XXRRGGBB framebuffer

On 05/18/2012 11:22 PM, Anatolij Gustschin wrote

Quoted 3 lines

I used similar patches on beagleboard when debugging cfb console output on omap3 and will test your patches soon. You also might need this [1] patch.

Thanks, I was aware of this, see the commit message:

?Scrolling depends on this patch:

http://patchwork.ozlabs.org/patch/155662/"

The path is up for reposting, otherwise I could add the tested-by..

Quoted 1 line

[1] http://patchwork.ozlabs.org/patch/155662/