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MXS: Set I2C timing registers for mxs-i2c

PATCH Superseded Marek Vasut 4 participants 7 messages May 27, 2012 – Jun 6, 2012

Subsystems (3)
Device tree bindings Arm i.MX and Layerscape I2C subsystem host drivers

v1 of 3 Superseded Latest is v3 →

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Marek Vasut

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#0 lore raw

PATCH 1/2 MXS: Set I2C timing registers for mxs-i2c

This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported.

Signed-off-by Marek Vasut <[email protected]>
Cc Detlev Zundel <[email protected]>
CC Dong Aisheng <[email protected]>
CC Fabio Estevam <[email protected]>
Cc Linux ARM kernel <[email protected]>
Cc linux-i2c at vger.kernel.org
CC Sascha Hauer <[email protected]>
CC Shawn Guo <[email protected]>
Cc Stefano Babic <[email protected]>
CC Uwe Kleine-K?nig <[email protected]>
Cc Wolfgang Denk <[email protected]>
Cc Wolfram Sang <[email protected]>
---
 Documentation/devicetree/bindings/i2c/i2c-mxs.txt |    1 +
 arch/arm/boot/dts/imx28.dtsi                      |    2 +
 drivers/i2c/busses/i2c-mxs.c                      |   64 +++++++++++++++++++++
 3 files changed, 67 insertions(+)
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +1 -0
index 1bfc02d..790b5c6 100644
@@ -4,6 +4,7 @@ Required properties:
 - compatible: Should be "fsl,<chip>-i2c"
 - reg: Should contain registers location and length
 - interrupts: Should contain ERROR and DMA interrupts
+- speed: Speed of the bus in kHz (400 or 100 are supported)
 
 Examples:
arch/arm/boot/dts/imx28.dtsi +2 -0
index 4634cb8..d927155 100644
@@ -381,6 +381,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x80058000 2000>;
 				interrupts = <111 68>;
+				fsl,speed = <400>;
 				status = "disabled";
 			};
 

@@ -390,6 +391,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x8005a000 2000>;
 				interrupts = <110 69>;
+				fsl,speed = <400>;
 				status = "disabled";
 			};
drivers/i2c/busses/i2c-mxs.c +64 -0

99 lines not on this page · raw message

Signature · 1 line
1.7.10
author
#1 lore raw

PATCH 2/2 MXS: Implement DMA support into mxs-i2c

This patch implements DMA support into mxs-i2c. DMA transfers are now enabled via DT. The DMA operation is enabled by default.

Signed-off-by Marek Vasut <[email protected]>
Cc Detlev Zundel <[email protected]>
CC Dong Aisheng <[email protected]>
CC Fabio Estevam <[email protected]>
Cc Linux ARM kernel <[email protected]>
Cc linux-i2c at vger.kernel.org
CC Sascha Hauer <[email protected]>
CC Shawn Guo <[email protected]>
Cc Stefano Babic <[email protected]>
CC Uwe Kleine-K?nig <[email protected]>
Cc Wolfgang Denk <[email protected]>
Cc Wolfram Sang <[email protected]>
---
 Documentation/devicetree/bindings/i2c/i2c-mxs.txt |    3 +
 arch/arm/boot/dts/imx28.dtsi                      |    2 +
 drivers/i2c/busses/i2c-mxs.c                      |  268 +++++++++++++++++++--
 3 files changed, 251 insertions(+), 22 deletions(-)
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +3 -0
index 790b5c6..f4b6244 100644
@@ -6,6 +6,9 @@ Required properties:
 - interrupts: Should contain ERROR and DMA interrupts
 - speed: Speed of the bus in kHz (400 or 100 are supported)
 
+Optional properties:
+- use-pio: Use PIO transfers instead of DMA, useful for debug
+
 Examples:
 
 i2c0: i2c at 80058000 {
arch/arm/boot/dts/imx28.dtsi +2 -0
index d927155..d470276 100644
@@ -381,6 +381,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x80058000 2000>;
 				interrupts = <111 68>;
+				fsl,i2c-dma-channel = <6>;
 				fsl,speed = <400>;
 				status = "disabled";
 			};

@@ -391,6 +392,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x8005a000 2000>;
 				interrupts = <110 69>;
+				fsl,i2c-dma-channel = <7>;
 				fsl,speed = <400>;
 				status = "disabled";
 			};
drivers/i2c/busses/i2c-mxs.c +246 -22

377 lines not on this page · raw message

Signature · 1 line
1.7.10
#2 lore raw

PATCH 2/2 MXS: Implement DMA support into mxs-i2c

Quoted 26 lines · Marek Vasut

This patch implements DMA support into mxs-i2c. DMA transfers are now enabled via DT. The DMA operation is enabled by default.

Signed-off-by Marek Vasut <[email protected]>
Cc Detlev Zundel <[email protected]>
CC Dong Aisheng <[email protected]>
CC Fabio Estevam <[email protected]>
Cc Linux ARM kernel <[email protected]>
Cc linux-i2c at vger.kernel.org
CC Sascha Hauer <[email protected]>
CC Shawn Guo <[email protected]>
Cc Stefano Babic <[email protected]>
CC Uwe Kleine-K?nig <[email protected]>
Cc Wolfgang Denk <[email protected]>
Cc Wolfram Sang <[email protected]>
---
 Documentation/devicetree/bindings/i2c/i2c-mxs.txt |    3 +
 arch/arm/boot/dts/imx28.dtsi                      |    2 +
 drivers/i2c/busses/i2c-mxs.c                      |  268 +++++++++++++++++++--
 3 files changed, 251 insertions(+), 22 deletions(-)
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +0 -0
index 790b5c6..f4b6244 100644

Documentation/devicetree/bindings/i2c/i2c-mxs.txt Required properties: · line 10

Quoted 5 lines
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +2 -0
@@ -6,6 +6,9 @@ Required properties:
 - interrupts: Should contain ERROR and DMA interrupts
 - speed: Speed of the bus in kHz (400 or 100 are supported)
 
+Optional properties:
+- use-pio: Use PIO transfers instead of DMA, useful for debug

It should be "fsl,use-pio" which is the one used in code?

arch/arm/boot/dts/imx28.dtsi line 384

Quoted 13 lines
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +1 -0
+
 Examples:
 
 i2c0: i2c at 80058000 {
arch/arm/boot/dts/imx28.dtsi +1 -0
index d927155..d470276 100644
@@ -381,6 +381,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x80058000 2000>;
 				interrupts = <111 68>;
+				fsl,i2c-dma-channel = <6>;

You may need to document this property in binding doc as well.

Quoted 11 lines
arch/arm/boot/dts/imx28.dtsi +1 -0
 				fsl,speed = <400>;
 				status = "disabled";
 			};

@@ -391,6 +392,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x8005a000 2000>;
 				interrupts = <110 69>;
+				fsl,i2c-dma-channel = <7>;
 				fsl,speed = <400>;
 				status = "disabled";
 			};
Signature · 2 lines
Regards,
Shawn
#3 lore raw

PATCH 1/2 MXS: Set I2C timing registers for mxs-i2c

In reply to Marek Vasut
Quoted 47 lines · Marek Vasut

This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported.

Signed-off-by Marek Vasut<[email protected]>
Cc Detlev Zundel<[email protected]>
CC Dong Aisheng<[email protected]>
CC Fabio Estevam<[email protected]>
Cc Linux ARM kernel<[email protected]>
Cc linux-i2c at vger.kernel.org
CC Sascha Hauer<[email protected]>
CC Shawn Guo<[email protected]>
Cc Stefano Babic<[email protected]>
CC Uwe Kleine-K?nig<[email protected]>
Cc Wolfgang Denk<[email protected]>
Cc Wolfram Sang<[email protected]>
---
  Documentation/devicetree/bindings/i2c/i2c-mxs.txt |    1 +
  arch/arm/boot/dts/imx28.dtsi                      |    2 +
  drivers/i2c/busses/i2c-mxs.c                      |   64 +++++++++++++++++++++
  3 files changed, 67 insertions(+)
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +1 -0
index 1bfc02d..790b5c6 100644
@@ -4,6 +4,7 @@ Required properties:
  - compatible: Should be "fsl,<chip>-i2c"
  - reg: Should contain registers location and length
  - interrupts: Should contain ERROR and DMA interrupts
+- speed: Speed of the bus in kHz (400 or 100 are supported)
 
  Examples:
arch/arm/boot/dts/imx28.dtsi +1 -0
index 4634cb8..d927155 100644
@@ -381,6 +381,7 @@
  				compatible = "fsl,imx28-i2c";
  				reg =<0x80058000 2000>;
  				interrupts =<111 68>;
+				fsl,speed =<400>;
  				status = "disabled";
  			};

arch/arm/boot/dts/imx28.dtsi line 396

Quoted 6 lines
arch/arm/boot/dts/imx28.dtsi +1 -0
@@ -390,6 +391,7 @@
  				compatible = "fsl,imx28-i2c";
  				reg =<0x8005a000 2000>;
  				interrupts =<110 69>;
+				fsl,speed =<400>;
  				status = "disabled";
  			};

Is there not a standard speed setting in the i2c binding?

Signature · 2 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius
author
#4 lore raw

PATCH 1/2 MXS: Set I2C timing registers for mxs-i2c

Dear Ben Dooks,

Quoted 60 lines · Marek Vasut
Quoted 59 lines

This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported.

Signed-off-by Marek Vasut<[email protected]>
Cc Detlev Zundel<[email protected]>
CC Dong Aisheng<[email protected]>
CC Fabio Estevam<[email protected]>
Cc Linux ARM kernel<[email protected]>
Cc linux-i2c at vger.kernel.org
CC Sascha Hauer<[email protected]>
CC Shawn Guo<[email protected]>
Cc Stefano Babic<[email protected]>
CC Uwe Kleine-K?nig<[email protected]>
Cc Wolfgang Denk<[email protected]>
Cc Wolfram Sang<[email protected]>

---

  Documentation/devicetree/bindings/i2c/i2c-mxs.txt |    1 +
  arch/arm/boot/dts/imx28.dtsi                      |    2 +
  drivers/i2c/busses/i2c-mxs.c                      |   64

+++++++++++++++++++++ 3 files changed, 67 insertions(+)

(quoted diff) +0 -0

b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt index 1bfc02d..790b5c6 100644

Documentation/devicetree/bindings/i2c/i2c-mxs.txt +1 -0
@@ -4,6 +4,7 @@ Required properties:
  - compatible: Should be "fsl,<chip>-i2c"
  - reg: Should contain registers location and length
  - interrupts: Should contain ERROR and DMA interrupts
 
+- speed: Speed of the bus in kHz (400 or 100 are supported)
 
  Examples:
arch/arm/boot/dts/imx28.dtsi +1 -0
index 4634cb8..d927155 100644
@@ -381,6 +381,7 @@
 
  				compatible = "fsl,imx28-i2c";
  				reg =<0x80058000 2000>;
  				interrupts =<111 68>;
 
+				fsl,speed =<400>;
 

  				status = "disabled";
  			
  			};
arch/arm/boot/dts/imx28.dtsi +0 -0
@@ -390,6 +391,7 @@
 
  				compatible = "fsl,imx28-i2c";
  				reg =<0x8005a000 2000>;
  				interrupts =<110 69>;
Quoted 7 lines
Quoted 5 lines
arch/arm/boot/dts/imx28.dtsi +1 -0
+				fsl,speed =<400>;
 

  				status = "disabled";
  			
  			};

Is there not a standard speed setting in the i2c binding?

Not that I know of, but if someone hinted one to me, I'd gladly rework the patches :)

Best regards,
Marek Vasut

#5 lore raw

PATCH 1/2 MXS: Set I2C timing registers for mxs-i2c

Quoted 5 lines
Quoted 2 lines

Is there not a standard speed setting in the i2c binding?

Not that I know of, but if someone hinted one to me, I'd gladly rework the patches :)

It is "clock-frequency". Check 'Documentation/devicetree/bindings/i2c'.

Signature · 9 lines
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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#6 lore raw

PATCH 1/2 MXS: Set I2C timing registers for mxs-i2c

In reply to Marek Vasut

Welcome to mxs device tree, Marek :)

Quoted 113 lines · Marek Vasut

This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported.

Signed-off-by Marek Vasut <[email protected]>
Cc Detlev Zundel <[email protected]>
CC Dong Aisheng <[email protected]>
CC Fabio Estevam <[email protected]>
Cc Linux ARM kernel <[email protected]>
Cc linux-i2c at vger.kernel.org
CC Sascha Hauer <[email protected]>
CC Shawn Guo <[email protected]>
Cc Stefano Babic <[email protected]>
CC Uwe Kleine-K?nig <[email protected]>
Cc Wolfgang Denk <[email protected]>
Cc Wolfram Sang <[email protected]>
---
 Documentation/devicetree/bindings/i2c/i2c-mxs.txt |    1 +
 arch/arm/boot/dts/imx28.dtsi                      |    2 +
 drivers/i2c/busses/i2c-mxs.c                      |   64 +++++++++++++++++++++
 3 files changed, 67 insertions(+)
Documentation/devicetree/bindings/i2c/i2c-mxs.txt +1 -0
index 1bfc02d..790b5c6 100644
@@ -4,6 +4,7 @@ Required properties:
 - compatible: Should be "fsl,<chip>-i2c"
 - reg: Should contain registers location and length
 - interrupts: Should contain ERROR and DMA interrupts
+- speed: Speed of the bus in kHz (400 or 100 are supported)
 
 Examples:
arch/arm/boot/dts/imx28.dtsi +2 -0
index 4634cb8..d927155 100644
@@ -381,6 +381,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x80058000 2000>;
 				interrupts = <111 68>;
+				fsl,speed = <400>;
 				status = "disabled";
 			};
 

@@ -390,6 +391,7 @@
 				compatible = "fsl,imx28-i2c";
 				reg = <0x8005a000 2000>;
 				interrupts = <110 69>;
+				fsl,speed = <400>;
 				status = "disabled";
 			};
drivers/i2c/busses/i2c-mxs.c +28 -0
index 04eb441..fff0a09 100644
@@ -46,6 +46,10 @@
 #define MXS_I2C_CTRL0_DIRECTION			0x00010000
 #define MXS_I2C_CTRL0_XFER_COUNT(v)		((v) & 0x0000FFFF)
 
+#define MXS_I2C_TIMING0		(0x10)
+#define MXS_I2C_TIMING1		(0x20)
+#define MXS_I2C_TIMING2		(0x30)
+
 #define MXS_I2C_CTRL1		(0x40)
 #define MXS_I2C_CTRL1_SET	(0x44)
 #define MXS_I2C_CTRL1_CLR	(0x48)

@@ -97,6 +101,24 @@
 #define MXS_CMD_I2C_READ	(MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
 				 MXS_I2C_CTRL0_MASTER_MODE)
 
+struct mxs_i2c_speed_config {
+	uint32_t	timing0;
+	uint32_t	timing1;
+	uint32_t	timing2;
+};
+
+const struct mxs_i2c_speed_config mxs_i2c_95kHz_config = {
+	.timing0	= 0x00780030,
+	.timing1	= 0x00800030,
+	.timing2	= 0x0015000d,
+};
+
+const struct mxs_i2c_speed_config mxs_i2c_400kHz_config = {
+	.timing0	= 0x000f0007,
+	.timing1	= 0x001f000f,
+	.timing2	= 0x0015000d,
+};
+
 /**
  * struct mxs_i2c_dev - per device, private MXS-I2C data
  *

@@ -112,11 +134,17 @@ struct mxs_i2c_dev {
 	struct completion cmd_complete;
 	u32 cmd_err;
 	struct i2c_adapter adapter;
+	const struct mxs_i2c_speed_config *speed;
 };
 
 static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
 {
 	stmp_reset_block(i2c->regs);
+
+	writel(i2c->speed->timing0, i2c->regs + MXS_I2C_TIMING0);
+	writel(i2c->speed->timing1, i2c->regs + MXS_I2C_TIMING1);
+	writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2);
+
 	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
 	writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
 			i2c->regs + MXS_I2C_QUEUECTRL_SET);

drivers/i2c/busses/i2c-mxs.c static const struct i2c_algorithm mxs_i2c_algo = { · line 350

Quoted 4 lines
drivers/i2c/busses/i2c-mxs.c +1 -0
@@ -319,6 +347,38 @@ static const struct i2c_algorithm mxs_i2c_algo = {
 	.functionality = mxs_i2c_func,
 };
 
+#ifdef CONFIG_OF

We already force ARCH_MXS to select USE_OF while I2C_MXS only depends on SOC_IMX28, so this #ifdef is not really needed?

Quoted 7 lines
drivers/i2c/busses/i2c-mxs.c +7 -0
+static int mxs_i2c_get_ofdata(struct platform_device *pdev,
+				struct mxs_i2c_dev *i2c)
+{
+	const __be32 *speed;
+	uint32_t speed_khz;
+	struct device_node *node = pdev->dev.of_node;
+

drivers/i2c/busses/i2c-mxs.c static const struct i2c_algorithm mxs_i2c_algo = { · line 367

Quoted 10 lines
drivers/i2c/busses/i2c-mxs.c +10 -0
+	if (!node)
+		return -EINVAL;
+
+	i2c->speed = &mxs_i2c_95kHz_config;
+	speed = of_get_property(node, "fsl,speed", NULL);
+	if (!speed)
+		dev_warn(&pdev->dev,
+			"No I2C speed selected, using 100kHz\n");
+
+	speed_khz = be32_to_cpup(speed);

You may want to try of_property_read_u32().

Quoted 18 lines
drivers/i2c/busses/i2c-mxs.c +14 -0
+	if (speed_khz == 400)
+		i2c->speed = &mxs_i2c_400kHz_config;
+	else if (speed_khz != 100)
+		dev_warn(&pdev->dev,
+			"Invalid I2C speed selected, using 100kHz\n");
+
+	return 0;
+}
+#else
+static int mxs_i2c_get_ofdata(struct platform_device *pdev,
+				struct mxs_i2c_dev *i2c)
+{ }
+#endif /* CONFIG_OF */
+
 static int __devinit mxs_i2c_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;

drivers/i2c/busses/i2c-mxs.c static int __devinit mxs_i2c_probe(struct platform_device *pdev) · line 423

Quoted 7 lines
drivers/i2c/busses/i2c-mxs.c +4 -0
@@ -357,6 +417,10 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
 	if (err)
 		return err;
 
+	err = mxs_i2c_get_ofdata(pdev, i2c);
+	if (err)
+		return err;
+

If we have this block put after the following line, we can save pdev parameter of mxs_i2c_get_ofdata()?

Quoted 6 lines
drivers/i2c/busses/i2c-mxs.c +0 -0
 	i2c->dev = dev;
 	platform_set_drvdata(pdev, i2c);
Signature · 1 line
1.7.10
Signature · 2 lines
Regards,
Shawn