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kvm: document lapic regs field

PATCH In review Michael S. Tsirkin 2 participants 2 messages May 23, 2012 – Jun 1, 2012

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PATCH 1/1 kvm: document lapic regs field

The logic in find_highest_vector looks strange until you realize the reason for the weird memory layout, which is because this is what the CPU microcode expects.

Add a comment so this stops tripping people up.

---
 arch/x86/kvm/lapic.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)
arch/x86/kvm/lapic.h +5 -0
index 41c62c7..1d1ec08 100644
@@ -15,6 +15,11 @@ struct kvm_lapic {
 	bool irr_pending;
 	s16 isr_count;
 	int isr_cache;
+	/**
+	 * APIC register page.  The layout matches the register layout seen by
+	 * the guest 1:1, because it is accessed by the vmx microcode.
+	 * Note: Only one register, the TPR, is used by the microcode.
+	 */
 	void *regs;
 	gpa_t vapic_addr;
 	struct page *vapic_page;
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#1 lore raw
Quoted 17 lines · Michael S. Tsirkin

The logic in find_highest_vector looks strange until you realize the reason for the weird memory layout, which is because this is what the CPU microcode expects.

Add a comment so this stops tripping people up.

---
 arch/x86/kvm/lapic.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)
arch/x86/kvm/lapic.h +0 -0
index 41c62c7..1d1ec08 100644

arch/x86/kvm/lapic.h struct kvm_lapic { · line 17

Quoted 3 lines
arch/x86/kvm/lapic.h +0 -0
@@ -15,6 +15,11 @@ struct kvm_lapic {
 	bool irr_pending;
 	s16 isr_count;
 	int isr_cache;

Wrong branch.