split tegra20 arm7 code into separate SPL
v2 cover split tegra20 arm7 code into separate SPL
This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI.
This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image.
Changes:
v2:
- renamed tegra2 to tegra20 to match kernel and devicetree naming policy
- pulled all SPL related config overrides to a separate file to clean up ifdefs from seabard.h
- rebased to TOT u-boot/master and fixed a bug related to init sequence changes between this patch series and new EMC code
- made u-boot.t2 target work even if CONFIG_OF is disabled
- added back USE_PRIVATE_LIBGCC
[PATCH 01/10] tegra20: rename tegra2 -> tegra20 [PATCH 02/10] tegra20: move tegra20 SoC code to [PATCH 03/10] mkconfig: add support for SPL CPU [PATCH 04/10] ARM: Fix arm720t SPL build
[PATCH 05/10] tegra20: remove timer_init from SPL build [PATCH 06/10] ARM: add tegra20 support to arm720t [PATCH 07/10] tegra20: add SPL config options for seaboard [PATCH 08/10] tegra20: add u-boot.t2 target
[PATCH 09/10] tegra20: Remove CPU init code from tegra20 u-boot [PATCH 10/10] tegra20: Remove armv4t build flags
.gitignore | 1 - Makefile | 14 - arch/arm/cpu/arm720t/cpu.c | 2 - arch/arm/cpu/arm720t/interrupts.c | 4 - arch/arm/cpu/arm720t/start.S | 19 +- arch/arm/cpu/arm720t/tegra20/Makefile | 48 - arch/arm/cpu/arm720t/tegra20/board.h | 25 - arch/arm/cpu/arm720t/tegra20/cpu.c | 259 ----- arch/arm/cpu/arm720t/tegra20/cpu.h | 99 -- arch/arm/cpu/arm720t/tegra20/spl.c | 133 --- arch/arm/cpu/armv7/start.S | 2 + arch/arm/cpu/armv7/tegra2/Makefile | 59 ++ arch/arm/cpu/armv7/tegra2/ap20.c | 366 +++++++ arch/arm/cpu/armv7/tegra2/board.c | 151 +++ arch/arm/cpu/armv7/tegra2/clock.c | 1087 ++++++++++++++++++++ arch/arm/cpu/armv7/tegra2/config.mk | 35 + arch/arm/cpu/armv7/tegra2/crypto.c | 230 +++++ arch/arm/cpu/armv7/tegra2/crypto.h | 36 + arch/arm/cpu/armv7/tegra2/emc.c | 286 +++++ arch/arm/cpu/armv7/tegra2/funcmux.c | 200 ++++ arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 42 + arch/arm/cpu/armv7/tegra2/pinmux.c | 572 ++++++++++ arch/arm/cpu/armv7/tegra2/pmu.c | 70 ++ arch/arm/cpu/armv7/tegra2/sys_info.c | 35 + arch/arm/cpu/armv7/tegra2/timer.c | 111 ++ arch/arm/cpu/armv7/tegra2/usb.c | 460 +++++++++ arch/arm/cpu/armv7/tegra2/warmboot.c | 386 +++++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.c | 250 +++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.h | 81 ++ arch/arm/cpu/armv7/tegra20/Makefile | 48 - arch/arm/cpu/armv7/tegra20/config.mk | 28 - arch/arm/cpu/armv7/tegra20/usb.c | 460 --------- arch/arm/cpu/tegra20-common/Makefile | 59 -- arch/arm/cpu/tegra20-common/ap20.c | 110 -- arch/arm/cpu/tegra20-common/board.c | 134 --- arch/arm/cpu/tegra20-common/clock.c | 1087 -------------------- arch/arm/cpu/tegra20-common/crypto.c | 230 ----- arch/arm/cpu/tegra20-common/crypto.h | 36 - arch/arm/cpu/tegra20-common/emc.c | 286 ----- arch/arm/cpu/tegra20-common/funcmux.c | 200 ---- arch/arm/cpu/tegra20-common/lowlevel_init.S | 42 - arch/arm/cpu/tegra20-common/pinmux.c | 572 ---------- arch/arm/cpu/tegra20-common/pmu.c | 70 -- arch/arm/cpu/tegra20-common/sys_info.c | 35 - arch/arm/cpu/tegra20-common/timer.c | 111 -- arch/arm/cpu/tegra20-common/warmboot.c | 386 ------- arch/arm/cpu/tegra20-common/warmboot_avp.c | 250 ----- arch/arm/cpu/tegra20-common/warmboot_avp.h | 81 -- arch/arm/include/asm/arch-tegra2/ap20.h | 109 ++ arch/arm/include/asm/arch-tegra2/apb_misc.h | 36 + arch/arm/include/asm/arch-tegra2/board.h | 30 + arch/arm/include/asm/arch-tegra2/clk_rst.h | 147 +++ arch/arm/include/asm/arch-tegra2/clock.h | 406 ++++++++ arch/arm/include/asm/arch-tegra2/emc.h | 113 ++ arch/arm/include/asm/arch-tegra2/flow.h | 36 + arch/arm/include/asm/arch-tegra2/funcmux.h | 69 ++ arch/arm/include/asm/arch-tegra2/fuse.h | 39 + arch/arm/include/asm/arch-tegra2/gp_padctrl.h | 73 ++ arch/arm/include/asm/arch-tegra2/gpio.h | 289 ++++++ arch/arm/include/asm/arch-tegra2/mmc.h | 27 + arch/arm/include/asm/arch-tegra2/pinmux.h | 354 +++++++ arch/arm/include/asm/arch-tegra2/pmc.h | 132 +++ arch/arm/include/asm/arch-tegra2/pmu.h | 30 + arch/arm/include/asm/arch-tegra2/scu.h | 43 + arch/arm/include/asm/arch-tegra2/sdram_param.h | 148 +++ arch/arm/include/asm/arch-tegra2/sys_proto.h | 35 + arch/arm/include/asm/arch-tegra2/tegra2.h | 86 ++ arch/arm/include/asm/arch-tegra2/tegra2_spi.h | 76 ++ arch/arm/include/asm/arch-tegra2/tegra_i2c.h | 164 +++ arch/arm/include/asm/arch-tegra2/timer.h | 30 + arch/arm/include/asm/arch-tegra2/uart-spi-switch.h | 46 + arch/arm/include/asm/arch-tegra2/uart.h | 47 + arch/arm/include/asm/arch-tegra2/usb.h | 252 +++++ arch/arm/include/asm/arch-tegra2/warmboot.h | 150 +++ arch/arm/include/asm/arch-tegra20/ap20.h | 109 -- arch/arm/include/asm/arch-tegra20/apb_misc.h | 36 - arch/arm/include/asm/arch-tegra20/board.h | 30 - arch/arm/include/asm/arch-tegra20/clk_rst.h | 147 --- arch/arm/include/asm/arch-tegra20/clock.h | 406 -------- arch/arm/include/asm/arch-tegra20/emc.h | 113 -- arch/arm/include/asm/arch-tegra20/flow.h | 36 - arch/arm/include/asm/arch-tegra20/funcmux.h | 69 -- arch/arm/include/asm/arch-tegra20/fuse.h | 39 - arch/arm/include/asm/arch-tegra20/gp_padctrl.h | 73 -- arch/arm/include/asm/arch-tegra20/gpio.h | 289 ------ arch/arm/include/asm/arch-tegra20/hardware.h | 29 - arch/arm/include/asm/arch-tegra20/mmc.h | 27 - arch/arm/include/asm/arch-tegra20/pinmux.h | 354 ------- arch/arm/include/asm/arch-tegra20/pmc.h | 132 --- arch/arm/include/asm/arch-tegra20/pmu.h | 30 - arch/arm/include/asm/arch-tegra20/scu.h | 43 - arch/arm/include/asm/arch-tegra20/sdram_param.h | 148 --- arch/arm/include/asm/arch-tegra20/sys_proto.h | 35 - arch/arm/include/asm/arch-tegra20/tegra2.h | 86 -- arch/arm/include/asm/arch-tegra20/tegra2_spi.h | 76 -- arch/arm/include/asm/arch-tegra20/tegra_i2c.h | 164 --- arch/arm/include/asm/arch-tegra20/timer.h | 30 - .../arm/include/asm/arch-tegra20/uart-spi-switch.h | 46 - arch/arm/include/asm/arch-tegra20/uart.h | 47 - arch/arm/include/asm/arch-tegra20/usb.h | 252 ----- arch/arm/include/asm/arch-tegra20/warmboot.h | 150 --- board/nvidia/common/board.c | 2 - board/nvidia/seaboard/config.mk | 1 - boards.cfg | 17 +- doc/README.SPL | 12 - include/configs/seaboard.h | 6 - include/configs/tegra2-common.h | 21 +- include/configs/tegra2-spl.h | 87 -- mkconfig | 15 +- spl/Makefile | 4 - 110 files changed, 7438 insertions(+), 7978 deletions(-)
--
nvpublic
PATCH v2 1/10 tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code.
---
arch/arm/cpu/armv7/{tegra2 => tegra20}/Makefile | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/ap20.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/board.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/clock.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/config.mk | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.h | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/emc.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/funcmux.c | 0
.../cpu/armv7/{tegra2 => tegra20}/lowlevel_init.S | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/pinmux.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/pmu.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/sys_info.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/timer.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/usb.c | 0
arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot.c | 0
.../cpu/armv7/{tegra2 => tegra20}/warmboot_avp.c | 0
.../cpu/armv7/{tegra2 => tegra20}/warmboot_avp.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/ap20.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/apb_misc.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/board.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/clk_rst.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/clock.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/emc.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/flow.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/funcmux.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/fuse.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/gp_padctrl.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/gpio.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/mmc.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/pinmux.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/pmc.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/pmu.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/scu.h | 0
.../{arch-tegra2 => arch-tegra20}/sdram_param.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/sys_proto.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/tegra2.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/tegra2_spi.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/tegra_i2c.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/timer.h | 0
.../uart-spi-switch.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/uart.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/usb.h | 0
.../asm/{arch-tegra2 => arch-tegra20}/warmboot.h | 0
boards.cfg | 12 ++++++------
45 files changed, 6 insertions(+), 6 deletions(-)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/Makefile (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/ap20.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/board.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/clock.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/config.mk (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/crypto.h (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/emc.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/funcmux.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/lowlevel_init.S (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/pinmux.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/pmu.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/sys_info.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/timer.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/usb.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot_avp.c (100%)
rename arch/arm/cpu/armv7/{tegra2 => tegra20}/warmboot_avp.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/ap20.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/apb_misc.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/board.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/clk_rst.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/clock.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/emc.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/flow.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/funcmux.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/fuse.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/gp_padctrl.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/gpio.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/mmc.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/pinmux.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/pmc.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/pmu.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/scu.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/sdram_param.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/sys_proto.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/tegra2.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/tegra2_spi.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/tegra_i2c.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/timer.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/uart-spi-switch.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/uart.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/usb.h (100%)
rename arch/arm/include/asm/{arch-tegra2 => arch-tegra20}/warmboot.h (100%)arch/arm/cpu/armv7/tegra20/Makefile renamed from arch/arm/cpu/armv7/tegra2/Makefile +0 -0
arch/arm/cpu/armv7/tegra20/ap20.c renamed from arch/arm/cpu/armv7/tegra2/ap20.c +0 -0
arch/arm/cpu/armv7/tegra20/board.c renamed from arch/arm/cpu/armv7/tegra2/board.c +0 -0
arch/arm/cpu/armv7/tegra20/clock.c renamed from arch/arm/cpu/armv7/tegra2/clock.c +0 -0
arch/arm/cpu/armv7/tegra20/config.mk renamed from arch/arm/cpu/armv7/tegra2/config.mk +0 -0
arch/arm/cpu/armv7/tegra20/crypto.c renamed from arch/arm/cpu/armv7/tegra2/crypto.c +0 -0
arch/arm/cpu/armv7/tegra20/crypto.h renamed from arch/arm/cpu/armv7/tegra2/crypto.h +0 -0
arch/arm/cpu/armv7/tegra20/emc.c renamed from arch/arm/cpu/armv7/tegra2/emc.c +0 -0
arch/arm/cpu/armv7/tegra20/funcmux.c renamed from arch/arm/cpu/armv7/tegra2/funcmux.c +0 -0
arch/arm/cpu/armv7/tegra20/lowlevel_init.S renamed from arch/arm/cpu/armv7/tegra2/lowlevel_init.S +0 -0
arch/arm/cpu/armv7/tegra20/pinmux.c renamed from arch/arm/cpu/armv7/tegra2/pinmux.c +0 -0
arch/arm/cpu/armv7/tegra20/pmu.c renamed from arch/arm/cpu/armv7/tegra2/pmu.c +0 -0
arch/arm/cpu/armv7/tegra20/sys_info.c renamed from arch/arm/cpu/armv7/tegra2/sys_info.c +0 -0
arch/arm/cpu/armv7/tegra20/timer.c renamed from arch/arm/cpu/armv7/tegra2/timer.c +0 -0
arch/arm/cpu/armv7/tegra20/usb.c renamed from arch/arm/cpu/armv7/tegra2/usb.c +0 -0
arch/arm/cpu/armv7/tegra20/warmboot.c renamed from arch/arm/cpu/armv7/tegra2/warmboot.c +0 -0
arch/arm/cpu/armv7/tegra20/warmboot_avp.c renamed from arch/arm/cpu/armv7/tegra2/warmboot_avp.c +0 -0
arch/arm/cpu/armv7/tegra20/warmboot_avp.h renamed from arch/arm/cpu/armv7/tegra2/warmboot_avp.h +0 -0
arch/arm/include/asm/arch-tegra20/ap20.h renamed from arch/arm/include/asm/arch-tegra2/ap20.h +0 -0
arch/arm/include/asm/arch-tegra20/apb_misc.h renamed from arch/arm/include/asm/arch-tegra2/apb_misc.h +0 -0
arch/arm/include/asm/arch-tegra20/board.h renamed from arch/arm/include/asm/arch-tegra2/board.h +0 -0
arch/arm/include/asm/arch-tegra20/clk_rst.h renamed from arch/arm/include/asm/arch-tegra2/clk_rst.h +0 -0
arch/arm/include/asm/arch-tegra20/clock.h renamed from arch/arm/include/asm/arch-tegra2/clock.h +0 -0
arch/arm/include/asm/arch-tegra20/emc.h renamed from arch/arm/include/asm/arch-tegra2/emc.h +0 -0
arch/arm/include/asm/arch-tegra20/flow.h renamed from arch/arm/include/asm/arch-tegra2/flow.h +0 -0
arch/arm/include/asm/arch-tegra20/funcmux.h renamed from arch/arm/include/asm/arch-tegra2/funcmux.h +0 -0
arch/arm/include/asm/arch-tegra20/fuse.h renamed from arch/arm/include/asm/arch-tegra2/fuse.h +0 -0
arch/arm/include/asm/arch-tegra20/gp_padctrl.h renamed from arch/arm/include/asm/arch-tegra2/gp_padctrl.h +0 -0
arch/arm/include/asm/arch-tegra20/gpio.h renamed from arch/arm/include/asm/arch-tegra2/gpio.h +0 -0
arch/arm/include/asm/arch-tegra20/mmc.h renamed from arch/arm/include/asm/arch-tegra2/mmc.h +0 -0
arch/arm/include/asm/arch-tegra20/pinmux.h renamed from arch/arm/include/asm/arch-tegra2/pinmux.h +0 -0
arch/arm/include/asm/arch-tegra20/pmc.h renamed from arch/arm/include/asm/arch-tegra2/pmc.h +0 -0
arch/arm/include/asm/arch-tegra20/pmu.h renamed from arch/arm/include/asm/arch-tegra2/pmu.h +0 -0
arch/arm/include/asm/arch-tegra20/scu.h renamed from arch/arm/include/asm/arch-tegra2/scu.h +0 -0
arch/arm/include/asm/arch-tegra20/sdram_param.h renamed from arch/arm/include/asm/arch-tegra2/sdram_param.h +0 -0
arch/arm/include/asm/arch-tegra20/sys_proto.h renamed from arch/arm/include/asm/arch-tegra2/sys_proto.h +0 -0
arch/arm/include/asm/arch-tegra20/tegra2.h renamed from arch/arm/include/asm/arch-tegra2/tegra2.h +0 -0
arch/arm/include/asm/arch-tegra20/tegra2_spi.h renamed from arch/arm/include/asm/arch-tegra2/tegra2_spi.h +0 -0
arch/arm/include/asm/arch-tegra20/tegra_i2c.h renamed from arch/arm/include/asm/arch-tegra2/tegra_i2c.h +0 -0
arch/arm/include/asm/arch-tegra20/timer.h renamed from arch/arm/include/asm/arch-tegra2/timer.h +0 -0
arch/arm/include/asm/arch-tegra20/uart-spi-switch.h renamed from arch/arm/include/asm/arch-tegra2/uart-spi-switch.h +0 -0
arch/arm/include/asm/arch-tegra20/uart.h renamed from arch/arm/include/asm/arch-tegra2/uart.h +0 -0
arch/arm/include/asm/arch-tegra20/usb.h renamed from arch/arm/include/asm/arch-tegra2/usb.h +0 -0
arch/arm/include/asm/arch-tegra20/warmboot.h renamed from arch/arm/include/asm/arch-tegra2/warmboot.h +0 -0
boards.cfg +6 -6
@@ -228,9 +228,9 @@ s5pc210_universal arm armv7 universal_c210 samsung smdk5250 arm armv7 smdk5250 samsung exynos smdkv310 arm armv7 smdkv310 samsung exynos trats arm armv7 trats samsung exynos -harmony arm armv7 harmony nvidia tegra2 -seaboard arm armv7 seaboard nvidia tegra2 -ventana arm armv7 ventana nvidia tegra2 +harmony arm armv7 harmony nvidia tegra20 +seaboard arm armv7 seaboard nvidia tegra20 +ventana arm armv7 ventana nvidia tegra20 u8500_href arm armv7 u8500 st-ericsson u8500 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
@@ -256,9 +256,9 @@ xaeniax arm pxa zipitz2 arm pxa colibri_pxa270 arm pxa - toradex jornada arm sa1100 -plutux arm armv7 plutux avionic-design tegra2 -medcom arm armv7 medcom avionic-design tegra2 -paz00 arm armv7 paz00 compal tegra2 +plutux arm armv7 plutux avionic-design tegra20 +medcom arm armv7 medcom avionic-design tegra20 +paz00 arm armv7 paz00 compal tegra20 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x
Signature · 1 line
1.7.9.5
PATCH v2 1/10 tegra20: rename tegra2 -> tegra20
boards.cfg
Quoted 4 lines · Allen Martin
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code.
boards.cfg +0
-0
This misses a couple of recently added boards - whistler and trimslice.
PATCH v2 1/10 tegra20: rename tegra2 -> tegra20
Quoted 7 lines · Stephen Warren
boards.cfg
Quoted 4 lines · Allen Martin
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code.
boards.cfg +0
-0This misses a couple of recently added boards - whistler and trimslice.
I based the series off u-boot/master, I'll rebase against u-boot-tegra/next
Signature · 1 line
nvpublic
PATCH v2 2/10 tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common
In reply to Allen MartinIn preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.
---
Makefile | 3 ++
arch/arm/cpu/armv7/tegra20/Makefile | 15 ++-------
.../cpu/{armv7/tegra20 => tegra20-common}/Makefile | 32 ++++++++++----------
.../cpu/{armv7/tegra20 => tegra20-common}/ap20.c | 0
.../cpu/{armv7/tegra20 => tegra20-common}/board.c | 0
.../cpu/{armv7/tegra20 => tegra20-common}/clock.c | 0
.../cpu/{armv7/tegra20 => tegra20-common}/crypto.c | 0
.../cpu/{armv7/tegra20 => tegra20-common}/crypto.h | 0
.../cpu/{armv7/tegra20 => tegra20-common}/emc.c | 0
.../{armv7/tegra20 => tegra20-common}/funcmux.c | 0
.../tegra20 => tegra20-common}/lowlevel_init.S | 0
.../cpu/{armv7/tegra20 => tegra20-common}/pinmux.c | 0
.../cpu/{armv7/tegra20 => tegra20-common}/pmu.c | 0
.../{armv7/tegra20 => tegra20-common}/sys_info.c | 0
.../cpu/{armv7/tegra20 => tegra20-common}/timer.c | 0
.../{armv7/tegra20 => tegra20-common}/warmboot.c | 0
.../tegra20 => tegra20-common}/warmboot_avp.c | 0
.../tegra20 => tegra20-common}/warmboot_avp.h | 0
spl/Makefile | 4 +++
19 files changed, 25 insertions(+), 29 deletions(-)
copy arch/arm/cpu/{armv7/tegra20 => tegra20-common}/Makefile (68%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/ap20.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/board.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/clock.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/crypto.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/crypto.h (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/emc.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/funcmux.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/lowlevel_init.S (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/pinmux.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/pmu.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/sys_info.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/timer.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/warmboot.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/warmboot_avp.c (100%)
rename arch/arm/cpu/{armv7/tegra20 => tegra20-common}/warmboot_avp.h (100%)Makefile +3 -0
@@ -319,6 +319,9 @@ endif ifeq ($(SOC),exynos) LIBS += $(CPUDIR)/s5p-common/libs5p-common.o endif +ifeq ($(SOC),tegra20) +LIBS += $(OBJTREE)/arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +endif LIBS := $(addprefix $(obj),$(sort $(LIBS))) .PHONY : $(LIBS)
arch/arm/cpu/armv7/tegra20/Makefile +2 -13
@@ -23,26 +23,15 @@ # MA 02111-1307 USA # -# The AVP is ARMv4T architecture so we must use special compiler -# flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/warmboot_avp.o += -march=armv4t - include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -SOBJS := lowlevel_init.o -COBJS-y := ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o -COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o -COBJS-$(CONFIG_TEGRA_PMU) += pmu.o COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_TEGRA2_LP0) += crypto.o warmboot.o warmboot_avp.o COBJS := $(COBJS-y) -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) all: $(obj).depend $(LIB)
arch/arm/cpu/tegra20-common/Makefile renamed from arch/arm/cpu/armv7/tegra20/Makefile +16 -16
@@ -1,7 +1,7 @@ # # (C) Copyright 2010,2011 Nvidia Corporation. # -# (C) Copyright 2000-2003 +# (C) Copyright 2000-2008 # Wolfgang Denk, DENX Software Engineering, wd at denx.de. # # See file CREDITS for list of people who contributed to this
@@ -14,7 +14,7 @@ # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License
@@ -23,32 +23,32 @@ # MA 02111-1307 USA # +include $(TOPDIR)/config.mk + # The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/warmboot_avp.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra2-common/ap20.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra2-common/clock.o += -march=armv4t -include $(TOPDIR)/config.mk +LIB = $(obj)lib$(SOC)-common.o -LIB = $(obj)lib$(SOC).o - -SOBJS := lowlevel_init.o -COBJS-y := ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o +SOBJS += lowlevel_init.o +COBJS-y += ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o +COBJS-$(CONFIG_TEGRA2_LP0) += warmboot.o crypto.o warmboot_avp.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o -COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_TEGRA2_LP0) += crypto.o warmboot.o warmboot_avp.o -COBJS := $(COBJS-y) -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) -all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) +$(obj).depend: + echo wtf + ######################################################################### # defines $(obj).depend target
arch/arm/cpu/tegra20-common/ap20.c renamed from arch/arm/cpu/armv7/tegra20/ap20.c +0 -0
arch/arm/cpu/tegra20-common/board.c renamed from arch/arm/cpu/armv7/tegra20/board.c +0 -0
arch/arm/cpu/tegra20-common/clock.c renamed from arch/arm/cpu/armv7/tegra20/clock.c +0 -0
arch/arm/cpu/tegra20-common/crypto.c renamed from arch/arm/cpu/armv7/tegra20/crypto.c +0 -0
arch/arm/cpu/tegra20-common/crypto.h renamed from arch/arm/cpu/armv7/tegra20/crypto.h +0 -0
arch/arm/cpu/tegra20-common/emc.c renamed from arch/arm/cpu/armv7/tegra20/emc.c +0 -0
arch/arm/cpu/tegra20-common/funcmux.c renamed from arch/arm/cpu/armv7/tegra20/funcmux.c +0 -0
arch/arm/cpu/tegra20-common/lowlevel_init.S renamed from arch/arm/cpu/armv7/tegra20/lowlevel_init.S +0 -0
arch/arm/cpu/tegra20-common/pinmux.c renamed from arch/arm/cpu/armv7/tegra20/pinmux.c +0 -0
arch/arm/cpu/tegra20-common/pmu.c renamed from arch/arm/cpu/armv7/tegra20/pmu.c +0 -0
arch/arm/cpu/tegra20-common/sys_info.c renamed from arch/arm/cpu/armv7/tegra20/sys_info.c +0 -0
arch/arm/cpu/tegra20-common/timer.c renamed from arch/arm/cpu/armv7/tegra20/timer.c +0 -0
arch/arm/cpu/tegra20-common/warmboot.c renamed from arch/arm/cpu/armv7/tegra20/warmboot.c +0 -0
arch/arm/cpu/tegra20-common/warmboot_avp.c renamed from arch/arm/cpu/armv7/tegra20/warmboot_avp.c +0 -0
arch/arm/cpu/tegra20-common/warmboot_avp.h renamed from arch/arm/cpu/armv7/tegra20/warmboot_avp.h +0 -0
spl/Makefile +4 -0
@@ -62,6 +62,10 @@ ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif +ifneq ($(CONFIG_TEGRA2),) +LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +endif + START := $(addprefix $(SPLTREE)/,$(START)) LIBS := $(addprefix $(SPLTREE)/,$(sort $(LIBS-y)))
Signature · 1 line
1.7.9.5
PATCH v2 2/10 tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common
arch/arm/cpu/tegra20-common/Makefile line 31
Quoted 13 lines · Allen Martin
In preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to
arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.arch/arm/cpu/tegra20-common/Makefile renamed from arch/arm/cpu/armv7/tegra20/Makefile +2
-3# The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/warmboot_avp.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra2-common/ap20.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra2-common/clock.o += -march=armv4t
Don't you still need the CFLAGS override for warmboot_avp.o here too? I assume that a later patch will just remove it, but it'd be nice if each patch along the way built and booted OK to, so that "git bisect" works through this series.
arch/arm/cpu/tegra20-common/Makefile line 42
Quoted 5 lines
arch/arm/cpu/tegra20-common/Makefile renamed from arch/arm/cpu/armv7/tegra20/Makefile +2
-3-COBJS := $(COBJS-y) -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
At least in this patch, I don't think SOBJS is set. Does using it here cause build issues?
spl/Makefile ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) · line 67
Quoted 5 lines
spl/Makefile +3
-0+ifneq ($(CONFIG_TEGRA2),) +LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +endif
In another file in this patch, that first line was the non-inverted test:
+ifeq ($(SOC),tegra20)
That seems simpler. Can we use the same here?
PATCH v2 2/10 tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common
Quoted 7 lines · Stephen Warren
Quoted 5 lines · Allen Martin
In preparation for splitting out the armv4t code from tegra20, move the tegra20 SoC code to
arch/arm/cpu/tegra20-common. This code will be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.arch/arm/cpu/tegra20-common/Makefile renamed from arch/arm/cpu/armv7/tegra20/Makefile +0
-0
Quoted 12 lines
arch/arm/cpu/tegra20-common/Makefile line 31
Quoted 7 lines
# The AVP is ARMv4T architecture so we must use special compiler
# flags for any startup files it might use.arch/arm/cpu/tegra20-common/Makefile renamed from arch/arm/cpu/armv7/tegra20/Makefile +2
-3-CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/warmboot_avp.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra2-common/ap20.o += -march=armv4t +CFLAGS_arch/arm/cpu/tegra2-common/clock.o += -march=armv4tDon't you still need the CFLAGS override for warmboot_avp.o here too? I assume that a later patch will just remove it, but it'd be nice if each patch along the way built and booted OK to, so that "git bisect" works through this series.
When I first wrote the series I made sure it booted at each patch, but I didn't reconfirm with all the changes, so it's quite possible I broke that. I'll make sure I preserve that.
Quoted 8 lines
arch/arm/cpu/tegra20-common/Makefile line 42
Quoted 5 lines
arch/arm/cpu/tegra20-common/Makefile renamed from arch/arm/cpu/armv7/tegra20/Makefile +2
-3-COBJS := $(COBJS-y) -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))At least in this patch, I don't think SOBJS is set. Does using it here cause build issues?
I'll confirm.
Quoted 11 lines
spl/Makefile ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) · line 67
Quoted 5 lines
spl/Makefile +3
-0+ifneq ($(CONFIG_TEGRA2),) +LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +endifIn another file in this patch, that first line was the non-inverted test:
+ifeq ($(SOC),tegra20)
That seems simpler. Can we use the same here?
Sure.
-Allen
Signature · 1 line
nvpublic
PATCH v2 3/10 mkconfig: add support for SPL CPU
In reply to Allen MartinAdd support for specifying a differnt CPU for main u-boot and SPL u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows:
normal_cpu:spl_cpu
This this case CPU will be set to "normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build.
--- boards.cfg | 5 +++++ doc/README.SPL | 12 ++++++++++++ mkconfig | 15 ++++++++++++++- 3 files changed, 31 insertions(+), 1 deletion(-)
boards.cfg +5 -0
@@ -11,6 +11,11 @@ # Lines starting with '#' are comments. # Blank lines are ignored. # +# The CPU field takes the form: +# cpu[:spl_cpu] +# If spl_cpu is specified the make variable CPU will be set to this +# during the SPL build. +# # The options field takes the form: # <board config name>[:comma separated config options] # Each config option has the form (value defaults to "1"):
doc/README.SPL +12 -0
@@ -66,3 +66,15 @@ CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o) CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o) CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o) CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o) + + +Normally CPU is assumed to be the same between the SPL and normal +u-boot build. However it is possible to specify a different CPU for +the SPL build for cases where the SPL is expected to run on a +different CPU model from the main u-boot. This is done by specifying +an SPL CPU in boards.cfg as follows: + + normal_cpu:spl_cpu + +This this case CPU will be set to "normal_cpu" during the main u-boot +build and "spl_cpu" during the SPL build.
mkconfig +14 -1
@@ -60,6 +60,11 @@ CONFIG_NAME="${1%_config}" arch="$2" cpu="$3" +tmp="${cpu#*:}" +if [ "$tmp" != "$cpu" ] ; then + spl_cpu=$tmp + cpu="${cpu%:*}" +fi if [ "$4" = "-" ] ; then board=${BOARD_NAME} else
@@ -131,7 +136,15 @@ fi # Create include file for Make # echo "ARCH = ${arch}" > config.mk -echo "CPU = ${cpu}" >> config.mk +if [ ! -z "$spl_cpu" ] ; then + echo 'ifeq ($(CONFIG_SPL_BUILD),y)' >> config.mk + echo "CPU = ${spl_cpu}" >> config.mk + echo "else" >> config.mk + echo "CPU = ${cpu}" >> config.mk + echo "endif" >> config.mk +else + echo "CPU = ${cpu}" >> config.mk +fi echo "BOARD = ${board}" >> config.mk [ "${vendor}" ] && echo "VENDOR = ${vendor}" >> config.mk
Signature · 1 line
1.7.9.5
PATCH v2 3/10 mkconfig: add support for SPL CPU
Quoted 1 line · Allen Martin
Add support for specifying a differnt CPU for main u-boot and SPL
typo ^^
Quoted 9 lines
u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows:
normal_cpu:spl_cpu
This this case CPU will be set to "
normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build.
mkconfig CONFIG_NAME="${1%_config}" · line 67
Quoted 6 lines
mkconfig +5
-0+tmp="${cpu#*:}" +if [ "$tmp" != "$cpu" ] ; then + spl_cpu=$tmp + cpu="${cpu%:*}" +fi
Neat - I wasn't aware of those variable expansion techniques.
However, this script runs under /bin/sh - are they standard sh constructs, or are they bash-isms? I wonder if shelling out to awk or cut here would be more portable?
PATCH v2 3/10 mkconfig: add support for SPL CPU
Quoted 4 lines · Stephen Warren
Quoted 1 line · Allen Martin
Add support for specifying a differnt CPU for main u-boot and SPL
typo ^^
Got it, thanks.
Quoted 18 lines
Quoted 9 lines
u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows:
normal_cpu:spl_cpu
This this case CPU will be set to "
normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build.mkconfig CONFIG_NAME="${1%_config}" · line 67
Quoted 6 lines
mkconfig +5
-0+tmp="${cpu#*:}" +if [ "$tmp" != "$cpu" ] ; then + spl_cpu=$tmp + cpu="${cpu%:*}" +fiNeat - I wasn't aware of those variable expansion techniques.
Quoted 3 lines
However, this script runs under
/bin/sh- are they standard sh constructs, or are they bash-isms? I wonder if shelling out to awk or cut here would be more portable?
It's bash, I'll rewrite it with awk.
-Allen
Signature · 1 line
nvpublic
PATCH v2 4/10 ARM: Fix arm720t SPL build
In reply to Allen MartinTake a few SPL fixes from armv7 and apply them to arm720t:
-Use dummy exception handlers for SPL build
-Initialize relocation register r9 to 0 for the case of no relocation -ifdef out interrupt handler code
--- arch/arm/cpu/arm720t/start.S | 13 +++++++++++++ 1 file changed, 13 insertions(+)
arch/arm/cpu/arm720t/start.S +13 -0
@@ -51,6 +51,15 @@ _start: b reset ldr pc, _irq ldr pc, _fiq +#ifdef CONFIG_SPL_BUILD +_undefined_instruction: .word _undefined_instruction +_software_interrupt: .word _software_interrupt +_prefetch_abort: .word _prefetch_abort +_data_abort: .word _data_abort +_not_used: .word _not_used +_irq: .word _irq +_fiq: .word _fiq +#else _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort
@@ -58,6 +67,7 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +#endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef
@@ -167,6 +177,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs
@@ -425,6 +436,7 @@ lock_loop: mov pc, lr +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* *
@@ -587,6 +599,7 @@ fiq: bl do_fiq #endif +#endif /* CONFIG_SPL_BUILD */ #if defined(CONFIG_NETARM) .align 5
Signature · 1 line
1.7.9.5
PATCH v2 5/10 tegra20: remove timer_init from SPL build
In reply to Allen MartinDon't use timer_init from tegra board.c. This comes out of arm720t for the SPL build.
--- board/nvidia/common/board.c | 2 ++ 1 file changed, 2 insertions(+)
board/nvidia/common/board.c +2 -0
@@ -49,6 +49,7 @@ const struct tegra2_sysinfo sysinfo = { CONFIG_TEGRA2_BOARD_STRING }; +#ifndef CONFIG_SPL_BUILD /* * Routine: timer_init * Description: init the timestamp and lastinc value
@@ -57,6 +58,7 @@ int timer_init(void) {return 0 ; } +#endif void __pin_mux_usb (void ) {
Signature · 1 line
1.7.9.5
PATCH v2 6/10 ARM: add tegra20 support to arm720t
In reply to Allen MartinAdd support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it.
--- arch/arm/cpu/arm720t/cpu.c | 2 + arch/arm/cpu/arm720t/interrupts.c | 4 + arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/cpu/arm720t/tegra20/Makefile | 48 +++++ arch/arm/cpu/arm720t/tegra20/board.h | 25 +++ arch/arm/cpu/arm720t/tegra20/cpu.c | 259 ++++++++++++++++++++++++++ arch/arm/cpu/arm720t/tegra20/cpu.h | 99 ++++++++++ arch/arm/cpu/arm720t/tegra20/spl.c | 133 +++++++++++++ arch/arm/include/asm/arch-tegra20/hardware.h | 29 +++ 9 files changed, 604 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm720t/tegra20/Makefile create mode 100644 arch/arm/cpu/arm720t/tegra20/board.h create mode 100644 arch/arm/cpu/arm720t/tegra20/cpu.c create mode 100644 arch/arm/cpu/arm720t/tegra20/cpu.h create mode 100644 arch/arm/cpu/arm720t/tegra20/spl.c create mode 100644 arch/arm/include/asm/arch-tegra20/hardware.h
arch/arm/cpu/arm720t/cpu.c +2 -0
@@ -51,6 +51,8 @@ int cleanup_before_linux (void)/* Nothing more needed */ #elif defined(CONFIG_INTEGRATOR ) && defined(CONFIG_ARCH_INTEGRATOR )/* No cleanup before linux for IntegratorAP/CM720T as yet */ +#elif defined (CONFIG_MACH_TEGRA_GENERIC ) +/* No cleanup before linux for tegra as yet */ #else #error No cleanup_before_linux() defined for this CPU type#endif
arch/arm/cpu/arm720t/interrupts.c +4 -0
@@ -180,6 +180,8 @@ int timer_init (void)PUT32 (T0TC ,0 );PUT32 (T0TCR ,1 );/* enable timer0 */ +#elif defined(CONFIG_MACH_TEGRA_GENERIC ) +/* No timer routines for tegra as yet */ #else #error No timer_init() defined for this CPU type#endif
@@ -282,6 +284,8 @@ void __udelay (unsigned long usec)#elif defined(CONFIG_INTEGRATOR ) && defined(CONFIG_ARCH_INTEGRATOR )/* No timer routines for IntegratorAP/CM720T as yet */ +#elif defined(CONFIG_MACH_TEGRA_GENERIC ) +/* No timer routines for tegra as yet */ #else #error Timer routines not defined for this CPU type#endif
arch/arm/cpu/arm720t/start.S +5 -1
@@ -407,6 +407,8 @@ lock_loop: ldr r0, VPBDIV_ADR mov r1, #0x01 /* VPB clock is same as process clock */ str r1, [r0] +#elif defined(CONFIG_MACH_TEGRA_GENERIC) + /* No cpu_init_crit for tegra as yet */ #else #error No cpu_init_crit() defined for current CPU type #endif
@@ -422,7 +424,7 @@ lock_loop: str r1, [r0] #endif -#ifndef CONFIG_LPC2292 +#if !defined(CONFIG_LPC2292) && !defined(CONFIG_MACH_TEGRA_GENERIC) mov ip, lr /* * before relocating, we have to setup RAM timing
@@ -631,6 +633,8 @@ reset_cpu: .globl reset_cpu reset_cpu: mov pc, r0 +#elif defined(CONFIG_MACH_TEGRA_GENERIC) + /* No specific reset actions for tegra as yet */ #else #error No reset_cpu() defined for current CPU type #endif
arch/arm/cpu/arm720t/tegra20/Makefile new file +48 -0
48 lines not on this page · raw message
arch/arm/cpu/arm720t/tegra20/board.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* (C) Copyright 2010-2011 +* NVIDIA Corporation <www.nvidia.com> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +void board_init_uart_f (void ); +void gpio_config_uart (void );
arch/arm/cpu/arm720t/tegra20/cpu.c new file +259 -0
259 lines not on this page · raw message
arch/arm/cpu/arm720t/tegra20/cpu.h new file +99 -0
99 lines not on this page · raw message
arch/arm/cpu/arm720t/tegra20/spl.c new file +133 -0
133 lines not on this page · raw message
arch/arm/include/asm/arch-tegra20/hardware.h new file +29 -0
@@ -0,0 +1,29 @@ +/* +* (C) Copyright 2010-2011 +* NVIDIA Corporation <www.nvidia.com> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#ifndef __TEGRA2_HW_H +#define __TEGRA2_HW_H + +/* include tegra specific hardware definitions */ + +#endif /* __TEGRA2_HW_H */
Signature · 1 line
1.7.9.5
PATCH v2 6/10 ARM: add tegra20 support to arm720t
arch/arm/cpu/arm720t/cpu.c int cleanup_before_linux (void) · line 58
Quoted 12 lines · Allen Martin
Add support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it.
arch/arm/cpu/arm720t/cpu.c +2
-0#elif defined(CONFIG_INTEGRATOR ) && defined(CONFIG_ARCH_INTEGRATOR )/* No cleanup before linux for IntegratorAP/CM720T as yet */ +#elif defined (CONFIG_MACH_TEGRA_GENERIC ) +/* No cleanup before linux for tegra as yet */ #else #error No cleanup_before_linux() defined for this CPU type#endif
Wouldn't CONFIG_TEGRA2 be a better define to use? Same comment throughout.
arch/arm/cpu/arm720t/tegra20/cpu.c line 39
Quoted 8 lines
arch/arm/cpu/arm720t/tegra20/cpu.c +6
-0+/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */ +int ap20_cpu_is_cortexa9 (void ) +{ +u32 id =readb (NV_PA_PG_UP_BASE +PG_UP_TAG_0 ); +return id == (PG_UP_TAG_0_PID_CPU &0xff ); +}
Doesn't the SPL always run on the AVP, and the regular U-Boot build always run on the main CPUs - I'm not sure why this runtime API would be needed.
Quoted 1 line
+void
init_pllx(void)
I assume a lot of the code in this file is copied from the armv7/tegra20/*.c files. Shouldn't this patch remove the ARMv7 versions since presumably it's no longer needed - doesn't the non-SPL U-Boot rely on the SPL U-Boot always having run first in order to start the main U-Boot executing?
If not, then shouldn't this code be in tegra20-common so it can be shared?
arch/arm/cpu/arm720t/tegra20/cpu.h
Quoted 1 line
arch/arm/cpu/arm720t/tegra20/cpu.h +0
-0
Similarly, this file seems like it'd be in tegra20-common/include or somewhere like that.
PATCH v2 6/10 ARM: add tegra20 support to arm720t
Quoted 6 lines · Stephen Warren
Quoted 4 lines · Allen Martin
Add support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it.
arch/arm/cpu/arm720t/cpu.c +0
-0
Quoted 9 lines
arch/arm/cpu/arm720t/cpu.c int cleanup_before_linux (void) · line 58
Quoted 7 lines
#elif
defined(CONFIG_INTEGRATOR)&&defined(CONFIG_ARCH_INTEGRATOR)arch/arm/cpu/arm720t/cpu.c +2
-0/* No cleanup before linux for IntegratorAP/CM720T as yet */ +#elif defined (CONFIG_MACH_TEGRA_GENERIC ) +/* No cleanup before linux for tegra as yet */ #else #error No cleanup_before_linux() defined for this CPU type#endif Wouldn't
CONFIG_TEGRA2be a better define to use? Same comment throughout.
The SPL *should* work on tegra30 with only minor changes, so just trying to look forward.
Quoted 12 lines
arch/arm/cpu/arm720t/tegra20/cpu.c line 39
Quoted 8 lines
arch/arm/cpu/arm720t/tegra20/cpu.c +6
-0+/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */ +int ap20_cpu_is_cortexa9 (void ) +{ +u32 id =readb (NV_PA_PG_UP_BASE +PG_UP_TAG_0 ); +return id == (PG_UP_TAG_0_PID_CPU &0xff ); +}Doesn't the SPL always run on the AVP, and the regular U-Boot build always run on the main CPUs - I'm not sure why this runtime API would be needed.
I think this is just a holdover from the old code, I'll look at purging it.
Quoted 7 lines
Quoted 1 line
+void
init_pllx(void)I assume a lot of the code in this file is copied from the armv7/tegra20/*.c files. Shouldn't this patch remove the ARMv7 versions since presumably it's no longer needed - doesn't the non-SPL U-Boot rely on the SPL U-Boot always having run first in order to start the main U-Boot executing?
Yes, I remove some of it in "tegra20: Remove CPU init code from tegra20 u-boot". I'll look at rolling that patch into this one, but I originally made it two patches to try to preserve building and booting at every patch.
Quoted 7 lines
If not, then shouldn't this code be in tegra20-common so it can be shared?
arch/arm/cpu/arm720t/tegra20/cpu.h
Quoted 1 line
arch/arm/cpu/arm720t/tegra20/cpu.h +0
-0Similarly, this file seems like it'd be in tegra20-common/include or somewhere like that.
Those defines are only used for the Cortex A9 init, so it should only be needed from the SPL.
-Allen
Signature · 1 line
nvpublic
PATCH v2 6/10 ARM: add tegra20 support to arm720t
Quoted 17 lines · Allen Martin
Quoted 6 lines · Stephen Warren
Quoted 4 lines · Allen Martin
Add support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it.
arch/arm/cpu/arm720t/cpu.c +0
-0Quoted 9 lines
arch/arm/cpu/arm720t/cpu.c int cleanup_before_linux (void) · line 58
Quoted 7 lines
#elif
defined(CONFIG_INTEGRATOR)&&defined(CONFIG_ARCH_INTEGRATOR)arch/arm/cpu/arm720t/cpu.c +2
-0/* No cleanup before linux for IntegratorAP/CM720T as yet */ +#elif defined (CONFIG_MACH_TEGRA_GENERIC ) +/* No cleanup before linux for tegra as yet */ #else #error No cleanup_before_linux() defined for this CPU type#endif Wouldn't
CONFIG_TEGRA2be a better define to use? Same comment throughout.
Quoted 2 lines
The SPL *should* work on tegra30 with only minor changes, so just trying to look forward.
Oh, I see. MACH_TEGRA_GENERIC means "some Tegra SoC", and CONFIG_TEGRA* indicate which one. Coming from my kernel background, MACH_* is a define for a particular board, and we do have a GENERIC Tegra board, so I got the wrong end of the stick.
I wonder if it's worth renaming CONFIG_MACH_TEGRA_GENERIC to CONFIG_TEGRA. There don't appear to be any users of it currently.
PATCH v2 6/10 ARM: add tegra20 support to arm720t
Quoted 7 lines · Stephen Warren
Oh, I see.
MACH_TEGRA_GENERICmeans "some Tegra SoC", and CONFIG_TEGRA* indicate which one. Coming from my kernel background, MACH_* is a define for a particular board, and we do have a GENERIC Tegra board, so I got the wrong end of the stick.I wonder if it's worth renaming
CONFIG_MACH_TEGRA_GENERICtoCONFIG_TEGRA. There don't appear to be any users of it currently.
Fine by me, maybe CONFIG_TEGRA2 should go to CONFIG_TEGRA20 also to keep with the new naming?
-Allen
Signature · 1 line
nvpublic
PATCH v2 6/10 ARM: add tegra20 support to arm720t
Quoted 11 lines · Allen Martin
Quoted 7 lines · Stephen Warren
Oh, I see.
MACH_TEGRA_GENERICmeans "some Tegra SoC", and CONFIG_TEGRA* indicate which one. Coming from my kernel background, MACH_* is a define for a particular board, and we do have a GENERIC Tegra board, so I got the wrong end of the stick.I wonder if it's worth renaming
CONFIG_MACH_TEGRA_GENERICtoCONFIG_TEGRA. There don't appear to be any users of it currently.Fine by me, maybe
CONFIG_TEGRA2should go toCONFIG_TEGRA20also to keep with the new naming?
Sounds reasonable to me.
PATCH v2 7/10 tegra20: add SPL config options for seaboard
In reply to Allen MartinAdd SPL options to tegra20 config files and enable SPL build for seaboard in boards.cfg
--- boards.cfg | 2 +- include/configs/seaboard.h | 6 +++ include/configs/tegra2-common.h | 17 ++++++++ include/configs/tegra2-spl.h | 87 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 111 insertions(+), 1 deletion(-) create mode 100644 include/configs/tegra2-spl.h
boards.cfg +1 -1
@@ -234,7 +234,7 @@ smdk5250 arm armv7 smdk5250 samsung exynos smdkv310 arm armv7 smdkv310 samsung exynos trats arm armv7 trats samsung exynos harmony arm armv7 harmony nvidia tegra20 -seaboard arm armv7 seaboard nvidia tegra20 +seaboard arm armv7:arm720t seaboard nvidia tegra20 ventana arm armv7 ventana nvidia tegra20 u8500_href arm armv7 u8500 st-ericsson u8500 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
include/configs/seaboard.h +6 -0
@@ -108,4 +108,10 @@#define TEGRA2_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ "stdout=serial\0" \ "stderr=serial\0" + +/* include overrides for SPL build */ +#ifdef CONFIG_SPL_BUILD +#include "tegra2-spl.h" +#endif +#endif /* __CONFIG_H */
include/configs/tegra2-common.h +17 -0
@@ -199,4 +199,21 @@#define CONFIG_TEGRA2_GPIO #define CONFIG_CMD_GPIO + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x00008000 +#define CONFIG_SPL_MAX_SIZE 0x00078000 +#define CONFIG_SYS_SPL_MALLOC_START 0x00080000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SPL_STACK 0x0009fffc + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra2/u-boot-spl.lds" +#endif /* __TEGRA2_COMMON_H */
include/configs/tegra2-spl.h new file +87 -0
87 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH v2 7/10 tegra20: add SPL config options for seaboard
include/configs/seaboard.h line 115
Quoted 9 lines · Allen Martin
Add SPL options to tegra20 config files and enable SPL build for seaboard in boards.cfg
include/configs/seaboard.h +4
-0+/* include overrides for SPL build */ +#ifdef CONFIG_SPL_BUILD +#include "tegra2-spl.h" +#endif
Perhaps we should add that to include/configs/tegra2-common-post.h, which I think all Tegra config headers now include at the end.
Quoted 6 lines
include/configs/tegra2-common.h +4
-0+/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x00008000
include/configs/tegra2-common.h line 215
Quoted 10 lines
include/configs/tegra2-common.h +9
-0+#define CONFIG_SPL_MAX_SIZE 0x00078000 +#define CONFIG_SYS_SPL_MALLOC_START 0x00080000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SPL_STACK 0x0009fffc + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT
I'm not sure what that's for?
Quoted 1 line
+#define
CONFIG_SPL_GPIO_SUPPORT
I believe only Seaboard needs that, not all boards. It'd be nice if we could just ignore the crufy SPI/GPIO switch on Seaboard too and punt this. Does anyone actually boot Seaboard using SPI? I use NAND and Tom uses eMMC...
include/configs/tegra2-spl.h line 11
Quoted 4 lines
include/configs/tegra2-spl.h +2
-0+* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version.
Being a new file, this should be GPLv2 not GPLv2+.
include/configs/tegra2-spl.h line 30
Quoted 4 lines
include/configs/tegra2-spl.h +4
-0+/* remove devicetree support */ +#ifdef CONFIG_OF_CONTROL +#undef CONFIG_OF_CONTROL +#endif
I don't /think/ #undef complains if the define isn't defined?
Perhaps this (and the others) are better approached by not defining all these if building SPL though - what if a particular board's SPL actually wanted any of these?
PATCH v2 7/10 tegra20: add SPL config options for seaboard
Quoted 6 lines · Stephen Warren
Quoted 4 lines · Allen Martin
Add SPL options to tegra20 config files and enable SPL build for seaboard in boards.cfg
include/configs/seaboard.h +0
-0
Quoted 7 lines
include/configs/seaboard.h line 115
Quoted 4 lines
include/configs/seaboard.h +4
-0+/* include overrides for SPL build */ +#ifdef CONFIG_SPL_BUILD +#include "tegra2-spl.h" +#endif Perhaps we should add that to
include/configs/tegra2-common-post.h, which I think all Tegra config headers now include at the end.
Ok.
Quoted 16 lines
Quoted 15 lines
include/configs/tegra2-common.h +12
-0+/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x00008000 +#define CONFIG_SPL_MAX_SIZE 0x00078000 +#define CONFIG_SYS_SPL_MALLOC_START 0x00080000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SPL_STACK 0x0009fffc + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT
Quoted 3 lines
Quoted 1 line
+#define
CONFIG_SPL_POWER_SUPPORTI'm not sure what that's for?
Hm, I put it in for the PMU driver, but maybe that's not actually needed in the SPL. I'll take a look.
Quoted 6 lines
Quoted 1 line
+#define
CONFIG_SPL_GPIO_SUPPORTI believe only Seaboard needs that, not all boards. It'd be nice if we could just ignore the crufy SPI/GPIO switch on Seaboard too and punt this. Does anyone actually boot Seaboard using SPI? I use NAND and Tom uses eMMC...
Well I use SPI on my Springbank, but maybe I'm in the minority :^)
Quoted 6 lines
include/configs/tegra2-spl.h line 11
Quoted 4 lines
include/configs/tegra2-spl.h +2
-0+* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. Being a new file, this should be GPLv2 not GPLv2+.
Ok.
Quoted 7 lines
include/configs/tegra2-spl.h line 30
Quoted 5 lines
include/configs/tegra2-spl.h +4
-0+/* remove devicetree support */ +#ifdef CONFIG_OF_CONTROL +#undef CONFIG_OF_CONTROL +#endif I don't /think/ #undef complains if the define isn't defined?
I've seen compilers that do, so I was just trying to play it safe.
Quoted 4 lines
Perhaps this (and the others) are better approached by not defining all these if building SPL though - what if a particular board's SPL actually wanted any of these?
That's what I had in v1 of the patch series, but it ends up adding a lot of #ifdefs sprinkled through each board config file. I'd like to keep the SPL as small and minimal as possible such that it doesn't need a lot of board specific configuration, just unavoidable things like UART.
-Allen
Signature · 1 line
nvpublic
PATCH v2 7/10 tegra20: add SPL config options for seaboard
In reply to Stephen WarrenQuoted 1 line · Stephen Warren
On 06/05/2012 03:20 PM, Allen Martin wrote:
<snip>
Quoted 6 lines
include/configs/tegra2-spl.h line 11
Quoted 4 lines
include/configs/tegra2-spl.h +2
-0+* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. Being a new file, this should be GPLv2 not GPLv2+.
u-boot uses GPLv2+.
http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign
http://www.mail-archive.com/u-boot at lists.denx.de/msg26569.html
-sughosh
PATCH v2 7/10 tegra20: add SPL config options for seaboard
Quoted 10 lines · Sughosh Ganu
Quoted 1 line · Stephen Warren
On 06/05/2012 03:20 PM, Allen Martin wrote:
<snip>
Quoted 5 lines
Quoted 4 lines
include/configs/tegra2-spl.h +2
-0+* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version.
Quoted 6 lines
Quoted 1 line
Being a new file, this should be GPLv2 not GPLv2+.
u-boot uses GPLv2+.
http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign
http://www.mail-archive.com/u-boot at lists.denx.de/msg26569.html
Sughosh,
I guess I'm a little confused here.
COPYING in the U-Boot source tree states the following:
Quoted 7 lines
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code for details). You can redistribute U-Boot and/or modify it under the terms of version 2 of the GNU General Public License as published by the Free Software Foundation. Most of it can also be distributed, at your option, under any later version of the GNU General Public License -- see individual files for exceptions.
... which explicitly allows for either GPLv2 or GPLv2+ code. There is certainly GPLv2-only code already in U-Boot. Why do you say that GPLv2-only code isn't allowed?
PATCH v2 7/10 tegra20: add SPL config options for seaboard
Quoted 32 lines · Stephen Warren
Quoted 10 lines · Sughosh Ganu
Quoted 1 line · Stephen Warren
On 06/05/2012 03:20 PM, Allen Martin wrote:
<snip>
Quoted 5 lines
Quoted 4 lines
include/configs/tegra2-spl.h +2
-0+* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. Quoted 6 lines
Quoted 1 line
Being a new file, this should be GPLv2 not GPLv2+.
u-boot uses GPLv2+.
http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign
http://www.mail-archive.com/u-boot at lists.denx.de/msg26569.htmlSughosh,
I guess I'm a little confused here.
COPYING in the U-Boot source tree states the following:
Quoted 7 lines
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code for details). You can redistribute U-Boot and/or modify it under the terms of version 2 of the GNU General Public License as published by the Free Software Foundation. Most of it can also be distributed, at your option, under any later version of the GNU General Public License -- see individual files for exceptions.
Quoted 3 lines
... which explicitly allows for either GPLv2 or GPLv2+ code. There is certainly GPLv2-only code already in U-Boot. Why do you say that GPLv2-only code isn't allowed?
I guess that could be because some of the existing files in u-boot are released under GPLv2 only license -- hence a separate mention that most of the files can be distributed under any later version too . Both Wolfgang and Detlev have stated many a times on the mailing list earlier that all new files need to be released under GPLv2+, and not GPLv2 only.
-sughosh
PATCH v2 7/10 tegra20: add SPL config options for seaboard
Quoted 37 lines · Sughosh Ganu
Quoted 32 lines · Stephen Warren
Quoted 10 lines · Sughosh Ganu
Quoted 1 line · Stephen Warren
On 06/05/2012 03:20 PM, Allen Martin wrote:
<snip>
Quoted 5 lines
Quoted 4 lines
include/configs/tegra2-spl.h +2
-0+* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. Quoted 6 lines
Quoted 1 line
Being a new file, this should be GPLv2 not GPLv2+.
u-boot uses GPLv2+.
http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign
http://www.mail-archive.com/u-boot at lists.denx.de/msg26569.htmlSughosh,
I guess I'm a little confused here.
COPYING in the U-Boot source tree states the following:
Quoted 7 lines
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code for details). You can redistribute U-Boot and/or modify it under the terms of version 2 of the GNU General Public License as published by the Free Software Foundation. Most of it can also be distributed, at your option, under any later version of the GNU General Public License -- see individual files for exceptions.Quoted 3 lines
... which explicitly allows for either GPLv2 or GPLv2+ code. There is certainly GPLv2-only code already in U-Boot. Why do you say that GPLv2-only code isn't allowed?
Quoted 6 lines
I guess that could be because some of the existing files in u-boot are released under GPLv2 only license -- hence a separate mention that most of the files can be distributed under any later version too . Both Wolfgang and Detlev have stated many a times on the mailing list earlier that all new files need to be released under GPLv2+, and not GPLv2 only.
Hmmm. It seems like a good idea for COPYING to be updated to be explicit
re: why that exemption is there, to avoid future confusion.
I assume the requirement for GPLv2+ only applies to new code written for U-Boot, not existing code that's being taken from or derived from some other GPLv2-only project?
PATCH v2 8/10 tegra20: add u-boot.t2 target
In reply to Allen MartinAdd target for tegra20 u-boot image. This is a concatenation of tegra spl and normal u-boot binaries.
--- .gitignore | 1 + Makefile | 11 +++++++++++ board/nvidia/seaboard/config.mk | 1 + 3 files changed, 13 insertions(+) create mode 100644 board/nvidia/seaboard/config.mk
.gitignore +1 -0
@@ -39,6 +39,7 @@ /u-boot.ais /u-boot.dtb /u-boot.sb +/u-boot.t2 # # Generated files
Makefile +11 -0
@@ -456,6 +456,16 @@ $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin elftosb -zdf imx28 -c $(TOPDIR)/board/$(BOARDDIR)/u-boot.bd \ -o $(obj)u-boot.sb +ifeq ($(CONFIG_OF_SEPARATE),y) +T2_UBOOT=$(obj)u-boot-dtb.bin +else +T2_UBOOT=$(obj)u-boot.bin +endif +$(obj)u-boot.t2: $(obj)spl/u-boot-spl.bin $(T2_UBOOT) + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin + cat $(obj)spl/u-boot-spl-pad.bin $(T2_UBOOT) > $(obj)u-boot.t2 + rm $(obj)spl/u-boot-spl-pad.bin + ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ cd $(LNDIR) && $(CC) $(SYMS) -T $(obj)u-boot.lds \
@@ -775,6 +785,7 @@ clobber: tidy @rm -f $(obj)u-boot.ais @rm -f $(obj)u-boot.dtb @rm -f $(obj)u-boot.sb + @rm -f $(obj)u-boot.t2 @rm -f $(obj)tools/inca-swap-bytes @rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c @rm -f $(obj)arch/powerpc/cpu/mpc83xx/ddr-gen?.c
board/nvidia/seaboard/config.mk new file +1 -0
@@ -0,0 +1 @@ +PAD_TO=0x00108000
Signature · 1 line
1.7.9.5
PATCH v2 8/10 tegra20: add u-boot.t2 target
board/nvidia/seaboard/config.mk
Quoted 6 lines · Allen Martin
Add target for tegra20 u-boot image. This is a concatenation of tegra spl and normal u-boot binaries.
board/nvidia/seaboard/config.mk +1
-0+PAD_TO=0x00108000
Oh crap, does this mean that we have to start flashing the combined u-boot.t2 at 0x8000 (IIRC the start address of the SPL in an earlier patch) instead of 0x108000? That would cause all kinds of problems. If that is the case, can we move the SPL to the existing 0x108000, and bump the regular U-Boot up a bit to make space? If that isn't the case, could you please explain exactly how the SPL memory layout etc. works for me? Thanks.
PATCH v2 8/10 tegra20: add u-boot.t2 target
Quoted 8 lines · Stephen Warren
board/nvidia/seaboard/config.mk
Quoted 6 lines · Allen Martin
Add target for tegra20 u-boot image. This is a concatenation of tegra spl and normal u-boot binaries.
board/nvidia/seaboard/config.mk +1
-0+PAD_TO=0x00108000
Quoted 7 lines
Oh crap, does this mean that we have to start flashing the combined u-boot.t2 at
0x8000(IIRC the start address of the SPL in an earlier patch) instead of0x108000? That would cause all kinds of problems. If that is the case, can we move the SPL to the existing0x108000, and bump the regular U-Boot up a bit to make space? If that isn't the case, could you please explain exactly how the SPL memory layout etc. works for me? Thanks.
The addresses are arbitrary, I picked 0x8000 for the SPL to preserve the existing 0x108000 for the normal u-boot but it doesn't have to be that way. The only requirement is that the SPL needs to know the address of the normal u-boot at compile time because it doesn't have any smarts to look for it.
I'll move the SPL to 0x108000 and the normal u-boot to 0x208000 if that sounds more acceptable.
-Allen
Signature · 1 line
nvpublic
PATCH v2 8/10 tegra20: add u-boot.t2 target
Allen,
Quoted 26 lines
-----Original Message-----
From: Allen Martin [mailto:amartin at nvidia.com]
Sent: Wednesday, June 06, 2012 12:37 PM
To: Stephen Warren
Cc: Tom Warren; sjg at chromium.org; u-boot at lists.denx.de
Subject: Re: [PATCH v2 08/10] tegra20: add u-boot.t2 targetQuoted 7 lines · Stephen Warren
Quoted 5 lines · Allen Martin
Add target for tegra20 u-boot image. This is a concatenation of tegra spl and normal u-boot binaries.
board/nvidia/seaboard/config.mk +0
-0Quoted 8 lines
Quoted 1 line
+PAD_TO=0x00108000
Oh crap, does this mean that we have to start flashing the combined u-boot.t2 at
0x8000(IIRC the start address of the SPL in an earlier patch) instead of0x108000? That would cause all kinds of problems. If that is the case, can we move the SPL to the existing0x108000, and bump the regular U-Boot up a bit to make space? If that isn't the case, could you please explain exactly how the SPL memory layout etc.works for me?
Quoted 1 line
Thanks.
Quoted 7 lines
The addresses are arbitrary, I picked
0x8000for the SPL to preserve the existing0x108000for the normal u-boot but it doesn't have to be that way. The only requirement is that the SPL needs to know the address of the normal u-boot at compile time because it doesn't have any smarts to look for it.I'll move the SPL to
0x108000and the normal u-boot to0x208000if that sounds more acceptable.
The current flash tools everyone is using expect to flash U-Boot to 0x0108000 (on T20). This works with the non-SPL (current) upstream U-Boot for Tegra, and should continue to work for any new SPL Tegra U-Boot, so that people can use the same flash tools for either build.
Note that the above statement assumes we'll still be able to build either a 'normal' non-SPL build of Tegra U-Boot and a SPL build with your patchset, at least in the interim while we're testing/reviewing these major changes.
Thanks,
Tom
Quoted 2 lines
-Allen
Signature · 1 line
nvpublic
PATCH v2 8/10 tegra20: add u-boot.t2 target
Quoted 33 lines · Tom Warren
Allen,
Quoted 31 lines
-----Original Message-----
From: Allen Martin [mailto:amartin at nvidia.com]
Sent: Wednesday, June 06, 2012 12:37 PM
To: Stephen Warren
Cc: Tom Warren; sjg at chromium.org; u-boot at lists.denx.de
Subject: Re: [PATCH v2 08/10] tegra20: add u-boot.t2 targetQuoted 7 lines · Stephen Warren
Quoted 5 lines · Allen Martin
Add target for tegra20 u-boot image. This is a concatenation of tegra spl and normal u-boot binaries.
board/nvidia/seaboard/config.mk +0
-0Quoted 8 lines
Quoted 1 line
+PAD_TO=0x00108000
Oh crap, does this mean that we have to start flashing the combined u-boot.t2 at
0x8000(IIRC the start address of the SPL in an earlier patch) instead of0x108000? That would cause all kinds of problems. If that is the case, can we move the SPL to the existing0x108000, and bump the regular U-Boot up a bit to make space? If that isn't the case, could you please explain exactly how the SPL memory layout etc.works for me?
Quoted 1 line
Thanks.
The addresses are arbitrary, I picked
0x8000for the SPL to preserve the existing0x108000for the normal u-boot but it doesn't have to be that way. The only requirement is that the SPL needs to know the address of the normal u-boot at compile time because it doesn't have any smarts to look for it.
Quoted 5 lines
Quoted 2 lines
I'll move the SPL to
0x108000and the normal u-boot to0x208000if that sounds more acceptable.The current flash tools everyone is using expect to flash U-Boot to
0x0108000(on T20). This works with the non-SPL (current) upstream U-Boot for Tegra, and should continue to work for any new SPL Tegra U-Boot, so that people can use the same flash tools for either build.Note that the above statement assumes we'll still be able to build either a 'normal' non-SPL build of Tegra U-Boot and a SPL build with your patchset, at least in the interim while we're testing/reviewing these major changes.
I assume that once a board is converted to SPL, you always use a matched/concatenated pair of SPL+non-SPL, i.e. never SPL on its own or non-SPL on its own?
But that does bring up one point - boards which haven't yet converted to SPL need to still build/link for the original 00108000 address, so the addresses need to depend on config data.
Either that, or just convert all boards at once?
PATCH v2 8/10 tegra20: add u-boot.t2 target
Quoted 11 lines · Stephen Warren
Quoted 6 lines · Tom Warren
Quoted 3 lines
I'll move the SPL to
0x108000and the normal u-boot to0x208000if that sounds more acceptable.The current flash tools everyone is using expect to flash U-Boot to
0x0108000(on T20). This works with the non-SPL (current) upstream U-Boot for Tegra, and should continue to work for any new SPL Tegra U-Boot, so that people can use the same flash tools for either build.Note that the above statement assumes we'll still be able to build either a 'normal' non-SPL build of Tegra U-Boot and a SPL build with your patchset, at least in the interim while we're testing/reviewing these major changes.
I assume that once a board is converted to SPL, you always use a matched/concatenated pair of SPL+non-SPL, i.e. never SPL on its own or non-SPL on its own?
Yes, that's the intention. Although I do have plans down the road for adding memory initialization to the SPL so I can use it for boot/flashing when in recovery mode and there's no BCT. In the normal case they have to be used together.
Quoted 6 lines
But that does bring up one point - boards which haven't yet converted to SPL need to still build/link for the original 00108000 address, so the addresses need to depend on config data.
Either that, or just convert all boards at once?
I'll need to convert all the boards. Since I removed the Cortex A9 init from the normal u-boot it will no longer work for non SPL boot. I think that's what we want anyway, I just may need some help testing some of the boards I don't have.
-Allen
Signature · 1 line
nvpublic
PATCH v2 8/10 tegra20: add u-boot.t2 target
Quoted 9 lines · Allen Martin
Quoted 8 lines · Stephen Warren
Quoted 6 lines · Tom Warren
Quoted 3 lines
I'll move the SPL to
0x108000and the normal u-boot to0x208000if that sounds more acceptable.The current flash tools everyone is using expect to flash U-Boot to
0x0108000(on T20). This works with the non-SPL (current) upstream U-Boot for Tegra, and should continue to work for any new SPL Tegra U-Boot, so that people can use the same flash tools for either build.Note that the above statement assumes we'll still be able to build either a 'normal' non-SPL build of Tegra U-Boot and a SPL build with your patchset, at least in the interim while we're testing/reviewing these major changes.
Quoted 8 lines
Quoted 3 lines
I assume that once a board is converted to SPL, you always use a matched/concatenated pair of SPL+non-SPL, i.e. never SPL on its own or non-SPL on its own?
Yes, that's the intention. Although I do have plans down the road for adding memory initialization to the SPL so I can use it for boot/flashing when in recovery mode and there's no BCT. In the normal case they have to be used together.
How would that work; in the regular boot process, SPL would be linked to e.g. 00108000 since the boot ROM will put it into SDRAM. However, in recovery mode, code will be downloaded to the IRAM, so would have to be linked to a different address, and hence the same SPL binary couldn't be used. At that point, aren't we looking at:
* Regular boot SPL, which just sets up a few PLLs and jump-starts the A9s.
* Regular boot full-blown U-Boot to run on the A9s.
* Some third build t run from IRAM.
Or am I missing something?
PATCH v2 8/10 tegra20: add u-boot.t2 target
Quoted 12 lines · Stephen Warren
Quoted 4 lines · Allen Martin
Yes, that's the intention. Although I do have plans down the road for adding memory initialization to the SPL so I can use it for boot/flashing when in recovery mode and there's no BCT. In the normal case they have to be used together.
How would that work; in the regular boot process, SPL would be linked to e.g. 00108000 since the boot ROM will put it into SDRAM. However, in recovery mode, code will be downloaded to the IRAM, so would have to be linked to a different address, and hence the same SPL binary couldn't be used. At that point, aren't we looking at:
Quoted 5 lines
* Regular boot SPL, which just sets up a few PLLs and jump-starts the A9s.
* Regular boot full-blown U-Boot to run on the A9s.
* Some third build t run from IRAM.Or am I missing something?
No, that's spot on, it's just that #3 and #1 above are very similar, only a few build/config tweaks should separate them. I've already hacked up an SPL to boot from IRAM as proof of concept and loaded it in recovery mode. But you're right, it has to be a separate build.
-Allen
Signature · 1 line
nvpublic
PATCH v2 9/10 tegra20: Remove CPU init code from tegra20 u-boot
In reply to Allen MartinThis code is now included in the tegra20 SPL
--- arch/arm/cpu/armv7/start.S | 2 - arch/arm/cpu/tegra20-common/ap20.c | 262 +---------------------------------- arch/arm/cpu/tegra20-common/board.c | 27 +--- include/configs/tegra2-common.h | 4 - 4 files changed, 8 insertions(+), 287 deletions(-)
arch/arm/cpu/armv7/start.S +0 -2
@@ -133,7 +133,6 @@ reset: orr r0, r0, #0xd3 msr cpsr,r0 -#if !defined(CONFIG_TEGRA2) /* * Setup vector: * (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -149,7 +148,6 @@ reset: ldr r0, =_start mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif -#endif /* !Tegra2 */ /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT
arch/arm/cpu/tegra20-common/ap20.c +3 -259
293 lines not on this page · raw message
arch/arm/cpu/tegra20-common/board.c +5 -22
@@ -23,7 +23,6 @@#include <common.h> #include <asm/io.h> -#include <asm/arch/ap20.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pmc.h>
@@ -69,6 +68,11 @@ int dram_init(void) {/* We do not initialise DRAM here. We just query the size */ gd->ram_size =query_sdram_size (); + +#ifdef CONFIG_TEGRA2_LP0 +/* save Sdram params to PMC 2, 4, and 24 for WB0 */ +warmboot_save_sdram_params (); +#endif return 0 ; }
@@ -80,27 +84,6 @@ int checkboard(void) }#endif /* CONFIG_DISPLAY_BOARDINFO */ -#ifdef CONFIG_ARCH_CPU_INIT -/* -* Note this function is executed by the ARM7TDMI AVP. It does not return -* in this case. It is also called once the A9 starts up, but does nothing in -* that case. -*/ -int arch_cpu_init (void ) -{ -/* Fire up the Cortex A9 */ -tegra2_start (); - -/* We didn't do this init in start.S, so do it now */ -cpu_init_cp15 (); - -/* Initialize essential common plls */ -clock_early_init (); - -return 0 ; -} -#endif -/** * Set up the specified uarts *
include/configs/tegra2-common.h +0 -4
@@ -43,8 +43,6 @@#define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */ -#include <asm/arch/tegra2.h> /* get chip and board defs */ /*
@@ -53,8 +51,6 @@#define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_OF_LIBFDT /* enable passing of devicetree */
Signature · 1 line
1.7.9.5
PATCH v2 9/10 tegra20: Remove CPU init code from tegra20 u-boot
arch/arm/cpu/tegra20-common/ap20.c void init_pmc_scratch(void) · line 94
Quoted 12 lines · Allen Martin
This code is now included in the tegra20 SPL
arch/arm/cpu/tegra20-common/ap20.c +0
-5@@ -323,34 +91,10 @@ void init_pmc_scratch(void)/* ODMDATA is for kernel use to determine RAM size, LP config, etc. */ writel (CONFIG_SYS_BOARD_ODMDATA , &pmc->pmc_scratch20); - -#ifdef CONFIG_TEGRA2_LP0 -/* save Sdram params to PMC 2, 4, and 24 for WB0 */ -warmboot_save_sdram_params (); -#endif }
Is that change intended, or was it a rebase mistake?
arch/arm/cpu/tegra20-common/board.c int dram_init(void) · line 75
Quoted 11 lines
arch/arm/cpu/tegra20-common/board.c +5
-0@@ -69,6 +68,11 @@ int dram_init(void) {/* We do not initialise DRAM here. We just query the size */ gd->ram_size =query_sdram_size (); + +#ifdef CONFIG_TEGRA2_LP0 +/* save Sdram params to PMC 2, 4, and 24 for WB0 */ +warmboot_save_sdram_params (); +#endif
Hmmm. That's more than just removing the code that's now in the AVP directory. Separate patch? The patch description also doesn't say why this change is necessary.
PATCH v2 9/10 tegra20: Remove CPU init code from tegra20 u-boot
Quoted 18 lines · Stephen Warren
arch/arm/cpu/tegra20-common/ap20.c void init_pmc_scratch(void) · line 94
Quoted 12 lines · Allen Martin
This code is now included in the tegra20 SPL
arch/arm/cpu/tegra20-common/ap20.c +0
-5@@ -323,34 +91,10 @@ void init_pmc_scratch(void)/* ODMDATA is for kernel use to determine RAM size, LP config, etc. */ writel (CONFIG_SYS_BOARD_ODMDATA , &pmc->pmc_scratch20); - -#ifdef CONFIG_TEGRA2_LP0 -/* save Sdram params to PMC 2, 4, and 24 for WB0 */ -warmboot_save_sdram_params (); -#endif }Is that change intended, or was it a rebase mistake?
Quoted 1 line
arch/arm/cpu/tegra20-common/board.c +0
-0
Quoted 13 lines
arch/arm/cpu/tegra20-common/board.c int dram_init(void) · line 75
Quoted 9 lines
arch/arm/cpu/tegra20-common/board.c +5
-0@@ -69,6 +68,11 @@ int dram_init(void) {/* We do not initialise DRAM here. We just query the size */ gd->ram_size =query_sdram_size (); + +#ifdef CONFIG_TEGRA2_LP0 +/* save Sdram params to PMC 2, 4, and 24 for WB0 */ +warmboot_save_sdram_params (); +#endif Hmmm. That's more than just removing the code that's now in the AVP directory. Separate patch? The patch description also doesn't say why this change is necessary.
This code was added since v1 of the patch series, and I had to move it because when I fixed it so we could use the normal lowlevel_init it gets called before the devicetree is initialized.
I rolled it into this patch, but you're probably right, it would make more sense to be in it's own patch with a proper description.
-Allen
Signature · 1 line
nvpublic
PATCH v2 10/10 tegra20: Remove armv4t build flags
In reply to Allen MartinThese flags were necessary when building tegra20 as a single binary that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support is split into a separate SPL, this is no longer necessary.
--- arch/arm/cpu/armv7/tegra20/config.mk | 7 ------- 1 file changed, 7 deletions(-)
arch/arm/cpu/armv7/tegra20/config.mk +0 -7
@@ -23,13 +23,6 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # - -# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this -# file with compatible flags -ifdef CONFIG_TEGRA2 -CFLAGS_arch/arm/lib/board.o += -march=armv4t -endif - USE_PRIVATE_LIBGCC = yes CONFIG_ARCH_DEVICE_TREE := tegra20
Signature · 1 line
1.7.9.5
PATCH v2 10/10 tegra20: Remove armv4t build flags
Quoted 3 lines · Allen Martin
These flags were necessary when building tegra20 as a single binary that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support is split into a separate SPL, this is no longer necessary.
Can we also (probably in a separate patch) remove USE_PRIVATE_LIBGCC from the makefiles/... wherever we define it for Tegra? At least for the non-SPL build; presumably the SPL build will still need it.
v2 cover split tegra20 arm7 code into separate SPL
In reply to Allen MartinAllen,
Quoted 32 lines
-----Original Message-----
From: Allen Martin [mailto:amartin at nvidia.com]
Sent: Tuesday, June 05, 2012 2:20 PM
To: Tom Warren; swarren at wwwdotorg.org; sjg at chromium.org
Cc: u-boot at lists.denx.de
Subject: [PATCH v2 0/10] split tegra20 arm7 code into separate SPLThis patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI.
This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image.
Changes:
v2:
- renamed tegra2 to tegra20 to match kernel and devicetree naming policy
- pulled all SPL related config overrides to a separate file to clean up
ifdefs fromseabard.h
- rebased to TOT u-boot/master and fixed a bug related to init sequence
changes between this patch series and new EMC code
- made u-boot.t2 target work even ifCONFIG_OFis disabled
- added backUSE_PRIVATE_LIBGCC
Quoted 8 lines
[PATCH 01/10] tegra20: rename tegra2 -> tegra20 [PATCH 02/10] tegra20: move tegra20 SoC code to [PATCH 03/10] mkconfig: add support for SPL CPU [PATCH 04/10] ARM: Fix arm720t SPL build [PATCH 05/10] tegra20: remove
timer_initfrom SPL build [PATCH 06/10] ARM: add tegra20 support to arm720t [PATCH 07/10] tegra20: add SPL config options for seaboard [PATCH 08/10] tegra20:
add u-boot.t2 target [PATCH 09/10] tegra20: Remove CPU init code from tegra20 u-boot [PATCH 10/10] tegra20: Remove armv4t build flags
Did you use the -C option for format-patch? I'd expect a lot of these file moves to show up as simple renames.
Tom
Quoted 105 lines
.gitignore | 1 - Makefile | 14 - arch/arm/cpu/arm720t/cpu.c | 2 - arch/arm/cpu/arm720t/interrupts.c | 4 - arch/arm/cpu/arm720t/start.S | 19 +- arch/arm/cpu/arm720t/tegra20/Makefile | 48 - arch/arm/cpu/arm720t/tegra20/board.h | 25 - arch/arm/cpu/arm720t/tegra20/cpu.c | 259 ----- arch/arm/cpu/arm720t/tegra20/cpu.h | 99 -- arch/arm/cpu/arm720t/tegra20/spl.c | 133 --- arch/arm/cpu/armv7/start.S | 2 + arch/arm/cpu/armv7/tegra2/Makefile | 59 ++ arch/arm/cpu/armv7/tegra2/ap20.c | 366 +++++++ arch/arm/cpu/armv7/tegra2/board.c | 151 +++ arch/arm/cpu/armv7/tegra2/clock.c | 1087 ++++++++++++++++++++ arch/arm/cpu/armv7/tegra2/config.mk | 35 + arch/arm/cpu/armv7/tegra2/crypto.c | 230 +++++ arch/arm/cpu/armv7/tegra2/crypto.h | 36 + arch/arm/cpu/armv7/tegra2/emc.c | 286 +++++ arch/arm/cpu/armv7/tegra2/funcmux.c | 200 ++++ arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 42 + arch/arm/cpu/armv7/tegra2/pinmux.c | 572 ++++++++++ arch/arm/cpu/armv7/tegra2/pmu.c | 70 ++ arch/arm/cpu/armv7/tegra2/sys_info.c | 35 + arch/arm/cpu/armv7/tegra2/timer.c | 111 ++ arch/arm/cpu/armv7/tegra2/usb.c | 460 +++++++++ arch/arm/cpu/armv7/tegra2/warmboot.c | 386 +++++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.c | 250 +++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.h | 81 ++ arch/arm/cpu/armv7/tegra20/Makefile | 48 - arch/arm/cpu/armv7/tegra20/config.mk | 28 - arch/arm/cpu/armv7/tegra20/usb.c | 460 --------- arch/arm/cpu/tegra20-common/Makefile | 59 -- arch/arm/cpu/tegra20-common/ap20.c | 110 -- arch/arm/cpu/tegra20-common/board.c | 134 --- arch/arm/cpu/tegra20-common/clock.c | 1087 ----------------- --- arch/arm/cpu/tegra20-common/crypto.c | 230 ----- arch/arm/cpu/tegra20-common/crypto.h | 36 - arch/arm/cpu/tegra20-common/emc.c | 286 ----- arch/arm/cpu/tegra20-common/funcmux.c | 200 ---- arch/arm/cpu/tegra20-common/lowlevel_init.S | 42 - arch/arm/cpu/tegra20-common/pinmux.c | 572 ---------- arch/arm/cpu/tegra20-common/pmu.c | 70 -- arch/arm/cpu/tegra20-common/sys_info.c | 35 - arch/arm/cpu/tegra20-common/timer.c | 111 -- arch/arm/cpu/tegra20-common/warmboot.c | 386 ------- arch/arm/cpu/tegra20-common/warmboot_avp.c | 250 ----- arch/arm/cpu/tegra20-common/warmboot_avp.h | 81 -- arch/arm/include/asm/arch-tegra2/ap20.h | 109 ++ arch/arm/include/asm/arch-tegra2/apb_misc.h | 36 + arch/arm/include/asm/arch-tegra2/board.h | 30 + arch/arm/include/asm/arch-tegra2/clk_rst.h | 147 +++ arch/arm/include/asm/arch-tegra2/clock.h | 406 ++++++++ arch/arm/include/asm/arch-tegra2/emc.h | 113 ++ arch/arm/include/asm/arch-tegra2/flow.h | 36 + arch/arm/include/asm/arch-tegra2/funcmux.h | 69 ++ arch/arm/include/asm/arch-tegra2/fuse.h | 39 + arch/arm/include/asm/arch-tegra2/gp_padctrl.h | 73 ++ arch/arm/include/asm/arch-tegra2/gpio.h | 289 ++++++ arch/arm/include/asm/arch-tegra2/mmc.h | 27 + arch/arm/include/asm/arch-tegra2/pinmux.h | 354 +++++++ arch/arm/include/asm/arch-tegra2/pmc.h | 132 +++ arch/arm/include/asm/arch-tegra2/pmu.h | 30 + arch/arm/include/asm/arch-tegra2/scu.h | 43 + arch/arm/include/asm/arch-tegra2/sdram_param.h | 148 +++ arch/arm/include/asm/arch-tegra2/sys_proto.h | 35 + arch/arm/include/asm/arch-tegra2/tegra2.h | 86 ++ arch/arm/include/asm/arch-tegra2/tegra2_spi.h | 76 ++ arch/arm/include/asm/arch-tegra2/tegra_i2c.h | 164 +++ arch/arm/include/asm/arch-tegra2/timer.h | 30 + arch/arm/include/asm/arch-tegra2/uart-spi-switch.h | 46 + arch/arm/include/asm/arch-tegra2/uart.h | 47 + arch/arm/include/asm/arch-tegra2/usb.h | 252 +++++ arch/arm/include/asm/arch-tegra2/warmboot.h | 150 +++ arch/arm/include/asm/arch-tegra20/ap20.h | 109 -- arch/arm/include/asm/arch-tegra20/apb_misc.h | 36 - arch/arm/include/asm/arch-tegra20/board.h | 30 - arch/arm/include/asm/arch-tegra20/clk_rst.h | 147 --- arch/arm/include/asm/arch-tegra20/clock.h | 406 -------- arch/arm/include/asm/arch-tegra20/emc.h | 113 -- arch/arm/include/asm/arch-tegra20/flow.h | 36 - arch/arm/include/asm/arch-tegra20/funcmux.h | 69 -- arch/arm/include/asm/arch-tegra20/fuse.h | 39 - arch/arm/include/asm/arch-tegra20/gp_padctrl.h | 73 -- arch/arm/include/asm/arch-tegra20/gpio.h | 289 ------ arch/arm/include/asm/arch-tegra20/hardware.h | 29 - arch/arm/include/asm/arch-tegra20/mmc.h | 27 - arch/arm/include/asm/arch-tegra20/pinmux.h | 354 ------- arch/arm/include/asm/arch-tegra20/pmc.h | 132 --- arch/arm/include/asm/arch-tegra20/pmu.h | 30 - arch/arm/include/asm/arch-tegra20/scu.h | 43 - arch/arm/include/asm/arch-tegra20/sdram_param.h | 148 --- arch/arm/include/asm/arch-tegra20/sys_proto.h | 35 - arch/arm/include/asm/arch-tegra20/tegra2.h | 86 -- arch/arm/include/asm/arch-tegra20/tegra2_spi.h | 76 -- arch/arm/include/asm/arch-tegra20/tegra_i2c.h | 164 --- arch/arm/include/asm/arch-tegra20/timer.h | 30 - .../arm/include/asm/arch-tegra20/uart-spi-switch.h | 46 - arch/arm/include/asm/arch-tegra20/uart.h | 47 - arch/arm/include/asm/arch-tegra20/usb.h | 252 ----- arch/arm/include/asm/arch-tegra20/warmboot.h | 150 --- board/nvidia/common/board.c | 2 - board/nvidia/seaboard/config.mk | 1 -
Quoted 9 lines
boards.cfg | 17 +- doc/README.SPL | 12 - include/configs/seaboard.h | 6 - include/configs/tegra2-common.h | 21 +- include/configs/tegra2-spl.h | 87 -- mkconfig | 15 +- spl/Makefile | 4 - 110 files changed, 7438 insertions(+), 7978 deletions(-)
--
nvpublic
v2 cover split tegra20 arm7 code into separate SPL
Quoted 3 lines · Tom Warren
Quoted 1 line
Did you use the -C option for format-patch? I'd expect a lot of these file moves to show up as simple renames.
Yes, if you look inside "[PATCH v2 01/10] tegra20: rename tegra2 -> tegra20" for example, all the renames came out ok, I think it's just the diff stats in the summary that are wrong.
-Allen
Signature · 1 line
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