arm: Add basic support for new Marvell Armada 370 and Armada XP SoC
Subsystems (5)
PATCH v6 1/1 arm: Add basic support for new Marvell Armada 370 and Armada XP SoC
Arnd, Olof,
You'll find in this patch set the sixth version of the initial support for a new family of ARMv7-compatible Marvell SoCs.
Do you think this patch set has a chance of hitting the 3.6 merge window?
We are willing to quickly resubmit updated versions to take into account new comments. We have a lot more code to support those new SoCs, and we would like to make progress in submitting those other parts for the mainline.
As for the previous releases, both the Armada 370 and the Armada XP SoCs are supported in this directory, and we are able to build a single kernel image that boots on both SoCs. Both SoCs use the PJ4B processor, a Marvell-developed ARM core that implements the ARMv7 instruction set. We are currently using Marvell evaluation boards for both of those SoCs, and the support for those boards is added in this patch set.
We remained focused on a limited preliminary support which only includes the necessary code for timer and IRQ support, the serial controller is a standard 16550-compatible one. The diffstat looks like:
Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt | 23 Documentation/devicetree/bindings/arm/armada-370-xp-timer.txt | 11 Documentation/devicetree/bindings/arm/armada-370-xp.txt | 24 Documentation/devicetree/bindings/arm/mvebu-system-controller.txt | 17 MAINTAINERS | 8 arch/arm/Kconfig | 14 arch/arm/Makefile | 1 arch/arm/boot/dts/armada-370-db.dts | 42 + arch/arm/boot/dts/armada-370-xp.dtsi | 68 ++ arch/arm/boot/dts/armada-370.dtsi | 35 + arch/arm/boot/dts/armada-xp-db.dts | 50 ++ arch/arm/boot/dts/armada-xp.dtsi | 55 ++ arch/arm/configs/mvebu_defconfig | 46 + arch/arm/mach-mvebu/Kconfig | 16 arch/arm/mach-mvebu/Makefile | 2 arch/arm/mach-mvebu/Makefile.boot | 1 arch/arm/mach-mvebu/armada-370-xp.c | 63 ++ arch/arm/mach-mvebu/common.h | 23 arch/arm/mach-mvebu/include/mach/armada-370-xp.h | 22 arch/arm/mach-mvebu/include/mach/debug-macro.S | 24 arch/arm/mach-mvebu/include/mach/timex.h | 13 arch/arm/mach-mvebu/include/mach/uncompress.h | 43 + arch/arm/mach-mvebu/irq-armada-370-xp.c | 133 +++++ arch/arm/mach-mvebu/system-controller.c | 105 ++++ drivers/clocksource/Kconfig | 3 drivers/clocksource/Makefile | 3 drivers/clocksource/time-armada-370-xp.c | 242 ++++++++++ include/linux/time-armada-370-xp.h | 18 28 files changed, 1104 insertions(+), 1 deletion(-)
This patch set, and the support for those SoCs, started as a collaborative effort from Marvell engineers (who have done the initial development work) and Free Electrons engineers (who are reshaping the code for mainline submission, adding device tree support, etc.). This effort has also received contributions from Ben Dooks from Codethink.
The patch set is based on your arm-soc/for-next branch (updated on Sunday 1st July).
Changes between v5 and v6:
* Clarify the error message shown when restarting but no system controller was configured, and use pr_err() instead of pr_warn.
* Remove the 'asmlinkage' qualifier from common.h, since it is useless in a header file (thanks to Ben Dooks for noticing)
* Integrate two patches from Ben Dooks (fixup style/indentation, and check result of of_match_node() in the system-controller.c driver). Since those patches were fixing relatively minor issues, I simply folded them into the original corresponding patches, in order to keep a nice a clean patch set.
* Rebased on top of the latest arm-soc/for-next branch.
Changes between v4 and v5:
* For system controller mvebu_other is renamed to orion for a better description of the subset including Dove, mv78xx0, Kirkwood and Orion5x.
* The system controller code is improved following Arnd advices. Now it uses pointers to data structures instead of defines and if/else statements.
* The restart function never returns anymore, even if no system controller was configured.
* The listing of the MVEBU family device tree in the binding documentation for system controller is fixed.
Changes between v3 and v4:
* If the system controller device is not found during initialization, no more warnings are issued and the function doesn't fail.
* The system controller driver becomes more generic to handle the other mvebu SoCs. Inside the device tree it is now called either armada-370-xp-system-controller or mvebu-other-system-controller. Then depending of the compatibility name the driver selects the accurate offset and bit mask. The way to handle different variants of the same controller was inspired by the of_serial.c file.
* A documentation was added for the "system-controller" binding
* The "select CPU_V7" was moved from ARCH_MVEBU in arch/arm/Kconfig to MACH_ARMADA_370_XP in arch/arm/mach-mvebu/Kconfig. Thanks to this the other mvebu" machines will be able to use CPU_V5
* Some armada_370_xp strings have been renamed to armada-370-xp to keep the coherency with other parts of the code.
Changes between v2 and v3:
* The timer support code has been moved to drivers/clocksource/ and the necessary related changes have been made
* There is now a minimal "system-controller" driver that gets instantiated through DT entries. This driver allows to expose the features made available through a set of miscellaneous registers that do not belong to any specific device in the SoC. For the moment, we only use it to implement the .restart() hook.
* The defconfig has been changed to allow the support for up to four 8250-compatible serial ports, since Armada XP has four such ports. The DTS file has been modified to enable those four ports, and they have all been tested successfully on the Armada XP DB development platform.
* Moved the "arm: mach-mvebu: add compilation/configuration change" patch towards the end of the patch set
* Marked the "serial" device as "disabled" in the .dtsi file, and enable the ones that are actually used in the board specific .dts file.
* Dropped the _dt suffix as the device tree support is implicit now.
* Don't use anymore a MVEBU_REGS_PHYS_BASE define and reintroduce a ARMADA_370_XP_REGS_PHYS_BASE define.
Changes between v1 and v2:
* Use the mach-mvebu directory as suggested on the mailing-list. So far, this directory only contains the support for Armada 370/XP, but the plan is that it should ultimately contain the support for all other SoCs produced by the Marvell Engineering Business Unit.
* Converted most the "armada" word by the "mvebu", but as some code remains specific to the Armada 370 and Armada XP SOC, then created also the aramada_370_xp suffix for this part. This suffix was dedicated for the irq and timer part. It was also used for the register related to the reset part. And of course it was also used for the device tree part.
* Merged axp-dt.c and a370-dt.c files in one single armada_370_xp-dt.c file.
* Deleted most of the mapping address in include/mach/armada.h and split it in two headers file:
- mvebu.h which contains the virtual and physical mapping for the internal registers of the mvebu SOC. This ones are mainly used for the early print during boot.
- armada_370_xp which contains the registers offset and mask for resetting the CPU.
* Removed unused headers such as
- hardware.h by directly including accurate header when needed
- gpio.h by removing the dependencies to PLAT-ORION
- io.h no more needed for CPI
- irqs.h by using SPARSE_IRQ
- system.h no more needed for new SOC
* Removed the PCI related code as it was not necessary for the initial submission
* Removed all the PLAT-ORION dependencies remaining
* Ensured property reading checks for error when getting data from device tree in the timer file. This was a patch from Ben Dooks with the following comments:
"The call to of_property_read_u32() only checks for the value that
the clk variable is set to being non-zero, and not the return value of the call itself.
This caused a system without the clock-frequency attribute to fail to boot as it used a random value on the stack to setup the system timers and thus cause an interrupt storm.
Also ensure clk is set to zero, to avoid warnings."
* Converted irq controller code to use SPARSE_IRQ
* Added the following bug fixes and improvements in irq.c from Ben Dooks
- MPIC: BUG_ON() if the of_iomap() fails: Ensure that if either resource is missing, we stop the kernel in a reasonably fatal way.
- MPIC: Move main register base to base of MPIC registers: The current kernel driver had the MPIC base at the base of the block containing the MPIC and not the MPIC itself. Change this value in the driver and the .dtsi file
Also change the register size in the .dtsi to be the size of the register range for the MIPC and not the block it is in.
- MPIC: Move per-cpu register base: The current kernel driver had the MPIC per-cpu register base at the base of the per-cpu register block and not at the base of the specific per-cpu interrupt registers.
Move the driver and .dtsi to use the correct base and size.
- MPIC: number fetch should use irqd_to_hwirq(): The mask and unmask routines are assuming that d->irq is a 1:1 mapping with the interrupt hardware. Use the irqd_to_hwirq() call to map the irq_data to the hardware irq number directly.
- MPIC: read number of interrupts from control register: Read the number of MPIC interrupts from the controller and only register that many.
Best regards,
Thomas Petazzoni
PATCH 1/9 clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
From: Gregory Clement <[email protected]>
Timer 0 is used as free-running clocksource, while timer 1 is used as clock_event_device.
--- drivers/clocksource/Kconfig | 3 + drivers/clocksource/Makefile | 3 +- drivers/clocksource/time-armada-370-xp.c | 242 ++++++++++++++++++++++++++++++ include/linux/time-armada-370-xp.h | 18 +++ 4 files changed, 265 insertions(+), 1 deletion(-) create mode 100644 drivers/clocksource/time-armada-370-xp.c create mode 100644 include/linux/time-armada-370-xp.h
drivers/clocksource/Kconfig +3 -0
@@ -16,6 +16,9 @@ config CLKSRC_MMIO config DW_APB_TIMER bool +config ARMADA_370_XP_TIMER + bool + config CLKSRC_DBX500_PRCMU bool "Clocksource PRCMU Timer" depends on UX500_SOC_DB8500
drivers/clocksource/Makefile +2 -1
@@ -10,4 +10,5 @@ obj-$(CONFIG_EM_TIMER_STI) += em_sti.o obj-$(CONFIG_CLKBLD_I8253) += i8253.o obj-$(CONFIG_CLKSRC_MMIO) += mmio.o obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o -obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o +obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o +obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
drivers/clocksource/time-armada-370-xp.c new file +242 -0
242 lines not on this page · raw message
include/linux/time-armada-370-xp.h new file +18 -0
@@ -0,0 +1,18 @@ +/* +* Marvell Armada 370/XP SoC timer handling. +* +* Copyright (C) 2012 Marvell +* +* Lior Amsalem <[email protected]> +* Gregory CLEMENT <[email protected]> +* Thomas Petazzoni <[email protected]> +* +*/ +#ifndef __TIME_ARMADA_370_XPPRCMU_H +#define __TIME_ARMADA_370_XPPRCMU_H + +#include <linux/init.h> + +void __init armada_370_xp_timer_init (void ); + +#endif
Signature · 1 line
1.7.9.5
PATCH 1/9 clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
drivers/clocksource/time-armada-370-xp.c line 83
Quoted 13 lines · Thomas Petazzoni
From: Gregory Clement <[email protected]>
drivers/clocksource/time-armada-370-xp.c new file +12
-0+/* +* Clockevent handling. +*/ +static int +armada_370_xp_clkevt_next_event (unsigned long delta, +struct clock_event_device *dev) +{ +unsigned long flags; +u32 u; + +if (delta ==0 ) +return -ETIME ;
If you have a proper min_delta_ns value set up, then delta will never be 0. SO that check is pointless.
Review
Quoted 1 line
(quoted diff) +1
-0+ local_irq_save(flags);
That code is guaranteed to be called with interrupts disabled. No need for disabling them again.
drivers/clocksource/time-armada-370-xp.c line 117
Quoted 9 lines
drivers/clocksource/time-armada-370-xp.c new file +9
-0+ +static void +armada_370_xp_clkevt_mode (enum clock_event_mode mode, +struct clock_event_device *dev) +{ +unsigned long flags; +u32 u; + +local_irq_save (flags);
Ditto.
drivers/clocksource/time-armada-370-xp.c line 238
Quoted 10 lines
drivers/clocksource/time-armada-370-xp.c new file +10
-0+/* +* Setup clockevent timer (interrupt-driven). +*/ +setup_irq (timer_irq, &armada_370_xp_timer_irq); + armada_370_xp_clkevt.mult =div_sc (timer_clk,NSEC_PER_SEC , + armada_370_xp_clkevt.shift); + armada_370_xp_clkevt.max_delta_ns =clockevent_delta2ns (0xfffffffe , + &armada_370_xp_clkevt); + armada_370_xp_clkevt.min_delta_ns = +clockevent_delta2ns (1 , &armada_370_xp_clkevt);
clockevents_config_and_register() please.
Thanks,
tglx
PATCH 1/9 clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
Hello Thomas,
Le Mon, 2 Jul 2012 14:29:53 +0200 (CEST),
Thomas Gleixner <[email protected]> a ?crit :
Quoted 14 lines
drivers/clocksource/time-armada-370-xp.c line 83
Quoted 6 lines
drivers/clocksource/time-armada-370-xp.c new file +6
-0+{ +unsigned long flags; +u32 u; + +if (delta ==0 ) +return -ETIME ;If you have a proper
min_delta_nsvalue set up, then delta will never be 0. SO that check is pointless.Review
Quoted 1 line
(quoted diff) +1
-0+ local_irq_save(flags);That code is guaranteed to be called with interrupts disabled. No need for disabling them again.
Quoted 12 lines
drivers/clocksource/time-armada-370-xp.c line 238
Quoted 10 lines
drivers/clocksource/time-armada-370-xp.c new file +10
-0+/* +* Setup clockevent timer (interrupt-driven). +*/ +setup_irq (timer_irq, &armada_370_xp_timer_irq); + armada_370_xp_clkevt.mult =div_sc (timer_clk,NSEC_PER_SEC , + armada_370_xp_clkevt.shift); + armada_370_xp_clkevt.max_delta_ns =clockevent_delta2ns (0xfffffffe , + &armada_370_xp_clkevt); + armada_370_xp_clkevt.min_delta_ns = +clockevent_delta2ns (1 , &armada_370_xp_clkevt);
clockevents_config_and_register()please.
Thanks a lot for all those comments. I have fixed those in our tree, will be part of the next v7 posting. We'll just wait a bit more time in case other comments show up before posting this v7.
Thanks again for the review,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 2/9 arm: mach-mvebu: add header
In reply to Thomas Petazzoni--- arch/arm/mach-mvebu/include/mach/debug-macro.S | 24 +++++++++++++ arch/arm/mach-mvebu/include/mach/timex.h | 13 +++++++ arch/arm/mach-mvebu/include/mach/uncompress.h | 43 ++++++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 arch/arm/mach-mvebu/include/mach/debug-macro.S create mode 100644 arch/arm/mach-mvebu/include/mach/timex.h create mode 100644 arch/arm/mach-mvebu/include/mach/uncompress.h
arch/arm/mach-mvebu/include/mach/debug-macro.S new file +24 -0
@@ -0,0 +1,24 @@ +/* + * Early serial output macro for Marvell SoC + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <[email protected]> + * Gregory Clement <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <mach/armada-370-xp.h> + + .macro addruart, rp, rv, tmp + ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE + ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S>
arch/arm/mach-mvebu/include/mach/timex.h new file +13 -0
@@ -0,0 +1,13 @@ +/* +* Marvell Armada SoC time definitions +* +* Copyright (C) 2012 Marvell +* +* Lior Amsalem <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#define CLOCK_TICK_RATE (100 * HZ)
arch/arm/mach-mvebu/include/mach/uncompress.h new file +43 -0
43 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 3/9 arm: mach-mvebu: add source files
In reply to Thomas PetazzoniFrom: Gregory CLEMENT <[email protected]>
[ben.dooks at codethink.co.uk: fixup style error in system-controller] [ben.dooks at codethink.co.uk: check result of of_match_node()]
--- arch/arm/mach-mvebu/Kconfig | 7 +++ arch/arm/mach-mvebu/Makefile | 1 + arch/arm/mach-mvebu/Makefile.boot | 1 + arch/arm/mach-mvebu/common.h | 20 ++++++ arch/arm/mach-mvebu/system-controller.c | 105 +++++++++++++++++++++++++++++++ 5 files changed, 134 insertions(+) create mode 100644 arch/arm/mach-mvebu/Kconfig create mode 100644 arch/arm/mach-mvebu/Makefile create mode 100644 arch/arm/mach-mvebu/Makefile.boot create mode 100644 arch/arm/mach-mvebu/common.h create mode 100644 arch/arm/mach-mvebu/system-controller.c
arch/arm/mach-mvebu/Kconfig new file +7 -0
@@ -0,0 +1,7 @@ +if ARCH_MVEBU + +menu "Marvell SOC with device tree" + +endmenu + +endif
arch/arm/mach-mvebu/Makefile new file +1 -0
@@ -0,0 +1 @@ +obj-y += system-controller.o
arch/arm/mach-mvebu/Makefile.boot new file +1 -0
@@ -0,0 +1 @@ +zreladdr-y := 0x00008000
arch/arm/mach-mvebu/common.h new file +20 -0
@@ -0,0 +1,20 @@ +/* +* Core functions for Marvell System On Chip +* +* Copyright (C) 2012 Marvell +* +* Lior Amsalem <[email protected]> +* Gregory CLEMENT <[email protected]> +* Thomas Petazzoni <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifndef __ARCH_MVEBU_COMMON_H +#define __ARCH_MVEBU_COMMON_H + +void mvebu_restart (char mode,const char *cmd); + +#endif
arch/arm/mach-mvebu/system-controller.c new file +105 -0
105 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 4/9 arm: mach-mvebu: add support for Armada 370 and Armada XP with DT
In reply to Thomas Petazzoni[ben.dooks at codethink.co.uk: ensure error check on of_property_read_u32] [ben.dooks at codethink.co.uk: use mpic address instead of bus-unit's ] [ben.dooks at codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic] [ben.dooks at codethink.co.uk: move mpic per-cpu register base ] [ben.dooks at codethink.co.uk: number fetch should use irqd_to_hwirq()]
--- arch/arm/boot/dts/armada-370-db.dts | 42 +++++++ arch/arm/boot/dts/armada-370-xp.dtsi | 68 +++++++++++ arch/arm/boot/dts/armada-370.dtsi | 35 ++++++ arch/arm/boot/dts/armada-xp-db.dts | 50 +++++++++ arch/arm/boot/dts/armada-xp.dtsi | 55 +++++++++ arch/arm/mach-mvebu/Kconfig | 9 ++ arch/arm/mach-mvebu/Makefile | 1 + arch/arm/mach-mvebu/armada-370-xp.c | 63 +++++++++++ arch/arm/mach-mvebu/common.h | 3 + arch/arm/mach-mvebu/include/mach/armada-370-xp.h | 22 ++++ arch/arm/mach-mvebu/irq-armada-370-xp.c | 130 ++++++++++++++++++++++ 11 files changed, 478 insertions(+) create mode 100644 arch/arm/boot/dts/armada-370-db.dts create mode 100644 arch/arm/boot/dts/armada-370-xp.dtsi create mode 100644 arch/arm/boot/dts/armada-370.dtsi create mode 100644 arch/arm/boot/dts/armada-xp-db.dts create mode 100644 arch/arm/boot/dts/armada-xp.dtsi create mode 100644 arch/arm/mach-mvebu/armada-370-xp.c create mode 100644 arch/arm/mach-mvebu/include/mach/armada-370-xp.h create mode 100644 arch/arm/mach-mvebu/irq-armada-370-xp.c
arch/arm/boot/dts/armada-370-db.dts new file +42 -0
@@ -0,0 +1,42 @@ +/* + * Device Tree file for Marvell Armada 370 evaluation board + * (DB-88F6710-BP-DDR3) + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <[email protected]> + * Gregory CLEMENT <[email protected]> + * Thomas Petazzoni <[email protected]> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +/include/ "armada-370.dtsi" + +/ { + model = "Marvell Armada 370 Evaluation Board"; + compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp"; + + chosen { + bootargs = "console=ttyS0,115200 earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; /* 512 MB */ + }; + + soc { + serial at d0012000 { + clock-frequency = <200000000>; + status = "okay"; + }; + timer at d0020300 { + clock-frequency = <600000000>; + status = "okay"; + }; + }; +};
arch/arm/boot/dts/armada-370-xp.dtsi new file +68 -0
68 lines not on this page · raw message
arch/arm/boot/dts/armada-370.dtsi new file +35 -0
@@ -0,0 +1,35 @@ +/* + * Device Tree Include file for Marvell Armada 370 family SoC + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <[email protected]> + * Gregory CLEMENT <[email protected]> + * Thomas Petazzoni <[email protected]> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * Contains definitions specific to the Armada 370 SoC that are not + * common to all Armada SoCs. + */ + +/include/ "armada-370-xp.dtsi" + +/ { + model = "Marvell Armada 370 family SoC"; + compatible = "marvell,armada370", "marvell,armada-370-xp"; + + mpic: interrupt-controller at d0020000 { + reg = <0xd0020a00 0x1d0>, + <0xd0021870 0x58>; + }; + + soc { + system-controller at d0018200 { + compatible = "marvell,armada-370-xp-system-controller"; + reg = <0xd0018200 0x100>; + }; + }; +};
arch/arm/boot/dts/armada-xp-db.dts new file +50 -0
50 lines not on this page · raw message
arch/arm/boot/dts/armada-xp.dtsi new file +55 -0
55 lines not on this page · raw message
arch/arm/mach-mvebu/Kconfig +9 -0
@@ -2,6 +2,15 @@ if ARCH_MVEBU menu "Marvell SOC with device tree" +config MACH_ARMADA_370_XP + bool "Marvell Armada 370 and Aramada XP boards" + select ARMADA_370_XP_TIMER + select CPU_V7 + help + + Say 'Y' here if you want your kernel to support boards based on + Marvell Armada 370 or Armada XP with device tree. + endmenu endif
arch/arm/mach-mvebu/Makefile +1 -0
@@ -1 +1,2 @@ obj-y += system-controller.o +obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o
arch/arm/mach-mvebu/armada-370-xp.c new file +63 -0
63 lines not on this page · raw message
arch/arm/mach-mvebu/common.h +3 -0
@@ -17,4 +17,7 @@void mvebu_restart (char mode,const char *cmd); +void armada_370_xp_init_irq (void ); +void armada_370_xp_handle_irq (struct pt_regs *regs); +#endif
arch/arm/mach-mvebu/include/mach/armada-370-xp.h new file +22 -0
@@ -0,0 +1,22 @@ +/* +* Generic definitions for Marvell Armada_370_XP SoCs +* +* Copyright (C) 2012 Marvell +* +* Lior Amsalem <[email protected]> +* Gregory CLEMENT <[email protected]> +* Thomas Petazzoni <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifndef __MACH_ARMADA_370_XP_H +#define __MACH_ARMADA_370_XP_H + +#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 +#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 +#define ARMADA_370_XP_REGS_SIZE SZ_1M + +#endif /* __MACH_ARMADA_370_XP_H */
arch/arm/mach-mvebu/irq-armada-370-xp.c new file +130 -0
130 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 5/9 arm: mach-mvebu: add documentation for new device tree bindings
In reply to Thomas PetazzoniFrom: Gregory CLEMENT <[email protected]>
--- .../devicetree/bindings/arm/armada-370-xp-mpic.txt | 23 +++++++++++++++++++ .../bindings/arm/armada-370-xp-timer.txt | 11 +++++++++ .../devicetree/bindings/arm/armada-370-xp.txt | 24 ++++++++++++++++++++ .../bindings/arm/mvebu-system-controller.txt | 17 ++++++++++++++ 4 files changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt create mode 100644 Documentation/devicetree/bindings/arm/armada-370-xp-timer.txt create mode 100644 Documentation/devicetree/bindings/arm/armada-370-xp.txt create mode 100644 Documentation/devicetree/bindings/arm/mvebu-system-controller.txt
Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt new file +23 -0
@@ -0,0 +1,23 @@ +Marvell Armada 370 and Armada XP Interrupt Controller +----------------------------------------------------- + +Required properties: +- compatible: Should be "marvell,mpic" +- interrupt-controller: Identifies the node as an interrupt controller. +- #interrupt-cells: The number of cells to define the interrupts. Should be 1. + The cell is the IRQ number +- reg: Should contain PMIC registers location and length. First pair + for the main interrupt registers, second pair for the per-CPU + interrupt registers + +Example: + + mpic: interrupt-controller at d0020000 { + compatible = "marvell,mpic"; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-controller; + reg = <0xd0020000 0x1000>, + <0xd0021000 0x1000>; + };
Documentation/devicetree/bindings/arm/armada-370-xp-timer.txt new file +11 -0
@@ -0,0 +1,11 @@ +Marvell Armada 370 and Armada XP Global Timers +---------------------------------------------- + +Required properties: +- compatible: Should be "marvell,timer" +- interrupts: Should contain the list of Global Timer interrupts +- reg: Should contain the base address of the Global Timer registers + +Optional properties: +- marvell,timer-25Mhz: Tells whether the Global timer supports the 25 + Mhz fixed mode (available on Armada XP and not on Armada 370)
Documentation/devicetree/bindings/arm/armada-370-xp.txt new file +24 -0
@@ -0,0 +1,24 @@ +Marvell Armada 370 and Armada XP Platforms Device Tree Bindings +--------------------------------------------------------------- + +Boards with a SoC of the Marvell Armada 370 and Armada XP families +shall have the following property: + +Required root node property: + +compatible: must contain "marvell,armada-370-xp" + +In addition, boards using the Marvell Armada 370 SoC shall have the +following property: + +Required root node property: + +compatible: must contain "marvell,armada370" + +In addition, boards using the Marvell Armada XP SoC shall have the +following property: + +Required root node property: + +compatible: must contain "marvell,armadaxp" +
Documentation/devicetree/bindings/arm/mvebu-system-controller.txt new file +17 -0
@@ -0,0 +1,17 @@ +MVEBU System Controller +----------------------- +MVEBU (Marvell SOCs: Armada 370/XP, Dove, mv78xx0, Kirkwood, Orion5x) + +Required properties: + +- compatible: one of: + - "marvell,orion-system-controller" + - "marvell,armada-370-xp-system-controller" +- reg: Should contain system controller registers location and length. + +Example: + + system-controller at d0018200 { + compatible = "marvell,armada-370-xp-system-controller"; + reg = <0xd0018200 0x500>; + };
Signature · 1 line
1.7.9.5
PATCH 6/9 arm: mach-mvebu: add defconfig
In reply to Thomas Petazzoni--- arch/arm/configs/mvebu_defconfig | 46 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 arch/arm/configs/mvebu_defconfig
arch/arm/configs/mvebu_defconfig new file +46 -0
@@ -0,0 +1,46 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_ARCH_MVEBU=y +CONFIG_MACH_ARMADA_370_XP=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_USE_OF=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ARM_APPENDED_DTB=y +CONFIG_VFP=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +CONFIG_NLS_UTF8=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y
Signature · 1 line
1.7.9.5
PATCH 7/9 arm: mach-mvebu: add compilation/configuration change
In reply to Thomas PetazzoniFrom: Gregory CLEMENT <[email protected]>
--- arch/arm/Kconfig | 14 ++++++++++++++ arch/arm/Makefile | 1 + 2 files changed, 15 insertions(+)
arch/arm/Kconfig +14 -0
@@ -533,6 +533,18 @@ config ARCH_IXP4XX help Support for Intel's IXP4XX (XScale) family of processors. +config ARCH_MVEBU + bool "Marvell SOCs with Device Tree support" + select GENERIC_CLOCKEVENTS + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + select CLKSRC_MMIO + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + select COMMON_CLK + help + Support for the Marvell SoC Family with device tree support + config ARCH_DOVE bool "Marvell Dove" select CPU_V7
@@ -987,6 +999,8 @@ endchoice # Kconfigs may be included either alphabetically (according to the # plat- suffix) or along side the corresponding mach-* source. # +source "arch/arm/mach-mvebu/Kconfig" + source "arch/arm/mach-at91/Kconfig" source "arch/arm/mach-bcmring/Kconfig"
arch/arm/Makefile +1 -0
@@ -157,6 +157,7 @@ machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 machine-$(CONFIG_ARCH_IMX_V4_V5) := imx machine-$(CONFIG_ARCH_IMX_V6_V7) := imx machine-$(CONFIG_ARCH_MXS) := mxs +machine-$(CONFIG_ARCH_MVEBU) := mvebu machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NOMADIK) := nomadik machine-$(CONFIG_ARCH_OMAP1) := omap1
Signature · 1 line
1.7.9.5
PATCH 8/9 arm: mach-mvebu: add entry to MAINTAINERS
In reply to Thomas Petazzoni--- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+)
MAINTAINERS +8 -0
@@ -894,6 +894,14 @@ ARM/MAGICIAN MACHINE SUPPORT M: Philipp Zabel <[email protected]> S: Maintained +ARM/Marvell Armada 370 and Armada XP SOC support +M: Gregory Clement <[email protected]> +M: Thomas Petazzoni <[email protected]> +M: Lior Amsalem <[email protected]> +L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-mvebu/ + ARM/Marvell Dove/Kirkwood/MV78xx0/Orion SOC support M: Jason Cooper <[email protected]> M: Andrew Lunn <[email protected]>
Signature · 1 line
1.7.9.5
PATCH 9/9 ARM: mvebu: MPIC: read number of interrupts from control register
In reply to Thomas PetazzoniFrom: Ben Dooks <[email protected]>
Read the number of MPIC interrupts from the controller and only register that many.
[gregory.clement at free-electrons.com: rename armada symbol name to fit with new name: armada_370_xp]
--- arch/arm/mach-mvebu/irq-armada-370-xp.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
arch/arm/mach-mvebu/irq-armada-370-xp.c +6 -3
@@ -29,13 +29,12 @@#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48)#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C) +#define ARMADA_370_XP_INT_CONTROL (0x00)#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) -#define ARMADA_370_XP_NR_IRQS (115) -static void __iomem *per_cpu_int_base;static void __iomem *main_int_base;static struct irq_domain *armada_370_xp_mpic_domain;
@@ -81,14 +80,18 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {static int __init armada_370_xp_mpic_of_init (struct device_node *node,struct device_node *parent) { +u32 control; + main_int_base =of_iomap (node,0 ); per_cpu_int_base =of_iomap (node,1 );BUG_ON (!main_int_base);BUG_ON (!per_cpu_int_base); + control =readl (main_int_base +ARMADA_370_XP_INT_CONTROL ); + armada_370_xp_mpic_domain = -irq_domain_add_linear (node,ARMADA_370_XP_NR_IRQS , +irq_domain_add_linear (node, (control >>2 ) &0x3ff , &armada_370_xp_mpic_irq_ops,NULL );if (!armada_370_xp_mpic_domain)
Signature · 1 line
1.7.9.5
PATCH v6 1/1 arm: Add basic support for new Marvell Armada 370 and Armada XP SoC
In reply to Thomas PetazzoniQuoted 5 lines · Thomas Petazzoni
You'll find in this patch set the sixth version of the initial support for a new family of ARMv7-compatible Marvell SoCs.
Do you think this patch set has a chance of hitting the 3.6 merge window?
Yes, definitely.
Quoted 4 lines
We are willing to quickly resubmit updated versions to take into account new comments. We have a lot more code to support those new SoCs, and we would like to make progress in submitting those other parts for the mainline.
I think it's time to just take your current version into arm-soc and do all other patches on top. I'll wait for an Ack from Ben, Andrew and Andrew first though.
Arnd
PATCH v6 1/1 arm: Add basic support for new Marvell Armada 370 and Armada XP SoC
Le Mon, 2 Jul 2012 15:30:23 +0000,
Arnd Bergmann <[email protected]> a ?crit :
Quoted 4 lines
Quoted 2 lines
Do you think this patch set has a chance of hitting the 3.6 merge window?
Yes, definitely.
Excellent, thanks.
Quoted 8 lines
Quoted 4 lines
We are willing to quickly resubmit updated versions to take into account new comments. We have a lot more code to support those new SoCs, and we would like to make progress in submitting those other parts for the mainline.
I think it's time to just take your current version into arm-soc and do all other patches on top. I'll wait for an Ack from Ben, Andrew and Andrew first though.
I guess you wanted to say "Andrew and Jason", right?
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH v6 1/1 arm: Add basic support for new Marvell Armada 370 and Armada XP SoC
Quoted 5 lines · Thomas Petazzoni
Quoted 3 lines
I think it's time to just take your current version into arm-soc and do all other patches on top. I'll wait for an Ack from Ben, Andrew and Andrew first though.
I guess you wanted to say "Andrew and Jason", right?
Yes.
Arnd