mxc_i2c: fix i2c_imx_stop

---
V2: add acks

---
 drivers/i2c/mxc_i2c.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/i2c/mxc_i2c.c +1 -1

index fc68062..c0c45fd 100644
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
 	/* Stop I2C transaction */
 	temp = readb(&i2c_regs->i2cr);
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
 	writeb(temp, &i2c_regs->i2cr);
 
 	i2c_imx_bus_busy(0);

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 20:02 UTC #1 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop

Quoted 19 lines · Troy Kisky

Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by Troy Kisky <[email protected]>
Acked-by Marek Vasut <[email protected]>
Acked-by Stefano Babic <[email protected]>
---
V2: add acks
---
  drivers/i2c/mxc_i2c.c |    2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mxc_i2c.c +0 -0
index fc68062..c0c45fd 100644

drivers/i2c/mxc_i2c.c void i2c_imx_stop(void) · line 270

Quoted 8 lines

drivers/i2c/mxc_i2c.c +1 -1

@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
  	/* Stop I2C transaction */
  	temp = readb(&i2c_regs->i2cr);
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
  	writeb(temp, &i2c_regs->i2cr);
 
  	i2c_imx_bus_busy(0);

This series was tested on a sabrelite and a i.mx51 board

Thanks
Troy

Marek Vasut

2012-07-06 06:50 UTC #2 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop

Dear Troy Kisky,

Quoted 25 lines · Troy Kisky

Quoted 24 lines
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by Troy Kisky <[email protected]>
Acked-by Marek Vasut <[email protected]>
Acked-by Stefano Babic <[email protected]>
---
V2: add acks
---
  drivers/i2c/mxc_i2c.c |    2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mxc_i2c.c +0 -0
index fc68062..c0c45fd 100644
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
  	/* Stop I2C transaction */
  	temp = readb(&i2c_regs->i2cr);
 

Quoted 8 lines

Quoted 6 lines
drivers/i2c/mxc_i2c.c +1 -1
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
 
  	writeb(temp, &i2c_regs->i2cr);
  	
  	i2c_imx_bus_busy(0);
This series was tested on a sabrelite and a i.mx51 board

Sigh, I should test it on the efikamx board. It has some i2c chip that's hard to talk to since it's quite sensitive to the behavior of the bus. But since I'm dead busy now, I'll just trust you. I'm glad you found it, Troy :)

Quoted 2 lines

Thanks
Troy

Best regards,
Marek Vasut

Troy Kisky

author

2012-07-06 17:38 UTC #3 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop

Quoted 30 lines · Marek Vasut

Dear Troy Kisky,
Quoted 28 lines · Troy Kisky
Quoted 27 lines
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by Troy Kisky <[email protected]>
Acked-by Marek Vasut <[email protected]>
Acked-by Stefano Babic <[email protected]>
---
V2: add acks
---
   drivers/i2c/mxc_i2c.c |    2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mxc_i2c.c +1 -1
index fc68062..c0c45fd 100644
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
   	/* Stop I2C transaction */
   	temp = readb(&i2c_regs->i2cr);
 
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
 

Quoted 9 lines

Quoted 4 lines
Quoted 3 lines
drivers/i2c/mxc_i2c.c +0 -0
   	writeb(temp, &i2c_regs->i2cr);
   	
   	i2c_imx_bus_busy(0);
This series was tested on a sabrelite and a i.mx51 board
Sigh, I should test it on the efikamx board. It has some i2c chip that's hard to talk to since it's quite sensitive to the behavior of the bus. But since I'm dead busy now, I'll just trust you. I'm glad you found it, Troy :)

I'd rather have your verification than trust :-)
Thanks for the reviews.

Troy

Marek Vasut

2012-07-06 17:46 UTC #4 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop

Dear Troy Kisky,

Quoted 37 lines · Marek Vasut

Quoted 36 lines
Dear Troy Kisky,
Quoted 33 lines · Troy Kisky
Quoted 29 lines
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by Troy Kisky <[email protected]>
Acked-by Marek Vasut <[email protected]>
Acked-by Stefano Babic <[email protected]>
---
V2: add acks
---
   drivers/i2c/mxc_i2c.c |    2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mxc_i2c.c +1 -1
index fc68062..c0c45fd 100644
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
   	/* Stop I2C transaction */
   	temp = readb(&i2c_regs->i2cr);
 
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
 
   	writeb(temp, &i2c_regs->i2cr);
Quoted 1 line
   	i2c_imx_bus_busy(0);
This series was tested on a sabrelite and a i.mx51 board

Quoted 7 lines

Quoted 4 lines
Sigh, I should test it on the efikamx board. It has some i2c chip that's hard to talk to since it's quite sensitive to the behavior of the bus. But since I'm dead busy now, I'll just trust you. I'm glad you found it, Troy :)
I'd rather have your verification than trust :-)
Thanks for the reviews.

Hmm, lemme see.

Quoted 1 line

Troy

Best regards,
Marek Vasut

Troy Kisky

author

2012-07-06 18:14 UTC #5 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop

Quoted 41 lines · Marek Vasut

Dear Troy Kisky,
Quoted 39 lines · Marek Vasut
Quoted 38 lines
Dear Troy Kisky,
Quoted 25 lines · Troy Kisky
Quoted 24 lines
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by Troy Kisky <[email protected]>
Acked-by Marek Vasut <[email protected]>
Acked-by Stefano Babic <[email protected]>
---
V2: add acks
---
    drivers/i2c/mxc_i2c.c |    2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mxc_i2c.c +0 -0
index fc68062..c0c45fd 100644
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
    	/* Stop I2C transaction */
    	temp = readb(&i2c_regs->i2cr);
 
Quoted 7 lines
Quoted 6 lines
drivers/i2c/mxc_i2c.c +1 -1
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
 
    	writeb(temp, &i2c_regs->i2cr);
    	
    	i2c_imx_bus_busy(0);
This series was tested on a sabrelite and a i.mx51 board
Sigh, I should test it on the efikamx board. It has some i2c chip that's hard to talk to since it's quite sensitive to the behavior of the bus. But since I'm dead busy now, I'll just trust you. I'm glad you found it, Troy :)

Quoted 8 lines

Quoted 2 lines
I'd rather have your verification than trust :-)
Thanks for the reviews.
Hmm, lemme see.
Quoted 1 line
Troy
Best regards,
Marek Vasut

Here's a patch to enable i2c for efikamx....

Troy

Marek Vasut

2012-07-06 18:39 UTC #6 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop

Dear Troy Kisky,

Quoted 48 lines · Marek Vasut

Quoted 47 lines
Dear Troy Kisky,
Quoted 44 lines · Marek Vasut
Quoted 32 lines
Dear Troy Kisky,
Quoted 30 lines · Troy Kisky
Quoted 29 lines
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.
Signed-off-by Troy Kisky <[email protected]>
Acked-by Marek Vasut <[email protected]>
Acked-by Stefano Babic <[email protected]>
---
V2: add acks
---
    drivers/i2c/mxc_i2c.c |    2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mxc_i2c.c +1 -1
index fc68062..c0c45fd 100644
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)
 
    	/* Stop I2C transaction */
    	temp = readb(&i2c_regs->i2cr);
 
-	temp |= ~(I2CR_MSTA | I2CR_MTX);
+	temp &= ~(I2CR_MSTA | I2CR_MTX);
 
    	writeb(temp, &i2c_regs->i2cr);
Quoted 8 lines
Quoted 3 lines
Quoted 1 line
    	i2c_imx_bus_busy(0);
This series was tested on a sabrelite and a i.mx51 board
Sigh, I should test it on the efikamx board. It has some i2c chip that's hard to talk to since it's quite sensitive to the behavior of the bus. But since I'm dead busy now, I'll just trust you. I'm glad you found it, Troy :)
I'd rather have your verification than trust :-)
Thanks for the reviews.

Quoted 8 lines

Quoted 6 lines
Hmm, lemme see.
Quoted 1 line
Troy
Best regards,
Marek Vasut
Here's a patch to enable i2c for efikamx....

It should be enabled already ... hm, I think I'll have to dig deeper.

Quoted 2 lines

Troy

Best regards,
Marek Vasut

Troy Kisky

author

2012-07-05 19:53 UTC #7 lore raw

PATCH v2 2/25 mxc_i2c: remove ifdef of CONFIG_HARD_I2C

This is always selected when CONFIG_I2C_MXC is
selected, so it adds no value.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |    6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

drivers/i2c/mxc_i2c.c +1 -5

index c0c45fd..0b46c9c 100644
@@ -31,12 +31,9 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
-
-#if defined(CONFIG_HARD_I2C)
-
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/io.h>
 #include <i2c.h>
 
 struct mxc_i2c_regs {

@@ -446,4 +443,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 
 	return ret;
 }
-#endif /* CONFIG_HARD_I2C */

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #8 lore raw

PATCH v2 3/25 mxc_i2c: create tx_byte function

Use tx_byte function instead of having 3 copies
of the code.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack
change ret to integer from unsigned

---
 drivers/i2c/mxc_i2c.c |   82 +++++++++++++++----------------------------------
 1 file changed, 24 insertions(+), 58 deletions(-)

drivers/i2c/mxc_i2c.c +24 ~~-58~~

index 0b46c9c..d147dd5 100644
@@ -33,6 +33,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/errno.h>
 #include <asm/io.h>
 #include <i2c.h>

@@ -207,17 +208,21 @@ int i2c_imx_trx_complete(void)
 		udelay(1);
 	}
 
-	return 1;
+	return -ETIMEDOUT;
 }
 
-/*
- * Check if the transaction was ACKed
- */
-int i2c_imx_acked(void)
+static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+	int ret;
 
-	return readb(&i2c_regs->i2sr) & I2SR_RX_NO_AK;
+	writeb(byte, &i2c_regs->i2dr);
+	ret = i2c_imx_trx_complete();
+	if (ret < 0)
+		return ret;
+	ret = readb(&i2c_regs->i2sr);
+	if (ret & I2SR_RX_NO_AK)
+		return -ENODEV;
+	return 0;
 }
 
 /*

@@ -271,30 +276,6 @@ void i2c_imx_stop(void)
 }
 
 /*
- * Set chip address and access mode
- *
- * read = 1: READ access
- * read = 0: WRITE access
- */
-int i2c_imx_set_chip_addr(uchar chip, int read)
-{
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	int ret;
-
-	writeb((chip << 1) | read, &i2c_regs->i2dr);
-
-	ret = i2c_imx_trx_complete();
-	if (ret)
-		return ret;
-
-	ret = i2c_imx_acked();
-	if (ret)
-		return ret;
-
-	return ret;
-}
-
-/*
  * Write register address
  */
 int i2c_imx_set_reg_addr(uint addr, int alen)

@@ -303,14 +284,8 @@ int i2c_imx_set_reg_addr(uint addr, int alen)
 	int ret = 0;
 
 	while (alen--) {
-		writeb((addr >> (alen * 8)) & 0xff, &i2c_regs->i2dr);
-
-		ret = i2c_imx_trx_complete();
-		if (ret)
-			break;
-
-		ret = i2c_imx_acked();
-		if (ret)
+		ret = tx_byte(i2c_regs, (addr >> (alen * 8)) & 0xff);
+		if (ret < 0)
 			break;
 	}

@@ -322,18 +297,15 @@ int i2c_imx_set_reg_addr(uint addr, int alen)
  */
 int i2c_probe(uchar chip)
 {
+	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
 	int ret;
 
 	ret = i2c_imx_start();
 	if (ret)
 		return ret;
 
-	ret = i2c_imx_set_chip_addr(chip, 0);
-	if (ret)
-		return ret;
-
+	ret = tx_byte(i2c_regs, chip << 1);
 	i2c_imx_stop();
-
 	return ret;
 }

@@ -352,8 +324,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 		return ret;
 
 	/* write slave address */
-	ret = i2c_imx_set_chip_addr(chip, 0);
-	if (ret)
+	ret = tx_byte(i2c_regs, chip << 1);
+	if (ret < 0)
 		return ret;
 
 	ret = i2c_imx_set_reg_addr(addr, alen);

@@ -364,8 +336,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 	temp |= I2CR_RSTA;
 	writeb(temp, &i2c_regs->i2cr);
 
-	ret = i2c_imx_set_chip_addr(chip, 1);
-	if (ret)
+	ret = tx_byte(i2c_regs, (chip << 1) | 1);
+	if (ret < 0)
 		return ret;
 
 	/* setup bus to read data */

@@ -419,8 +391,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 		return ret;
 
 	/* write slave address */
-	ret = i2c_imx_set_chip_addr(chip, 0);
-	if (ret)
+	ret = tx_byte(i2c_regs, chip << 1);
+	if (ret < 0)
 		return ret;
 
 	ret = i2c_imx_set_reg_addr(addr, alen);

@@ -428,14 +400,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 		return ret;
 
 	for (i = 0; i < len; i++) {
-		writeb(buf[i], &i2c_regs->i2dr);
-
-		ret = i2c_imx_trx_complete();
-		if (ret)
-			return ret;
-
-		ret = i2c_imx_acked();
-		if (ret)
+		ret = tx_byte(i2c_regs, buf[i]);
+		if (ret < 0)
 			return ret;
 	}

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #9 lore raw

PATCH v2 4/25 mxc_i2c: clear i2sr before waiting for bit

Let's clear the sr register before waiting for bit to be set, instead of clearing it after hardware sets it. No real operational difference here, but allows combining of i2c_imx_trx_complete and i2c_imx_bus_busy in later patches.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack
add clear of i2sr in i2c_read

---
 drivers/i2c/mxc_i2c.c |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

drivers/i2c/mxc_i2c.c +5 -4

index d147dd5..57027ad 100644
@@ -200,10 +200,8 @@ int i2c_imx_trx_complete(void)
 	int timeout = I2C_MAX_TIMEOUT;
 
 	while (timeout--) {
-		if (readb(&i2c_regs->i2sr) & I2SR_IIF) {
-			writeb(0, &i2c_regs->i2sr);
+		if (readb(&i2c_regs->i2sr) & I2SR_IIF)
 			return 0;
-		}
 
 		udelay(1);
 	}

@@ -215,6 +213,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 {
 	int ret;
 
+	writeb(0, &i2c_regs->i2sr);
 	writeb(byte, &i2c_regs->i2dr);
 	ret = i2c_imx_trx_complete();
 	if (ret < 0)

@@ -346,7 +345,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 	if (len == 1)
 		temp |= I2CR_TX_NO_AK;
 	writeb(temp, &i2c_regs->i2cr);
-	readb(&i2c_regs->i2dr);
+	writeb(0, &i2c_regs->i2sr);
+	readb(&i2c_regs->i2dr);		/* dummy read to clear ICF */
 
 	/* read data */
 	for (i = 0; i < len; i++) {

@@ -369,6 +369,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 			writeb(temp, &i2c_regs->i2cr);
 		}
 
+		writeb(0, &i2c_regs->i2sr);
 		buf[i] = readb(&i2c_regs->i2dr);
 	}

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #10 lore raw

PATCH v2 5/25 mxc_i2c: create i2c_init_transfer

Initial code of i2c_read and i2c_write
is identical, move to subroutine.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |   44 ++++++++++++++++++--------------------------
 1 file changed, 18 insertions(+), 26 deletions(-)

drivers/i2c/mxc_i2c.c +18 ~~-26~~

index 57027ad..4ce695a 100644
@@ -275,19 +275,29 @@ void i2c_imx_stop(void)
 }
 
 /*
- * Write register address
+ * Send start signal, chip address and
+ * write register address
  */
-int i2c_imx_set_reg_addr(uint addr, int alen)
+static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
+		uchar chip, uint addr, int alen)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	int ret = 0;
+	int ret = i2c_imx_start();
+	if (ret)
+		goto exit;
+
+	/* write slave address */
+	ret = tx_byte(i2c_regs, chip << 1);
+	if (ret < 0)
+		goto exit;
 
 	while (alen--) {
 		ret = tx_byte(i2c_regs, (addr >> (alen * 8)) & 0xff);
 		if (ret < 0)
-			break;
+			goto exit;
 	}
-
+	return 0;
+exit:
+	i2c_imx_stop();
 	return ret;
 }

@@ -318,19 +328,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 	unsigned int temp;
 	int i;
 
-	ret = i2c_imx_start();
-	if (ret)
-		return ret;
-
-	/* write slave address */
-	ret = tx_byte(i2c_regs, chip << 1);
+	ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
 	if (ret < 0)
 		return ret;
 
-	ret = i2c_imx_set_reg_addr(addr, alen);
-	if (ret)
-		return ret;
-
 	temp = readb(&i2c_regs->i2cr);
 	temp |= I2CR_RSTA;
 	writeb(temp, &i2c_regs->i2cr);

@@ -387,19 +388,10 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 	int ret;
 	int i;
 
-	ret = i2c_imx_start();
-	if (ret)
-		return ret;
-
-	/* write slave address */
-	ret = tx_byte(i2c_regs, chip << 1);
+	ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
 	if (ret < 0)
 		return ret;
 
-	ret = i2c_imx_set_reg_addr(addr, alen);
-	if (ret)
-		return ret;
-
 	for (i = 0; i < len; i++) {
 		ret = tx_byte(i2c_regs, buf[i]);
 		if (ret < 0)

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #11 lore raw

PATCH v2 6/25 mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write

Signed-off-by Troy Kisky <[email protected]>

---
 drivers/i2c/mxc_i2c.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

drivers/i2c/mxc_i2c.c +7 -3

index 4ce695a..55a688a 100644
@@ -337,8 +337,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 	writeb(temp, &i2c_regs->i2cr);
 
 	ret = tx_byte(i2c_regs, (chip << 1) | 1);
-	if (ret < 0)
+	if (ret < 0) {
+		i2c_imx_stop();
 		return ret;
+	}
 
 	/* setup bus to read data */
 	temp = readb(&i2c_regs->i2cr);

@@ -352,8 +354,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 	/* read data */
 	for (i = 0; i < len; i++) {
 		ret = i2c_imx_trx_complete();
-		if (ret)
+		if (ret) {
+			i2c_imx_stop();
 			return ret;
+		}
 
 		/*
 		 * It must generate STOP before read I2DR to prevent

@@ -395,7 +399,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 	for (i = 0; i < len; i++) {
 		ret = tx_byte(i2c_regs, buf[i]);
 		if (ret < 0)
-			return ret;
+			break;
 	}
 
 	i2c_imx_stop();

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #12 lore raw

PATCH v2 7/25 mxc_i2c.c: code i2c_probe as a 0 length i2c_write

Signed-off-by Troy Kisky <[email protected]>

---
v2: add acks
change comment
---

---
 drivers/i2c/mxc_i2c.c |   25 ++++++++-----------------
 1 file changed, 8 insertions(+), 17 deletions(-)

drivers/i2c/mxc_i2c.c +8 ~~-17~~

index 55a688a..626e13e 100644
@@ -302,23 +302,6 @@ exit:
 }
 
 /*
- * Try if a chip add given address responds (probe the chip)
- */
-int i2c_probe(uchar chip)
-{
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	int ret;
-
-	ret = i2c_imx_start();
-	if (ret)
-		return ret;
-
-	ret = tx_byte(i2c_regs, chip << 1);
-	i2c_imx_stop();
-	return ret;
-}
-
-/*
  * Read data from I2C device
  */
 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)

@@ -406,3 +389,11 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 
 	return ret;
 }
+
+/*
+ * Test if a chip@a given address responds (probe the chip)
+ */
+int i2c_probe(uchar chip)
+{
+	return i2c_write(chip, 0, 0, NULL, 0);
+}

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #13 lore raw

PATCH v2 8/25 mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state

Not using udelay gives a more accurate timeout. The current implementation of udelay in imx-common does not seem to wait at all for a udelay(1).

Signed-off-by Troy Kisky <[email protected]>

----
V2: Added WATCHDOG_RESET as suggested by Marek Vasut add error message when stop fails

mxc_i2c: code i2c_probe as a 0 length i2c_write

Signed-off-by Troy Kisky <[email protected]>

---
v2: add acks

---
 drivers/i2c/mxc_i2c.c |   80 ++++++++++++++++++-------------------------------
 1 file changed, 29 insertions(+), 51 deletions(-)

drivers/i2c/mxc_i2c.c +29 ~~-51~~

index 626e13e..01a6408 100644
@@ -36,6 +36,7 @@
 #include <asm/errno.h>
 #include <asm/io.h>
 #include <i2c.h>
+#include <watchdog.h>
 
 struct mxc_i2c_regs {
 	uint32_t	iadr;

@@ -63,8 +64,6 @@ struct mxc_i2c_regs {
 #error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
 #endif
 
-#define I2C_MAX_TIMEOUT		10000
-
 static u16 i2c_clk_div[50][2] = {
 	{ 22,	0x20 }, { 24,	0x21 }, { 26,	0x22 }, { 28,	0x23 },
 	{ 30,	0x00 }, { 32,	0x24 }, { 36,	0x25 }, { 40,	0x26 },

@@ -164,48 +163,26 @@ unsigned int i2c_get_bus_speed(void)
 	return mxc_get_clock(MXC_IPG_PERCLK) / i2c_clk_div[clk_div][0];
 }
 
-/*
- * Wait for bus to be busy (or free if for_busy = 0)
- *
- * for_busy = 1: Wait for IBB to be asserted
- * for_busy = 0: Wait for IBB to be de-asserted
- */
-int i2c_imx_bus_busy(int for_busy)
-{
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	unsigned int temp;
-
-	int timeout = I2C_MAX_TIMEOUT;
-
-	while (timeout--) {
-		temp = readb(&i2c_regs->i2sr);
-
-		if (for_busy && (temp & I2SR_IBB))
-			return 0;
-		if (!for_busy && !(temp & I2SR_IBB))
-			return 0;
-
-		udelay(1);
-	}
-
-	return 1;
-}
+#define ST_BUS_IDLE (0 | (I2SR_IBB << 8))
+#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB << 8))
+#define ST_IIF (I2SR_IIF | (I2SR_IIF << 8))
 
-/*
- * Wait for transaction to complete
- */
-int i2c_imx_trx_complete(void)
+static int wait_for_sr_state(struct mxc_i2c_regs *i2c_regs, unsigned state)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	int timeout = I2C_MAX_TIMEOUT;
-
-	while (timeout--) {
-		if (readb(&i2c_regs->i2sr) & I2SR_IIF)
-			return 0;
-
-		udelay(1);
+	unsigned sr;
+	ulong elapsed;
+	ulong start_time = get_timer(0);
+	for (;;) {
+		sr = readb(&i2c_regs->i2sr);
+		if ((sr & (state >> 8)) == (unsigned char)state)
+			return sr;
+		WATCHDOG_RESET();
+		elapsed = get_timer(start_time);
+		if (elapsed > (CONFIG_SYS_HZ / 10))	/* .1 seconds */
+			break;
 	}
-
+	printf("%s: failed sr=%x cr=%x state=%x\n", __func__,
+			sr, readb(&i2c_regs->i2cr), state);
 	return -ETIMEDOUT;
 }

@@ -215,7 +192,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 
 	writeb(0, &i2c_regs->i2sr);
 	writeb(byte, &i2c_regs->i2dr);
-	ret = i2c_imx_trx_complete();
+	ret = wait_for_sr_state(i2c_regs, ST_IIF);
 	if (ret < 0)
 		return ret;
 	ret = readb(&i2c_regs->i2sr);

@@ -245,8 +222,8 @@ int i2c_imx_start(void)
 	temp |= I2CR_MSTA;
 	writeb(temp, &i2c_regs->i2cr);
 
-	result = i2c_imx_bus_busy(1);
-	if (result)
+	result = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
+	if (result < 0)
 		return result;
 
 	temp |= I2CR_MTX | I2CR_TX_NO_AK;

@@ -260,6 +237,7 @@ int i2c_imx_start(void)
  */
 void i2c_imx_stop(void)
 {
+	int ret;
 	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
 	unsigned int temp = 0;

@@ -268,8 +246,9 @@ void i2c_imx_stop(void)
 	temp &= ~(I2CR_MSTA | I2CR_MTX);
 	writeb(temp, &i2c_regs->i2cr);
 
-	i2c_imx_bus_busy(0);
-
+	ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
+	if (ret < 0)
+		printf("%s:trigger stop failed\n", __func__);
 	/* Disable I2C controller */
 	writeb(0, &i2c_regs->i2cr);
 }

@@ -336,8 +315,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 
 	/* read data */
 	for (i = 0; i < len; i++) {
-		ret = i2c_imx_trx_complete();
-		if (ret) {
+		ret = wait_for_sr_state(i2c_regs, ST_IIF);
+		if (ret < 0) {
 			i2c_imx_stop();
 			return ret;
 		}

@@ -350,20 +329,19 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 			temp = readb(&i2c_regs->i2cr);
 			temp &= ~(I2CR_MSTA | I2CR_MTX);
 			writeb(temp, &i2c_regs->i2cr);
-			i2c_imx_bus_busy(0);
+			wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
 		} else if (i == (len - 2)) {
 			temp = readb(&i2c_regs->i2cr);
 			temp |= I2CR_TX_NO_AK;
 			writeb(temp, &i2c_regs->i2cr);
 		}
-
 		writeb(0, &i2c_regs->i2sr);
 		buf[i] = readb(&i2c_regs->i2dr);
 	}
 
 	i2c_imx_stop();
 
-	return ret;
+	return 0;
 }
 
 /*

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #14 lore raw

PATCH v2 9/25 mxc_i2c: remove redundant read

wait_for_sr_state returns i2sr on success
so no need to read again.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |    1 -
 1 file changed, 1 deletion(-)

drivers/i2c/mxc_i2c.c +0 -1

index 01a6408..83c2fab 100644
@@ -195,7 +195,6 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 	ret = wait_for_sr_state(i2c_regs, ST_IIF);
 	if (ret < 0)
 		return ret;
-	ret = readb(&i2c_regs->i2sr);
 	if (ret & I2SR_RX_NO_AK)
 		return -ENODEV;
 	return 0;

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #15 lore raw

PATCH v2 10/25 mxc_i2c: place imx_start code inline

imx_start is only referenced once so
move to that location.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |   53 +++++++++++++++++++------------------------------
 1 file changed, 20 insertions(+), 33 deletions(-)

drivers/i2c/mxc_i2c.c +20 ~~-33~~

index 83c2fab..9efa9bd 100644
@@ -201,37 +201,6 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 }
 
 /*
- * Start the controller
- */
-int i2c_imx_start(void)
-{
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	unsigned int temp = 0;
-	int result;
-
-	/* Enable I2C controller */
-	writeb(0, &i2c_regs->i2sr);
-	writeb(I2CR_IEN, &i2c_regs->i2cr);
-
-	/* Wait controller to be stable */
-	udelay(50);
-
-	/* Start I2C transaction */
-	temp = readb(&i2c_regs->i2cr);
-	temp |= I2CR_MSTA;
-	writeb(temp, &i2c_regs->i2cr);
-
-	result = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
-	if (result < 0)
-		return result;
-
-	temp |= I2CR_MTX | I2CR_TX_NO_AK;
-	writeb(temp, &i2c_regs->i2cr);
-
-	return 0;
-}
-
-/*
  * Stop the controller
  */
 void i2c_imx_stop(void)

@@ -259,10 +228,28 @@ void i2c_imx_stop(void)
 static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 		uchar chip, uint addr, int alen)
 {
-	int ret = i2c_imx_start();
-	if (ret)
+	unsigned int temp;
+	int ret;
+
+	/* Enable I2C controller */
+	writeb(0, &i2c_regs->i2sr);
+	writeb(I2CR_IEN, &i2c_regs->i2cr);
+
+	/* Wait for controller to be stable */
+	udelay(50);
+
+	/* Start I2C transaction */
+	temp = readb(&i2c_regs->i2cr);
+	temp |= I2CR_MSTA;
+	writeb(temp, &i2c_regs->i2cr);
+
+	ret = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
+	if (ret < 0)
 		goto exit;
 
+	temp |= I2CR_MTX | I2CR_TX_NO_AK;
+	writeb(temp, &i2c_regs->i2cr);
+
 	/* write slave address */
 	ret = tx_byte(i2c_regs, chip << 1);
 	if (ret < 0)

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #16 lore raw

PATCH v2 11/25 mxc_i2c: place i2c_reset code inline

imx_reset is only referenced once so
move to that location.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |   15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

drivers/i2c/mxc_i2c.c +3 ~~-12~~

index 9efa9bd..717bc7a 100644
@@ -114,17 +114,6 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
 }
 
 /*
- * Reset I2C Controller
- */
-void i2c_reset(void)
-{
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-
-	writeb(0, &i2c_regs->i2cr);	/* Reset module */
-	writeb(0, &i2c_regs->i2sr);
-}
-
-/*
  * Init I2C Bus
  */
 void i2c_init(int speed, int unused)

@@ -136,7 +125,9 @@ void i2c_init(int speed, int unused)
 	/* Store divider value */
 	writeb(idx, &i2c_regs->ifdr);
 
-	i2c_reset();
+	/* Reset module */
+	writeb(0, &i2c_regs->i2cr);
+	writeb(0, &i2c_regs->i2sr);
 }
 
 /*

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #17 lore raw

PATCH v2 12/25 mxc_i2c: don't disable controller after every transaction

This helps in a multiple bus master environment which is why I also added a wait for bus idle.

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 drivers/i2c/mxc_i2c.c |   28 +++++++++++++---------------
 1 file changed, 13 insertions(+), 15 deletions(-)

drivers/i2c/mxc_i2c.c +13 ~~-15~~

index 717bc7a..1a5e379 100644
@@ -192,24 +192,19 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 }
 
 /*
- * Stop the controller
+ * Stop I2C transaction
  */
 void i2c_imx_stop(void)
 {
 	int ret;
 	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-	unsigned int temp = 0;
+	unsigned int temp = readb(&i2c_regs->i2cr);
 
-	/* Stop I2C transaction */
-	temp = readb(&i2c_regs->i2cr);
 	temp &= ~(I2CR_MSTA | I2CR_MTX);
 	writeb(temp, &i2c_regs->i2cr);
-
 	ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
 	if (ret < 0)
 		printf("%s:trigger stop failed\n", __func__);
-	/* Disable I2C controller */
-	writeb(0, &i2c_regs->i2cr);
 }
 
 /*

@@ -223,11 +218,15 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 	int ret;
 
 	/* Enable I2C controller */
+	if (!(readb(&i2c_regs->i2cr) & I2CR_IEN)) {
+		writeb(I2CR_IEN, &i2c_regs->i2cr);
+		/* Wait for controller to be stable */
+		udelay(50);
+	}
 	writeb(0, &i2c_regs->i2sr);
-	writeb(I2CR_IEN, &i2c_regs->i2cr);
-
-	/* Wait for controller to be stable */
-	udelay(50);
+	ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
+	if (ret < 0)
+		goto exit;
 
 	/* Start I2C transaction */
 	temp = readb(&i2c_regs->i2cr);

@@ -254,6 +253,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 	return 0;
 exit:
 	i2c_imx_stop();
+	/* Disable I2C controller */
+	writeb(0, &i2c_regs->i2cr);
 	return ret;
 }

@@ -303,10 +304,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 		 * controller from generating another clock cycle
 		 */
 		if (i == (len - 1)) {
-			temp = readb(&i2c_regs->i2cr);
-			temp &= ~(I2CR_MSTA | I2CR_MTX);
-			writeb(temp, &i2c_regs->i2cr);
-			wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
+			i2c_imx_stop();
 		} else if (i == (len - 2)) {
 			temp = readb(&i2c_regs->i2cr);
 			temp |= I2CR_TX_NO_AK;

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #18 lore raw

PATCH v2 13/25 mxc_i2c: change slave addr if conflicts with destination.

The i2c controller cannot be both master and slave in the same transaction.

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 drivers/i2c/mxc_i2c.c |    2 ++
 1 file changed, 2 insertions(+)

drivers/i2c/mxc_i2c.c +2 -0

index 1a5e379..ba2aad3 100644
@@ -223,6 +223,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 		/* Wait for controller to be stable */
 		udelay(50);
 	}
+	if (readb(&i2c_regs->iadr) == (chip << 1))
+		writeb((chip << 1) ^ 2, &i2c_regs->iadr);
 	writeb(0, &i2c_regs->i2sr);
 	ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
 	if (ret < 0)

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #19 lore raw

PATCH v2 14/25 mxc_i2c: check for arbitration lost

No need to continue waiting if arbitration lost.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |    7 +++++++
 1 file changed, 7 insertions(+)

drivers/i2c/mxc_i2c.c +7 -0

index ba2aad3..093a73f 100644
@@ -55,6 +55,7 @@ struct mxc_i2c_regs {
 
 #define I2SR_ICF	(1 << 7)
 #define I2SR_IBB	(1 << 5)
+#define I2SR_IAL	(1 << 4)
 #define I2SR_IIF	(1 << 1)
 #define I2SR_RX_NO_AK	(1 << 0)

@@ -165,6 +166,12 @@ static int wait_for_sr_state(struct mxc_i2c_regs *i2c_regs, unsigned state)
 	ulong start_time = get_timer(0);
 	for (;;) {
 		sr = readb(&i2c_regs->i2sr);
+		if (sr & I2SR_IAL) {
+			writeb(sr & ~I2SR_IAL, &i2c_regs->i2sr);
+			printf("%s: Arbitration lost sr=%x cr=%x state=%x\n",
+				__func__, sr, readb(&i2c_regs->i2cr), state);
+			return -ERESTART;
+		}
 		if ((sr & (state >> 8)) == (unsigned char)state)
 			return sr;
 		WATCHDOG_RESET();

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #20 lore raw

PATCH v2 15/25 mxc_i2c: add retries

Retry unexpected hardware errors. This
will not retry a received NAK.

Signed-off-by Troy Kisky <[email protected]>

---
v2: if i2c_init_transfer_ returns no error, then return 0

---
 drivers/i2c/mxc_i2c.c |   36 +++++++++++++++++++++++++++---------
 1 file changed, 27 insertions(+), 9 deletions(-)

drivers/i2c/mxc_i2c.c +27 -9

index 093a73f..cbb0fff 100644
@@ -218,7 +218,7 @@ void i2c_imx_stop(void)
  * Send start signal, chip address and
  * write register address
  */
-static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
+static int i2c_init_transfer_(struct mxc_i2c_regs *i2c_regs,
 		uchar chip, uint addr, int alen)
 {
 	unsigned int temp;

@@ -235,7 +235,7 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 	writeb(0, &i2c_regs->i2sr);
 	ret = wait_for_sr_state(i2c_regs, ST_BUS_IDLE);
 	if (ret < 0)
-		goto exit;
+		return ret;
 
 	/* Start I2C transaction */
 	temp = readb(&i2c_regs->i2cr);

@@ -244,7 +244,7 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 
 	ret = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
 	if (ret < 0)
-		goto exit;
+		return ret;
 
 	temp |= I2CR_MTX | I2CR_TX_NO_AK;
 	writeb(temp, &i2c_regs->i2cr);

@@ -252,18 +252,36 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 	/* write slave address */
 	ret = tx_byte(i2c_regs, chip << 1);
 	if (ret < 0)
-		goto exit;
+		return ret;
 
 	while (alen--) {
 		ret = tx_byte(i2c_regs, (addr >> (alen * 8)) & 0xff);
 		if (ret < 0)
-			goto exit;
+			return ret;
 	}
 	return 0;
-exit:
-	i2c_imx_stop();
-	/* Disable I2C controller */
-	writeb(0, &i2c_regs->i2cr);
+}
+
+static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
+		uchar chip, uint addr, int alen)
+{
+	int retry;
+	int ret;
+	for (retry = 0; retry < 3; retry++) {
+		ret = i2c_init_transfer_(i2c_regs, chip, addr, alen);
+		if (ret >= 0)
+			return 0;
+		i2c_imx_stop();
+		if (ret == -ENODEV)
+			return ret;
+
+		printf("%s: failed for chip 0x%x retry=%d\n", __func__, chip,
+				retry);
+		if (ret != -ERESTART)
+			writeb(0, &i2c_regs->i2cr);	/* Disable controller */
+		udelay(100);
+	}
+	printf("%s: give up i2c_regs=%p\n", __func__, i2c_regs);
 	return ret;
 }

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #21 lore raw

PATCH v2 16/25 mxc_i2c: add i2c_regs argument to i2c_imx_stop

This is prep work for CONFIG_I2C_MULTI_BUS.

Signed-off-by Troy Kisky <[email protected]>

---
v2: add ack

---
 drivers/i2c/mxc_i2c.c |   19 +++++++------------
 1 file changed, 7 insertions(+), 12 deletions(-)

drivers/i2c/mxc_i2c.c +7 ~~-12~~

index cbb0fff..44a04b5 100644
@@ -201,10 +201,9 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 /*
  * Stop I2C transaction
  */
-void i2c_imx_stop(void)
+static void i2c_imx_stop(struct mxc_i2c_regs *i2c_regs)
 {
 	int ret;
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
 	unsigned int temp = readb(&i2c_regs->i2cr);
 
 	temp &= ~(I2CR_MSTA | I2CR_MTX);

@@ -271,7 +270,7 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 		ret = i2c_init_transfer_(i2c_regs, chip, addr, alen);
 		if (ret >= 0)
 			return 0;
-		i2c_imx_stop();
+		i2c_imx_stop(i2c_regs);
 		if (ret == -ENODEV)
 			return ret;

@@ -305,7 +304,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 
 	ret = tx_byte(i2c_regs, (chip << 1) | 1);
 	if (ret < 0) {
-		i2c_imx_stop();
+		i2c_imx_stop(i2c_regs);
 		return ret;
 	}

@@ -322,7 +321,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 	for (i = 0; i < len; i++) {
 		ret = wait_for_sr_state(i2c_regs, ST_IIF);
 		if (ret < 0) {
-			i2c_imx_stop();
+			i2c_imx_stop(i2c_regs);
 			return ret;
 		}

@@ -331,7 +330,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 		 * controller from generating another clock cycle
 		 */
 		if (i == (len - 1)) {
-			i2c_imx_stop();
+			i2c_imx_stop(i2c_regs);
 		} else if (i == (len - 2)) {
 			temp = readb(&i2c_regs->i2cr);
 			temp |= I2CR_TX_NO_AK;

@@ -340,9 +339,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 		writeb(0, &i2c_regs->i2sr);
 		buf[i] = readb(&i2c_regs->i2dr);
 	}
-
-	i2c_imx_stop();
-
+	i2c_imx_stop(i2c_regs);
 	return 0;
 }

@@ -364,9 +361,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 		if (ret < 0)
 			break;
 	}
-
-	i2c_imx_stop();
-
+	i2c_imx_stop(i2c_regs);
 	return ret;
 }

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #22 lore raw

PATCH v2 17/25 mxc_i2c: prep work for multiple busses support

Signed-off-by Troy Kisky <[email protected]>

---
v2: moved global data to static ram section available before ram is initialized and removed typedef as suggested by Marek Vasut and Heiko Schocher

make toggle_fn return int.

---
 drivers/i2c/mxc_i2c.c |  125 ++++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 104 insertions(+), 21 deletions(-)

drivers/i2c/mxc_i2c.c +104 ~~-21~~

index 44a04b5..d5448d8 100644
@@ -59,9 +59,7 @@ struct mxc_i2c_regs {
 #define I2SR_IIF	(1 << 1)
 #define I2SR_RX_NO_AK	(1 << 0)
 
-#ifdef CONFIG_SYS_I2C_BASE
-#define I2C_BASE	CONFIG_SYS_I2C_BASE
-#else
+#if defined(CONFIG_HARD_I2C) && !defined(CONFIG_SYS_I2C_BASE)
 #error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
 #endif

@@ -115,11 +113,11 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
 }
 
 /*
- * Init I2C Bus
+ * Set I2C Bus speed
  */
-void i2c_init(int speed, int unused)
+int bus_i2c_set_bus_speed(void *base, int speed)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 	u8 clk_idx = i2c_imx_get_clk(speed);
 	u8 idx = i2c_clk_div[clk_idx][1];

@@ -129,23 +127,15 @@ void i2c_init(int speed, int unused)
 	/* Reset module */
 	writeb(0, &i2c_regs->i2cr);
 	writeb(0, &i2c_regs->i2sr);
-}
-
-/*
- * Set I2C Speed
- */
-int i2c_set_bus_speed(unsigned int speed)
-{
-	i2c_init(speed, 0);
 	return 0;
 }
 
 /*
  * Get I2C Speed
  */
-unsigned int i2c_get_bus_speed(void)
+unsigned int bus_i2c_get_bus_speed(void *base)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 	u8 clk_idx = readb(&i2c_regs->ifdr);
 	u8 clk_div;

@@ -287,12 +277,13 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 /*
  * Read data from I2C device
  */
-int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+int bus_i2c_read(void *base, uchar chip, uint addr, int alen, uchar *buf,
+		int len)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
 	int ret;
 	unsigned int temp;
 	int i;
+	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
 	ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
 	if (ret < 0)

@@ -346,11 +337,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 /*
  * Write data to I2C device
  */
-int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
+		const uchar *buf, int len)
 {
-	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
 	int ret;
 	int i;
+	struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
 	ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
 	if (ret < 0)

@@ -365,10 +357,101 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 	return ret;
 }
 
+struct i2c_parms {
+	void *base;
+	void *toggle_data;
+	int (*toggle_fn)(void *p);
+};
+
+struct sram_data {
+	unsigned curr_i2c_bus;
+	struct i2c_parms i2c_data[3];
+};
+
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialized so force
+ * variables to live in SRAM
+ */
+static struct sram_data __attribute__((section(".data"))) srdata;
+
+void *get_base(void)
+{
+#ifdef CONFIG_SYS_I2C_BASE
+#ifdef CONFIG_I2C_MULTI_BUS
+	void *ret = srdata.i2c_data[srdata.curr_i2c_bus].base;
+	if (ret)
+		return ret;
+#endif
+	return (void *)CONFIG_SYS_I2C_BASE;
+#elif defined(CONFIG_I2C_MULTI_BUS)
+	return srdata.i2c_data[srdata.curr_i2c_bus].base;
+#else
+	return srdata.i2c_data[0].base;
+#endif
+}
+
+int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+	return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
+}
+
+int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+	return bus_i2c_write(get_base(), chip, addr, alen, buf, len);
+}
+
 /*
  * Test if a chip@a given address responds (probe the chip)
  */
 int i2c_probe(uchar chip)
 {
-	return i2c_write(chip, 0, 0, NULL, 0);
+	return bus_i2c_write(get_base(), chip, 0, 0, NULL, 0);
+}
+
+void bus_i2c_init(void *base, int speed, int unused,
+		int (*toggle_fn)(void *p), void *toggle_data)
+{
+	int i = 0;
+	struct i2c_parms *p = srdata.i2c_data;
+	if (!base)
+		return;
+	for (;;) {
+		if (!p->base || (p->base == base)) {
+			p->base = base;
+			if (toggle_fn) {
+				p->toggle_fn = toggle_fn;
+				p->toggle_data = toggle_data;
+			}
+			break;
+		}
+		p++;
+		i++;
+		if (i >= ARRAY_SIZE(srdata.i2c_data))
+			return;
+	}
+	bus_i2c_set_bus_speed(base, speed);
+}
+
+/*
+ * Init I2C Bus
+ */
+void i2c_init(int speed, int unused)
+{
+	bus_i2c_init(get_base(), speed, unused, NULL, NULL);
+}
+
+/*
+ * Set I2C Speed
+ */
+int i2c_set_bus_speed(unsigned int speed)
+{
+	return bus_i2c_set_bus_speed(get_base(), speed);
+}
+
+/*
+ * Get I2C Speed
+ */
+unsigned int i2c_get_bus_speed(void)
+{
+	return bus_i2c_get_bus_speed(get_base());
 }

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #23 lore raw

PATCH v2 18/25 mxc_i2c: add bus recovery support

Add support for calling a function that will toggle the SCL line to return the bus to idle condition.

The actual toggling function is added in a later patch.

Signed-off-by Troy Kisky <[email protected]>

---
v2: commit log change, global data in sram section. make toggle_i2c return int

---
 drivers/i2c/mxc_i2c.c |   26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

drivers/i2c/mxc_i2c.c +26 -0

index d5448d8..41849d3 100644
@@ -251,6 +251,8 @@ static int i2c_init_transfer_(struct mxc_i2c_regs *i2c_regs,
 	return 0;
 }
 
+static int toggle_i2c(void *base);
+
 static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 		uchar chip, uint addr, int alen)
 {

@@ -269,6 +271,8 @@ static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
 		if (ret != -ERESTART)
 			writeb(0, &i2c_regs->i2cr);	/* Disable controller */
 		udelay(100);
+		if (toggle_i2c(i2c_regs) < 0)
+			break;
 	}
 	printf("%s: give up i2c_regs=%p\n", __func__, i2c_regs);
 	return ret;

@@ -390,6 +394,28 @@ void *get_base(void)
 #endif
 }
 
+static struct i2c_parms *i2c_get_parms(void *base)
+{
+	int i = 0;
+	struct i2c_parms *p = srdata.i2c_data;
+	while (i < ARRAY_SIZE(srdata.i2c_data)) {
+		if (p->base == base)
+			return p;
+		p++;
+		i++;
+	}
+	printf("Invalid I2C base: %p\n", base);
+	return NULL;
+}
+
+static int toggle_i2c(void *base)
+{
+	struct i2c_parms *p = i2c_get_parms(base);
+	if (p && p->toggle_fn)
+		return p->toggle_fn(p->toggle_data);
+	return 0;
+}
+
 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 {
 	return bus_i2c_read(get_base(), chip, addr, alen, buf, len);

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #24 lore raw

PATCH v2 19/25 mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support

Signed-off-by Troy Kisky <[email protected]>

---
v2: global data in sram section

---
 drivers/i2c/mxc_i2c.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

drivers/i2c/mxc_i2c.c +17 -0

index 41849d3..2017399 100644
@@ -416,6 +416,23 @@ static int toggle_i2c(void *base)
 	return 0;
 }
 
+#ifdef CONFIG_I2C_MULTI_BUS
+unsigned int i2c_get_bus_num(void)
+{
+	return srdata.curr_i2c_bus;
+}
+
+int i2c_set_bus_num(unsigned bus_idx)
+{
+	if (bus_idx >= ARRAY_SIZE(srdata.i2c_data))
+		return -1;
+	if (!srdata.i2c_data[bus_idx].base)
+		return -1;
+	srdata.curr_i2c_bus = bus_idx;
+	return 0;
+}
+#endif
+
 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 {
 	return bus_i2c_read(get_base(), chip, addr, alen, buf, len);

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #25 lore raw

PATCH v2 20/25 iomux-v3: remove include of mx6x_pins.h

This include is not needed.

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 arch/arm/cpu/armv7/mx6/iomux-v3.c |    1 -
 1 file changed, 1 deletion(-)

arch/arm/cpu/armv7/mx6/iomux-v3.c +0 -1

index 8785532..a0c4b15 100644
@@ -23,7 +23,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/mx6x_pins.h>
 #include <asm/arch/iomux-v3.h>
 
 static void *base = (void *)IOMUXC_BASE_ADDR;

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:53 UTC #26 lore raw

PATCH v2 21/25 i.mx: iomux-v3.h: move to imx-common include directory

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 arch/arm/cpu/armv7/mx6/iomux-v3.c                  |    2 +-
 arch/arm/include/asm/arch-mx6/mx6x_pins.h          |    2 +-
 .../asm/{arch-mx6 => imx-common}/iomux-v3.h        |    0
 board/freescale/mx6qarm2/mx6qarm2.c                |    2 +-
 board/freescale/mx6qsabrelite/mx6qsabrelite.c      |    2 +-
 drivers/usb/host/ehci-mx6.c                        |    2 +-
 6 files changed, 5 insertions(+), 5 deletions(-)
 rename arch/arm/include/asm/{arch-mx6 => imx-common}/iomux-v3.h (100%)

arch/arm/cpu/armv7/mx6/iomux-v3.c +1 -1

index a0c4b15..da093fb 100644
@@ -23,7 +23,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux-v3.h>
+#include <asm/imx-common/iomux-v3.h>
 
 static void *base = (void *)IOMUXC_BASE_ADDR;

arch/arm/include/asm/arch-mx6/mx6x_pins.h +1 -1

index afaa068..c0bb494 100644
@@ -22,7 +22,7 @@
 #ifndef __ASM_ARCH_MX6_MX6X_PINS_H__
 #define __ASM_ARCH_MX6_MX6X_PINS_H__
 
-#include <asm/arch/iomux-v3.h>
+#include <asm/imx-common/iomux-v3.h>
 
 /* Use to set PAD control */
 #define PAD_CTL_HYS		(1 << 16)

arch/arm/include/asm/imx-common/iomux-v3.h renamed from arch/arm/include/asm/arch-mx6/iomux-v3.h +0 -0

similarity index 100%
rename from arch/arm/include/asm/arch-mx6/iomux-v3.h
rename to arch/arm/include/asm/imx-common/iomux-v3.h

board/freescale/mx6qarm2/mx6qarm2.c +1 -1

index 1367b88..340c4c4 100644
@@ -24,9 +24,9 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
-#include <asm/arch/iomux-v3.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
+#include <asm/imx-common/iomux-v3.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <miiphy.h>

board/freescale/mx6qsabrelite/mx6qsabrelite.c +1 -1

index 72b4b54..74ce84c 100644
@@ -24,9 +24,9 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
-#include <asm/arch/iomux-v3.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
+#include <asm/imx-common/iomux-v3.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <micrel.h>

drivers/usb/host/ehci-mx6.c +1 -1

index 5dec673..f2523f6 100644
@@ -22,7 +22,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6x_pins.h>
-#include <asm/arch/iomux-v3.h>
+#include <asm/imx-common/iomux-v3.h>
 
 #include "ehci.h"
 #include "ehci-core.h"

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:54 UTC #27 lore raw

PATCH v2 22/25 i.mx: iomux-v3.c: move to imx-common directory

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 arch/arm/cpu/armv7/imx-common/Makefile            |    2 +-
 arch/arm/cpu/armv7/{mx6 => imx-common}/iomux-v3.c |    0
 arch/arm/cpu/armv7/mx6/Makefile                   |    2 +-
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename arch/arm/cpu/armv7/{mx6 => imx-common}/iomux-v3.c (100%)

arch/arm/cpu/armv7/imx-common/Makefile +1 -1

index e5ff375..53296fa 100644
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 
 LIB     = $(obj)libimx-common.o
 
-COBJS	= timer.o cpu.o speed.o
+COBJS	= iomux-v3.o timer.o cpu.o speed.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))

arch/arm/cpu/armv7/imx-common/iomux-v3.c renamed from arch/arm/cpu/armv7/mx6/iomux-v3.c +0 -0

similarity index 100%
rename from arch/arm/cpu/armv7/mx6/iomux-v3.c
rename to arch/arm/cpu/armv7/imx-common/iomux-v3.c

arch/arm/cpu/armv7/mx6/Makefile +1 -1

index b0da028..cbce411 100644
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).o
 
-COBJS	= soc.o clock.o iomux-v3.o
+COBJS	= soc.o clock.o
 SOBJS   = lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:54 UTC #28 lore raw

PATCH v2 23/25 i.mx53: add definition for I2C3_BASE_ADDR

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 arch/arm/include/asm/arch-mx5/imx-regs.h |    1 +
 1 file changed, 1 insertion(+)

arch/arm/include/asm/arch-mx5/imx-regs.h +1 -0

index 4fa6658..caf5d21 100644
@@ -93,6 +93,7 @@
 #define GPIO5_BASE_ADDR         (AIPS1_BASE_ADDR + 0x000DC000)
 #define GPIO6_BASE_ADDR         (AIPS1_BASE_ADDR + 0x000E0000)
 #define GPIO7_BASE_ADDR         (AIPS1_BASE_ADDR + 0x000E4000)
+#define I2C3_BASE_ADDR		(AIPS1_BASE_ADDR + 0x000EC000)
 #endif
 /*
  * AIPS 2

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:54 UTC #29 lore raw

PATCH v2 24/25 imx-common: add i2c.c for bus recovery support

Signed-off-by Troy Kisky <[email protected]>

---
v2: do nothing if bus is already idle
print failure message if appropriate
change enable_i2c_clock to enable_i2c_clk clear non-idle bus before calling bus_i2c_init. wait .2 seconds for bus to clear before returning error fix compiler warnings

---
 arch/arm/cpu/armv7/imx-common/Makefile    |    4 +-
 arch/arm/cpu/armv7/imx-common/i2c.c       |   98 +++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/mx5/clock.c            |   20 ++++++
 arch/arm/cpu/armv7/mx6/clock.c            |   20 ++++++
 arch/arm/include/asm/arch-mx5/clock.h     |    1 +
 arch/arm/include/asm/arch-mx6/clock.h     |    1 +
 arch/arm/include/asm/imx-common/mxc_i2c.h |   42 +++++++++++++
 7 files changed, 185 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/imx-common/i2c.c
 create mode 100644 arch/arm/include/asm/imx-common/mxc_i2c.h

arch/arm/cpu/armv7/imx-common/Makefile +3 -1

index 53296fa..bf36be5 100644
@@ -27,7 +27,9 @@ include $(TOPDIR)/config.mk
 
 LIB     = $(obj)libimx-common.o
 
-COBJS	= iomux-v3.o timer.o cpu.o speed.o
+COBJS-y	= iomux-v3.o timer.o cpu.o speed.o
+COBJS-$(CONFIG_I2C_MXC) += i2c.o
+COBJS	:= $(sort $(COBJS-y))
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))

arch/arm/cpu/armv7/imx-common/i2c.c new file +98 -0

98 lines not on this page · raw message

arch/arm/cpu/armv7/mx5/clock.c +20 -0

index e92f106..c2220b0 100644
@@ -80,6 +80,26 @@ void enable_usboh3_clk(unsigned char enable)
 	writel(reg, &mxc_ccm->CCGR2);
 }
 
+#ifdef CONFIG_I2C_MXC
+/* i2c_num can be from 0 - 2 */
+int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
+{
+	u32 reg;
+	u32 mask;
+
+	if (i2c_num > 2)
+		return -EINVAL;
+	mask = MXC_CCM_CCGR_CG_MASK << ((i2c_num + 9) << 1);
+	reg = __raw_readl(&mxc_ccm->CCGR1);
+	if (enable)
+		reg |= mask;
+	else
+		reg &= ~mask;
+	__raw_writel(reg, &mxc_ccm->CCGR1);
+	return 0;
+}
+#endif
+
 void set_usb_phy1_clk(void)
 {
 	unsigned int reg;

arch/arm/cpu/armv7/mx6/clock.c +20 -0

index ef98563..24f1e89 100644
@@ -49,6 +49,26 @@ void enable_usboh3_clk(unsigned char enable)
 
 }
 
+#ifdef CONFIG_I2C_MXC
+/* i2c_num can be from 0 - 2 */
+int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
+{
+	u32 reg;
+	u32 mask;
+
+	if (i2c_num > 2)
+		return -EINVAL;
+	mask = MXC_CCM_CCGR_CG_MASK << ((i2c_num + 3) << 1);
+	reg = __raw_readl(&imx_ccm->CCGR2);
+	if (enable)
+		reg |= mask;
+	else
+		reg &= ~mask;
+	__raw_writel(reg, &imx_ccm->CCGR2);
+	return 0;
+}
+#endif
+
 static u32 decode_pll(enum pll_clocks pll, u32 infreq)
 {
 	u32 div;

arch/arm/include/asm/arch-mx5/clock.h +1 -0

index ea972a3..da604bf 100644
@@ -44,5 +44,6 @@ void set_usb_phy2_clk(void);
 void enable_usb_phy2_clk(unsigned char enable);
 void set_usboh3_clk(void);
 void enable_usboh3_clk(unsigned char enable);
+int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
 
 #endif /* __ASM_ARCH_CLOCK_H */

arch/arm/include/asm/arch-mx6/clock.h +1 -0

index 613809b..04daf36 100644
@@ -47,5 +47,6 @@ u32 imx_get_uartclk(void);
 u32 imx_get_fecclk(void);
 unsigned int mxc_get_clock(enum mxc_clock clk);
 void enable_usboh3_clk(unsigned char enable);
+int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
 
 #endif /* __ASM_ARCH_CLOCK_H */

arch/arm/include/asm/imx-common/mxc_i2c.h new file +42 -0

42 lines not on this page · raw message

Signature · 1 line

1.7.9.5

Troy Kisky

author

2012-07-05 19:54 UTC #30 lore raw

PATCH v2 25/25 mx6qsabrelite: add i2c multi-bus support

This includes bus recovery support.

Signed-off-by Troy Kisky <[email protected]>

---
v2: no change

---
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   50 +++++++++++++++++++++++--
 include/configs/mx6qsabrelite.h               |    6 +--
 2 files changed, 48 insertions(+), 8 deletions(-)

board/freescale/mx6qsabrelite/mx6qsabrelite.c +46 -4

index 74ce84c..29c6630 100644
@@ -27,6 +27,7 @@
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/mxc_i2c.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <micrel.h>

@@ -72,9 +73,48 @@ iomux_v3_cfg_t uart2_pads[] = {
        MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t i2c3_pads[] = {
-	MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
-	MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+/* I2C1, SGTL5000 */
+struct i2c_pads_info i2c_pad_info0 = {
+	.scl = {
+		.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
+		.gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC,
+		.gp = GPIO_NUMBER(3, 21)
+	},
+	.sda = {
+		.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
+		.gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC,
+		.gp = GPIO_NUMBER(3, 28)
+	}
+};
+
+/* I2C2 Camera, MIPI */
+struct i2c_pads_info i2c_pad_info1 = {
+	.scl = {
+		.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
+		.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC,
+		.gp = GPIO_NUMBER(4, 12)
+	},
+	.sda = {
+		.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
+		.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC,
+		.gp = GPIO_NUMBER(4, 13)
+	}
+};
+
+/* I2C3, J15 - RGB connector */
+struct i2c_pads_info i2c_pad_info2 = {
+	.scl = {
+		.i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC,
+		.gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC,
+		.gp = GPIO_NUMBER(1, 5)
+	},
+	.sda = {
+		.i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC,
+		.gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC,
+		.gp = GPIO_NUMBER(7, 11)
+	}
 };
 
 iomux_v3_cfg_t usdhc3_pads[] = {

@@ -292,7 +332,9 @@ int board_init(void)
 #ifdef CONFIG_MXC_SPI
 	setup_spi();
 #endif
-	imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
+	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
+	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+	setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
 
        return 0;
 }

include/configs/mx6qsabrelite.h +2 -4

index df2b735..c3c6be2 100644
@@ -60,11 +60,9 @@
 
 /* I2C Configs */
 #define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MULTI_BUS
 #define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE		I2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED            100000
-#define CONFIG_SYS_I2C_SLAVE            0xfe
+#define CONFIG_SYS_I2C_SPEED		100000
 
 /* MMC Configs */
 #define CONFIG_FSL_ESDHC

Signature · 1 line

1.7.9.5

Marek Vasut

2012-07-06 23:08 UTC #31 lore raw

PATCH v2 1/25 mxc_i2c: fix i2c_imx_stop