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i.MX28: bug fixes in PMU configuration code

PATCH Superseded Stathis Voukelatos 5 participants 7 messages Jun 27, 2012 – Jul 20, 2012 Arm (32-bit)

v1 of 2 Superseded Latest is v2 →

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Stathis Voukelatos

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#0 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

Fixed some typos in the i.MX28 PMU code that sets up the VDDD and VDDIO power rails. In addition the VDDD and VDDIO brownout offset values should be divided by a step size before being programmed to the corresponding registers.

Signed-off-by Stathis Voukelatos <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>
---
 arch/arm/cpu/arm926ejs/mx28/spl_power_init.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +6 -6
index 4b09b0c..cc71af8 100644
@@ -716,7 +716,7 @@ int mx28_get_vddio_power_source_off(void)
                tmp = readl(&power_regs->hw_power_vddioctrl);
                if (tmp & POWER_VDDIOCTRL_DISABLE_FET) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }

@@ -724,7 +724,7 @@ int mx28_get_vddio_power_source_off(void)
                if (!(readl(&power_regs->hw_power_5vctrl) &
                        POWER_5VCTRL_ENABLE_DCDC)) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }

@@ -772,7 +772,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
        uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 25) / 50;
 
        cur_target = readl(&power_regs->hw_power_vddioctrl);
        cur_target &= POWER_VDDIOCTRL_TRG_MASK;

@@ -858,8 +858,8 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
        }
 
        clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                       POWER_VDDDCTRL_BO_OFFSET_MASK,
-                       new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
+                       POWER_VDDIOCTRL_BO_OFFSET_MASK,
+                       new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
 }
 
 void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)

@@ -869,7 +869,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
        uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 12) / 25;
 
        cur_target = readl(&power_regs->hw_power_vdddctrl);
        cur_target &= POWER_VDDDCTRL_TRG_MASK;
Signature · 1 line
1.7.2.5
#1 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

Dear Stathis Voukelatos,

Quoted 8 lines

Fixed some typos in the i.MX28 PMU code that sets up the VDDD and VDDIO power rails. In addition the VDDD and VDDIO brownout offset values should be divided by a step size before being programmed to the corresponding registers.

Signed-off-by Stathis Voukelatos <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>

Will test it ASAP. I should be getting new board by next week, so I'll test- drive it on that one too.

Thanks for finding those!

Quoted 48 lines
---
 arch/arm/cpu/arm926ejs/mx28/spl_power_init.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)
(quoted diff) +0 -0

b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index 4b09b0c..cc71af8 100644

arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +5 -5
@@ -716,7 +716,7 @@ int mx28_get_vddio_power_source_off(void)
                tmp = readl(&power_regs->hw_power_vddioctrl);
                if (tmp & POWER_VDDIOCTRL_DISABLE_FET) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }

@@ -724,7 +724,7 @@ int mx28_get_vddio_power_source_off(void)
                if (!(readl(&power_regs->hw_power_5vctrl) &
                        POWER_5VCTRL_ENABLE_DCDC)) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }

@@ -772,7 +772,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
 new_brownout) uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 25) / 50;
 
        cur_target = readl(&power_regs->hw_power_vddioctrl);
        cur_target &= POWER_VDDIOCTRL_TRG_MASK;

@@ -858,8 +858,8 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
 new_brownout) }
 
        clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                       POWER_VDDDCTRL_BO_OFFSET_MASK,
-                       new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
+                       POWER_VDDIOCTRL_BO_OFFSET_MASK,
+                       new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
 }
 
 void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)

arch/arm/cpu/arm926ejs/mx28/spl_power_init.c void mx28_power_set_vddd(uint32_t new_target, uint32_t · line 875

Quoted 8 lines
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +1 -1
@@ -869,7 +869,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
 new_brownout) uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 12) / 25;
 
        cur_target = readl(&power_regs->hw_power_vdddctrl);
        cur_target &= POWER_VDDDCTRL_TRG_MASK;

Best regards,
Marek Vasut

#2 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

In reply to Stathis Voukelatos

Dear Stathis Voukelatos,

Quoted 8 lines

Fixed some typos in the i.MX28 PMU code that sets up the VDDD and VDDIO power rails. In addition the VDDD and VDDIO brownout offset values should be divided by a step size before being programmed to the corresponding registers.

Signed-off-by Stathis Voukelatos <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>

All right, yet another minus point for my responsiveness :-(

Tested-by Marek Vasut <[email protected]>
Acked-by Marek Vasut <[email protected]>

Fabio, can you give it a quick spin on mx28evk so we can roll this late into this release maybe ?

Quoted 48 lines
---
 arch/arm/cpu/arm926ejs/mx28/spl_power_init.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)
(quoted diff) +0 -0

b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index 4b09b0c..cc71af8 100644

arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +5 -5
@@ -716,7 +716,7 @@ int mx28_get_vddio_power_source_off(void)
                tmp = readl(&power_regs->hw_power_vddioctrl);
                if (tmp & POWER_VDDIOCTRL_DISABLE_FET) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }

@@ -724,7 +724,7 @@ int mx28_get_vddio_power_source_off(void)
                if (!(readl(&power_regs->hw_power_5vctrl) &
                        POWER_5VCTRL_ENABLE_DCDC)) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }

@@ -772,7 +772,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
 new_brownout) uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 25) / 50;
 
        cur_target = readl(&power_regs->hw_power_vddioctrl);
        cur_target &= POWER_VDDIOCTRL_TRG_MASK;

@@ -858,8 +858,8 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
 new_brownout) }
 
        clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                       POWER_VDDDCTRL_BO_OFFSET_MASK,
-                       new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
+                       POWER_VDDIOCTRL_BO_OFFSET_MASK,
+                       new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
 }
 
 void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)

arch/arm/cpu/arm926ejs/mx28/spl_power_init.c void mx28_power_set_vddd(uint32_t new_target, uint32_t · line 875

Quoted 8 lines
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +1 -1
@@ -869,7 +869,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
 new_brownout) uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 12) / 25;
 
        cur_target = readl(&power_regs->hw_power_vdddctrl);
        cur_target &= POWER_VDDDCTRL_TRG_MASK;

Best regards,
Marek Vasut

#3 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

Hi Marek,

Quoted 2 lines · Marek Vasut

Fabio, can you give it a quick spin on mx28evk so we can roll this late into this release maybe ?

I don't have access to my mx28evk now and will be out of the office in the following 2 weeks.

Maybe Otavio could test it on a mx28evk?

#4 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

In reply to Stathis Voukelatos

Dear Stathis Voukelatos,

Quoted 8 lines

Fixed some typos in the i.MX28 PMU code that sets up the VDDD and VDDIO power rails. In addition the VDDD and VDDIO brownout offset values should be divided by a step size before being programmed to the corresponding registers.

Signed-off-by Stathis Voukelatos <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>

Stefano, I think this should be applied.

THanks!

Best regards,
Marek Vasut

#5 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

Quoted 7 lines · Marek Vasut

Dear Stathis Voukelatos,

Quoted 5 lines

Fixed some typos in the i.MX28 PMU code that sets up the VDDD and VDDIO power rails. In addition the VDDD and VDDIO brownout offset values should be divided by a step size before being programmed to the corresponding registers.

Quoted 5 lines
Quoted 3 lines
Signed-off-by Stathis Voukelatos <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>

Stefano, I think this should be applied.

There are checkpatch errors that should be fixed before applying. Stathis, can you check them and resubmit ? Thanks.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#6 lore raw

PATCH 1/1 i.MX28: bug fixes in PMU configuration code

Dear Stefano Babic,

Quoted 8 lines · Marek Vasut
Quoted 7 lines

Dear Stathis Voukelatos,

Quoted 5 lines

Fixed some typos in the i.MX28 PMU code that sets up the VDDD and VDDIO power rails. In addition the VDDD and VDDIO brownout offset values should be divided by a step size before being programmed to the corresponding registers.

Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
Signed-off-by Stathis Voukelatos <[email protected]>
Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>

Stefano, I think this should be applied.

There are checkpatch errors that should be fixed before applying. Stathis, can you check them and resubmit ? Thanks.

I can eventually resubmit if Stathis grew unhappy about the slow response time :-(

Best regards,
Marek Vasut