perf events changes for v3.6

Linus,

Please pull the latest perf-core-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf-core-for-linus

HEAD: 6e0f17be0361444862637e8986c8c1a3b3f8dcf8 Merge branch 'tip/perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace into perf/core

Major changes are:

- kernel side:

- Intel uncore PMU support for Nehalem and Sandy Bridge CPUs, we support both the events available via the MSR and via the PCI access space.

- various uprobes cleanups and restructurings

- PMU driver quirks by microcode version and required x86 microcode loader cleanups/robustization

- various tracing robustness updates

- static keys: remove obsolete static_branch()

- tooling side:

- GTK browser improvements

- perf report browser: support screenshots to file

- more automated tests

- perf kvm improvements

- perf bench refinements

- build environment improvements

- pipe mode improvements

- libtraceevent updates, we have now hopefully merged most bits with the out of tree forked code base

... and many other goodies.

Thanks,

Ingo

------------------>
Ananth N Mavinakayanahalli (1):
uprobes: Pass probed vaddr to arch_uprobe_analyze_insn()

Andi Kleen (2):
x86: Add rdpmcl()
perf/x86: Don't assume there can be only 4 PEBS events

Andre Przywara (2):
x86, pvops: Remove hooks for {rd,wr}msr_safe_regs x86, cpu, amd: Fix crash as Xen Dom0 on AMD Trinity systems

Arnaldo Carvalho de Melo (14):
perf tools: Add sort by src line/number
perf lib: Introduce rtrim
perf hists browser: Implement printing snapshots to files perf evsel: Carve out event modifier formatting
perf tools: Reconstruct hw cache event with modifiers from perf_event_attr perf tools: Reconstruct sw event with modifiers from perf_event_attr perf evsel: Handle all event types in perf_evsel__name
perf tools: Move all users of event_name to perf_evsel__name perf script: Replace __event_name uses with perf_evsel__name perf tools: Don't access evsel->name directly
perf tools: Remove __event_name
perf evsel: Reconstruct raw event with modifiers from perf_event_attr perf evsel: Make some methods private
perf tools: Stop using a global trace events description list

Borislav Petkov (5):
x86, cpu: Fix show_msr MSR accessing function
x86, cpu, amd: Deprecate AMD-specific MSR variants
ftrace: Remove a superfluous check
x86, microcode: Sanitize per-cpu microcode reloading interface x86, microcode: Make reload interface per system

Dan Carpenter (1):
tracing: Check for allocation failure in __tracing_open()

David Ahern (2):
perf report: Delay sample_type checks in pipe mode perf tools: Trivial build fix

H. Peter Anvin (1):
x86, cpu: Rename checking_wrmsrl() to wrmsrl_safe()

Hitoshi Mitake (1):
perf bench: Fix confused variable namings and descriptions in mem subsystem

Jason Baron (2):
tracepoint: Use static_key_false(), since static_branch() is deprecated jump label: Remove static_branch()

Jiri Olsa (13):
perf/tool: Use data struct for arg passing in event parse function perf/tool: Add support to reuse event grammar to parse out terms perf/tool: Add automated test for pure terms parsing
perf tools: Remove unused evsel parameter from machine__resolve_callchain perf test: Fix parse events test to follow proper raw event name perf tools: Fix hw breakpoint's type modifier parsing
perf evsel: Handle hw breakpoints event names in perf_evsel__name() perf symbols: Add '.note' check into search for NOTE section perf tools: Adding round_up/round_down macros
perf test: Use ARRAY_SIZE in parse events tests
perf tools: Add empty rule for new line in event syntax parsing perf tools: Split out PE_VALUE_SYM parsing token to SW and HW tokens perf tools: Split event symbols arrays to hw and sw parts

Konstantin Stepanyuk (1):
tools lib traceevent: Fix clean target in Makefile

Namhyung Kim (24):
perf ui: Introduce struct perf_error_ops
perf ui/gtk: Introduce struct perf_gtk_context
perf ui/gtk: Add GTK statusbar widget to browser window
perf ui/gtk: Add GTK info_bar widget to browser window
perf ui/gtk: Use struct perf_error_ops
perf evsel: Fix a build failure on cross compilation
perf bench: Documentation update
tracing/kvm: Use __print_hex() for kvm_emulate_insn tracepoint tools lib traceevent: Teach [ce]tags about libtraceeevent error codes tools lib traceevent: Make dependency files regeneratable
tools lib traceevent: Check string is really printable
tools lib traceevent: Use local variable 'field'
tools lib traceevent: Add support for __print_hex()
tools lib traceevent: Replace malloc_or_die to plain malloc in alloc_event() tools lib traceevent: Fix printk_cmp()
tools lib traceevent: Introduce extend_token()
tools lib traceevent: Handle strdup failure cases
tools lib traceevent: Handle realloc() failure path
tools lib traceevent: Pass string type argument to args
tools lib traceevent: Do not call add_event() again if allocation failed tools lib traceevent: Fix some comments
tools lib traceevent: Check result of malloc() during reading token tools lib traceevent: Check return value of arg_to_str()
tools lib traceevent: Cleanup realloc use

Oleg Nesterov (21):
uprobes: Optimize is_swbp_at_addr() for current->mm
uprobes: Change read_opcode() to use FOLL_FORCE
uprobes: Introduce find_active_uprobe() helper
uprobes: Teach find_active_uprobe() to provide the "is_swbp" info
uprobes: Change register_for_each_vma() to take mm->mmap_sem for writing
uprobes: Teach handle_swbp() to rely on "is_swbp" rather than uprobes_srcu
uprobes: Kill uprobes_srcu/uprobe_srcu_id
uprobes: Valid_vma() should reject VM_HUGETLB
uprobes: __copy_insn() should ensure a_ops->readpage != NULL
uprobes: Write_opcode()->__replace_page() can race with try_to_unmap()
uprobes: Install_breakpoint() should fail if is_swbp_insn() == T
uprobes: Rework register_for_each_vma() to make it O(n)
uprobes: Change build_map_info() to try kmalloc(GFP_NOWAIT) first
uprobes: Copy_insn() shouldn't depend on mm/vma/vaddr
uprobes: Copy_insn() should not return -ENOMEM if __copy_insn() fails
uprobes: No need to re-check vma_address() in write_opcode()
uprobes: Move BUG_ON(UPROBE_SWBP_INSN_SIZE) from write_opcode() to install_breakpoint()
uprobes: Simplify the usage of uprobe->pending_list
uprobes: Don't use loff_t for the valid virtual address
uprobes: __copy_insn() needs "loff_t offset"
uprobes: Remove the unnecessary initialization in add_utask()

Pekka Enberg (1):
perf/x86: Fix intel_perfmon_event_mapformatting

Peter Huewe (1):
tools lib traceevent: Add missing break in make_bprint_args

Peter Zijlstra (10):
perf/x86: Fix Intel shared extra MSR allocation perf/x86: Implement cycles:p for SNB/IVB perf/x86: Enable/Add IvyBridge hardware support perf/x86: Update SNB PEBS constraints
perf/x86: Fix wrmsrl() debug wrapper
uprobes: Document uprobe_register() vs uprobe_mmap() race perf/x86: Lowercase uncore PMU event names perf/x86: Fix USER/KERNEL tagging of samples perf/x86: Add a microcode revision check for SNB-PEBS perf/x86: Save a few bytes in 'struct x86_pmu'

Pierre-Loup A. Griffais (1):
perf symbols: Follow .gnu_debuglink section to find separate symbols

Robert Richter (8):
perf/x86/amd: Fix RDPMC index calculation for AMD family 15h oprofile, perf: Use per-cpu framework
perf/x86: Fix section mismatch in uncore_pci_init() perf tools: Fix generation of pmu list
perf/x86: Rename Intel specific macros
perf/x86: Move Intel specific code to intel_pmu_init() perf/x86/amd: Unify AMD's generic and family 15h pmus perf/x86: Improve debug output in check_hw_exists()

Samuel Liao (1):
perf annotate: Check null of sym pointer before using it

Shuah Khan (1):
perf/x86: Convert obsolete simple_strtoul() usage to kstrtoul()

Steven Rostedt (9):
tracing: Add comments for the other bits of ftrace_event_call.flags
tracing: Register the ftrace internal events during early boot tracing/selftest: Add a WARN_ON() if a tracer test fails
tracing: Remove NR_CPUS array from trace_iterator
ring-buffer: Fix uninitialized read_stamp
tools lib traceevent: Let filtering numbers by string use function names tools lib traceevent: Add support for "%.*s" in bprintk events tools lib traceevent: Add support to show migrate disable counter tools lib traceevent: Fix %pM print format arg handling

Vince Weaver (1):
perf/x86: Use rdpmc() rather than rdmsr() when possible in the kernel

Wolfgang Mauerer (1):
tools lib traceevent: Fix trace_printk for long integers

Yan, Zheng (12):
perf: Export perf_assign_events()
perf: Avoid race between cpu hotplug and installing event
perf: Allow the PMU driver to choose the CPU on which to install events
perf: Introduce perf_pmu_migrate_context()
perf/x86: Add generic Intel uncore PMU support
perf/x86: Add Intel Nehalem and Sandy Bridge uncore PMU support
perf: Add generic PCI uncore PMU device support
perf/x86: Add Intel Nehalem and Sandy Bridge-EP uncore support perf/x86: Use 0xff as pseudo code for fixed uncore event perf/x86: Fix event constraint for SandyBridge-EP C-Box perf/x86: Detect number of instances of uncore CBox perf/x86: Uncore filter support for SandyBridge-EP

Zheng Yan (2):
perf/tool: Make the event parser re-entrant
perf/tool: Add PMU event alias support

 arch/x86/include/asm/kvm_host.h                    |    4 +-
 arch/x86/include/asm/msr.h                         |   46 +-
 arch/x86/include/asm/paravirt.h                    |   41 +-
 arch/x86/include/asm/paravirt_types.h              |    2 -
 arch/x86/include/asm/perf_event.h                  |   22 +-
 arch/x86/include/asm/uprobes.h                     |    2 +-
 arch/x86/kernel/cpu/Makefile                       |    4 +-
 arch/x86/kernel/cpu/amd.c                          |   39 +-
 arch/x86/kernel/cpu/common.c                       |    2 +-
 arch/x86/kernel/cpu/perf_event.c                   |  111 +-
 arch/x86/kernel/cpu/perf_event.h                   |   26 +-
 arch/x86/kernel/cpu/perf_event_amd.c               |  103 +-
 arch/x86/kernel/cpu/perf_event_intel.c             |  122 +-
 arch/x86/kernel/cpu/perf_event_intel_ds.c          |   12 +-
 arch/x86/kernel/cpu/perf_event_intel_uncore.c      | 1850 ++++++++++++++++++++
 arch/x86/kernel/cpu/perf_event_intel_uncore.h      |  424 +++++
 arch/x86/kernel/cpu/perf_event_p4.c                |   16 +-
 arch/x86/kernel/cpu/perf_event_p6.c                |    4 +-
 arch/x86/kernel/microcode_core.c                   |   64 +-
 arch/x86/kernel/paravirt.c                         |    2 -
 arch/x86/kernel/process_64.c                       |    4 +-
 arch/x86/kernel/uprobes.c                          |    3 +-
 arch/x86/kvm/pmu.c                                 |   22 +-
 arch/x86/kvm/trace.h                               |   12 +-
 arch/x86/lib/msr-reg-export.c                      |    4 +-
 arch/x86/lib/msr-reg.S                             |   10 +-
 arch/x86/oprofile/op_model_amd.c                   |    4 +-
 arch/x86/vdso/vdso32-setup.c                       |    6 +-
 arch/x86/xen/enlighten.c                           |    2 -
 drivers/oprofile/oprofile_perf.c                   |   23 +-
 include/linux/ftrace_event.h                       |    5 +-
 include/linux/jump_label.h                         |   17 +-
 include/linux/pci_ids.h                            |   11 +
 include/linux/perf_event.h                         |    3 +
 include/linux/sched.h                              |    1 -
 include/linux/tracepoint.h                         |    2 +-
 include/trace/ftrace.h                             |    1 +
 kernel/events/core.c                               |   49 +-
 kernel/events/uprobes.c                            |  461 +++--
 kernel/trace/ftrace.c                              |    8 +-
 kernel/trace/ring_buffer.c                         |    4 +
 kernel/trace/trace.c                               |   33 +-
 kernel/trace/trace.h                               |    8 +
 kernel/trace/trace_functions_graph.c               |    2 +-
 kernel/trace/trace_output.c                        |    2 +-
 tools/lib/traceevent/Makefile                      |   14 +-
 tools/lib/traceevent/event-parse.c                 |  399 +++--
 tools/lib/traceevent/event-parse.h                 |    7 +
 tools/lib/traceevent/parse-filter.c                |   86 +-
 tools/perf/Documentation/perf-bench.txt            |   78 +-
 tools/perf/Documentation/perf-report.txt           |    2 +-
 tools/perf/Documentation/perf-top.txt              |    2 +-
 tools/perf/Makefile                                |    8 +-
 tools/perf/bench/mem-memcpy.c                      |   84 +-
 tools/perf/bench/mem-memset.c                      |   88 +-
 tools/perf/builtin-bench.c                         |    4 +-
 tools/perf/builtin-evlist.c                        |    2 +-
 tools/perf/builtin-kmem.c                          |   37 +-
 tools/perf/builtin-lock.c                          |    4 +-
 tools/perf/builtin-record.c                        |    4 +-
 tools/perf/builtin-report.c                        |   16 +-
 tools/perf/builtin-sched.c                         |   38 +-
 tools/perf/builtin-script.c                        |  106 +-
 tools/perf/builtin-stat.c                          |   12 +-
 tools/perf/builtin-test.c                          |    2 +-
 tools/perf/builtin-top.c                           |   12 +-
 tools/perf/config/feature-tests.mak                |   13 +
 tools/perf/ui/browsers/annotate.c                  |    4 +-
 tools/perf/ui/browsers/hists.c                     |  210 ++-
 tools/perf/ui/gtk/browser.c                        |   69 +-
 tools/perf/ui/gtk/gtk.h                            |   31 +
 tools/perf/ui/gtk/setup.c                          |    5 +
 tools/perf/ui/gtk/util.c                           |  129 ++
 tools/perf/ui/tui/setup.c                          |    6 +
 tools/perf/ui/tui/util.c                           |  243 +++
 tools/perf/ui/util.c                               |  277 +--
 tools/perf/ui/util.h                               |    9 +-
 tools/perf/util/debug.c                            |    2 +-
 tools/perf/util/debug.h                            |   23 +-
 tools/perf/util/evlist.c                           |    4 +-
 tools/perf/util/evlist.h                           |    3 +
 tools/perf/util/evsel.c                            |  227 ++-
 tools/perf/util/evsel.h                            |   15 +-
 tools/perf/util/header.c                           |   33 +-
 tools/perf/util/hist.h                             |    1 +
 tools/perf/util/include/linux/kernel.h             |   10 +
 tools/perf/util/map.h                              |    2 +-
 tools/perf/util/parse-events-test.c                |  179 +-
 tools/perf/util/parse-events.c                     |  470 +++--
 tools/perf/util/parse-events.h                     |   17 +-
 tools/perf/util/parse-events.l                     |  134 +-
 tools/perf/util/parse-events.y                     |   86 +-
 tools/perf/util/pmu.c                              |  169 +-
 tools/perf/util/pmu.h                              |   11 +-
 .../perf/util/scripting-engines/trace-event-perl.c |   32 +-
 .../util/scripting-engines/trace-event-python.c    |   25 +-
 tools/perf/util/session.c                          |   65 +-
 tools/perf/util/session.h                          |   14 +-
 tools/perf/util/sort.c                             |   49 +
 tools/perf/util/sort.h                             |    2 +
 tools/perf/util/string.c                           |   22 +
 tools/perf/util/symbol.c                           |   94 +-
 tools/perf/util/symbol.h                           |    1 +
 tools/perf/util/top.c                              |    2 +-
 tools/perf/util/trace-event-parse.c                |   58 +-
 tools/perf/util/trace-event-read.c                 |   97 +-
 tools/perf/util/trace-event-scripting.c            |    7 +-
 tools/perf/util/trace-event.h                      |   38 +-
 tools/perf/util/util.h                             |    2 +
 109 files changed, 5782 insertions(+), 1706 deletions(-)
 create mode 100644 arch/x86/kernel/cpu/perf_event_intel_uncore.c
 create mode 100644 arch/x86/kernel/cpu/perf_event_intel_uncore.h
 create mode 100644 tools/perf/ui/gtk/util.c
 create mode 100644 tools/perf/ui/tui/util.c

index db7c1f2..2da88c0 100644
@@ -313,8 +313,8 @@ struct kvm_pmu {
 	u64 counter_bitmask[2];
 	u64 global_ctrl_mask;
 	u8 version;
-	struct kvm_pmc gp_counters[X86_PMC_MAX_GENERIC];
-	struct kvm_pmc fixed_counters[X86_PMC_MAX_FIXED];
+	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
+	struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
 	struct irq_work irq_work;
 	u64 reprogram_pmi;
 };

index 8e8b9a4..8613cbb 100644
@@ -153,9 +153,7 @@ struct pv_cpu_ops {
 	/* MSR, PMC and TSR operations.
 	   err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
 	u64 (*read_msr)(unsigned int msr, int *err);
-	int (*rdmsr_regs)(u32 *regs);
 	int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
-	int (*wrmsr_regs)(u32 *regs);
 
 	u64 (*read_tsc)(void);
 	u64 (*read_pmc)(int counter);

index 588f52e..c78f14a 100644
@@ -5,11 +5,10 @@
  * Performance event hw details:
  */
 
-#define X86_PMC_MAX_GENERIC				       32
-#define X86_PMC_MAX_FIXED					3
+#define INTEL_PMC_MAX_GENERIC				       32
+#define INTEL_PMC_MAX_FIXED					3
+#define INTEL_PMC_IDX_FIXED				       32
 
-#define X86_PMC_IDX_GENERIC				        0
-#define X86_PMC_IDX_FIXED				       32
 #define X86_PMC_IDX_MAX					       64
 
 #define MSR_ARCH_PERFMON_PERFCTR0			      0xc1

@@ -48,8 +47,7 @@
 	(X86_RAW_EVENT_MASK          |  \
 	 AMD64_EVENTSEL_EVENT)
 #define AMD64_NUM_COUNTERS				4
-#define AMD64_NUM_COUNTERS_F15H				6
-#define AMD64_NUM_COUNTERS_MAX				AMD64_NUM_COUNTERS_F15H
+#define AMD64_NUM_COUNTERS_CORE				6
 
 #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL		0x3c
 #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK		(0x00 << 8)

@@ -121,16 +119,16 @@ struct x86_pmu_capability {
 
 /* Instr_Retired.Any: */
 #define MSR_ARCH_PERFMON_FIXED_CTR0	0x309
-#define X86_PMC_IDX_FIXED_INSTRUCTIONS	(X86_PMC_IDX_FIXED + 0)
+#define INTEL_PMC_IDX_FIXED_INSTRUCTIONS	(INTEL_PMC_IDX_FIXED + 0)
 
 /* CPU_CLK_Unhalted.Core: */
 #define MSR_ARCH_PERFMON_FIXED_CTR1	0x30a
-#define X86_PMC_IDX_FIXED_CPU_CYCLES	(X86_PMC_IDX_FIXED + 1)
+#define INTEL_PMC_IDX_FIXED_CPU_CYCLES	(INTEL_PMC_IDX_FIXED + 1)
 
 /* CPU_CLK_Unhalted.Ref: */
 #define MSR_ARCH_PERFMON_FIXED_CTR2	0x30b
-#define X86_PMC_IDX_FIXED_REF_CYCLES	(X86_PMC_IDX_FIXED + 2)
-#define X86_PMC_MSK_FIXED_REF_CYCLES	(1ULL << X86_PMC_IDX_FIXED_REF_CYCLES)
+#define INTEL_PMC_IDX_FIXED_REF_CYCLES	(INTEL_PMC_IDX_FIXED + 2)
+#define INTEL_PMC_MSK_FIXED_REF_CYCLES	(1ULL << INTEL_PMC_IDX_FIXED_REF_CYCLES)
 
 /*
  * We model BTS tracing as another fixed-mode PMC.

@@ -139,7 +137,7 @@ struct x86_pmu_capability {
  * values are used by actual fixed events and higher values are used
  * to indicate other overflow conditions in the PERF_GLOBAL_STATUS msr.
  */
-#define X86_PMC_IDX_FIXED_BTS				(X86_PMC_IDX_FIXED + 16)
+#define INTEL_PMC_IDX_FIXED_BTS				(INTEL_PMC_IDX_FIXED + 16)
 
 /*
  * IBS cpuid feature detection

@@ -234,6 +232,7 @@ struct perf_guest_switch_msr {
 
 extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
 extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap);
+extern void perf_check_microcode(void);
 #else
 static inline perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
 {

@@ -247,6 +246,7 @@ static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
 }
 
 static inline void perf_events_lapic_init(void)	{ }
+static inline void perf_check_microcode(void) { }
 #endif
 
 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)

index 1e9bed1..f3971bb 100644
@@ -48,7 +48,7 @@ struct arch_uprobe_task {
 #endif
 };
 
-extern int  arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm);
+extern int  arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long addr);
 extern int  arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs);
 extern int  arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs);
 extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk);

index 6ab6aa2..bac4c38 100644
@@ -32,7 +32,9 @@ obj-$(CONFIG_PERF_EVENTS)		+= perf_event.o
 
 ifdef CONFIG_PERF_EVENTS
 obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd.o
-obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_p6.o perf_event_p4.o perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_p6.o perf_event_p4.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_uncore.o
 endif
 
 obj-$(CONFIG_X86_MCE)			+= mcheck/

index 146bb62..9d92e19 100644
@@ -19,6 +19,39 @@
 
 #include "cpu.h"
 
+static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
+{
+	struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
+	u32 gprs[8] = { 0 };
+	int err;
+
+	WARN_ONCE((c->x86 != 0xf), "%s should only be used on K8!\n", __func__);
+
+	gprs[1] = msr;
+	gprs[7] = 0x9c5a203a;
+
+	err = rdmsr_safe_regs(gprs);
+
+	*p = gprs[0] | ((u64)gprs[2] << 32);
+
+	return err;
+}
+
+static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
+{
+	struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
+	u32 gprs[8] = { 0 };
+
+	WARN_ONCE((c->x86 != 0xf), "%s should only be used on K8!\n", __func__);
+
+	gprs[0] = (u32)val;
+	gprs[1] = msr;
+	gprs[2] = val >> 32;
+	gprs[7] = 0x9c5a203a;
+
+	return wrmsr_safe_regs(gprs);
+}
+
 #ifdef CONFIG_X86_32
 /*
  *	B step AMD K6 before B 9730xxxx have hardware bugs that can cause

@@ -586,9 +619,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 	    !cpu_has(c, X86_FEATURE_TOPOEXT)) {
 		u64 val;
 
-		if (!rdmsrl_amd_safe(0xc0011005, &val)) {
+		if (!rdmsrl_safe(0xc0011005, &val)) {
 			val |= 1ULL << 54;
-			wrmsrl_amd_safe(0xc0011005, val);
+			wrmsrl_safe(0xc0011005, val);
 			rdmsrl(0xc0011005, val);
 			if (val & (1ULL << 54)) {
 				set_cpu_cap(c, X86_FEATURE_TOPOEXT);

@@ -679,7 +712,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 		err = rdmsrl_safe(MSR_AMD64_MCx_MASK(4), &mask);
 		if (err == 0) {
 			mask |= (1 << 10);
-			checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
+			wrmsrl_safe(MSR_AMD64_MCx_MASK(4), mask);
 		}
 	}
 

index 6b9333b..5bbc082 100644
@@ -947,7 +947,7 @@ static void __cpuinit __print_cpu_msr(void)
 		index_max = msr_range_array[i].max;
 
 		for (index = index_min; index < index_max; index++) {
-			if (rdmsrl_amd_safe(index, &val))
+			if (rdmsrl_safe(index, &val))
 				continue;
 			printk(KERN_INFO " MSR%08x: %016llx\n", index, val);
 		}

index 7241e2f..a15df4b 100644
@@ -14,6 +14,18 @@
 
 #include <linux/perf_event.h>
 
+#if 0
+#undef wrmsrl
+#define wrmsrl(msr, val) 						\
+do {									\
+	unsigned int _msr = (msr);					\
+	u64 _val = (val);						\
+	trace_printk("wrmsrl(%x, %Lx)\n", (unsigned int)(_msr),		\
+			(unsigned long long)(_val));			\
+	native_write_msr((_msr), (u32)(_val), (u32)(_val >> 32));	\
+} while (0)
+#endif
+
 /*
  *          |   NHM/WSM    |      SNB     |
  * register -------------------------------

@@ -57,7 +69,7 @@ struct amd_nb {
 };
 
 /* The maximal number of PEBS events: */
-#define MAX_PEBS_EVENTS		4
+#define MAX_PEBS_EVENTS		8
 
 /*
  * A debug store configuration.

@@ -349,6 +361,8 @@ struct x86_pmu {
 	void		(*cpu_starting)(int cpu);
 	void		(*cpu_dying)(int cpu);
 	void		(*cpu_dead)(int cpu);
+
+	void		(*check_microcode)(void);
 	void		(*flush_branch_stack)(void);
 
 	/*

@@ -360,12 +374,16 @@ struct x86_pmu {
 	/*
 	 * Intel DebugStore bits
 	 */
-	int		bts, pebs;
-	int		bts_active, pebs_active;
+	int		bts		:1,
+			bts_active	:1,
+			pebs		:1,
+			pebs_active	:1,
+			pebs_broken	:1;
 	int		pebs_record_size;
 	void		(*drain_pebs)(struct pt_regs *regs);
 	struct event_constraint *pebs_constraints;
 	void		(*pebs_aliases)(struct perf_event *event);
+	int 		max_pebs_events;
 
 	/*
 	 * Intel LBR

@@ -468,6 +486,8 @@ static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
 
 void x86_pmu_enable_all(int added);
 
+int perf_assign_events(struct event_constraint **constraints, int n,
+			int wmin, int wmax, int *assign);
 int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign);
 
 void x86_pmu_stop(struct perf_event *event, int flags);

index 35e2192..629ae0b 100644
@@ -248,7 +248,7 @@ void reserve_ds_buffers(void)
  */
 
 struct event_constraint bts_constraint =
-	EVENT_CONSTRAINT(0, 1ULL << X86_PMC_IDX_FIXED_BTS, 0);
+	EVENT_CONSTRAINT(0, 1ULL << INTEL_PMC_IDX_FIXED_BTS, 0);
 
 void intel_pmu_enable_bts(u64 config)
 {

@@ -295,7 +295,7 @@ int intel_pmu_drain_bts_buffer(void)
 		u64	to;
 		u64	flags;
 	};
-	struct perf_event *event = cpuc->events[X86_PMC_IDX_FIXED_BTS];
+	struct perf_event *event = cpuc->events[INTEL_PMC_IDX_FIXED_BTS];
 	struct bts_record *at, *top;
 	struct perf_output_handle handle;
 	struct perf_event_header header;

@@ -620,7 +620,7 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
 	 * Should not happen, we program the threshold at 1 and do not
 	 * set a reset value.
 	 */
-	WARN_ON_ONCE(n > 1);
+	WARN_ONCE(n > 1, "bad leftover pebs %d\n", n);
 	at += n - 1;
 
 	__intel_pmu_pebs_event(event, iregs, at);

@@ -651,10 +651,10 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
 	 * Should not happen, we program the threshold at 1 and do not
 	 * set a reset value.
 	 */
-	WARN_ON_ONCE(n > MAX_PEBS_EVENTS);
+	WARN_ONCE(n > x86_pmu.max_pebs_events, "Unexpected number of pebs records %d\n", n);
 
 	for ( ; at < top; at++) {
-		for_each_set_bit(bit, (unsigned long *)&at->status, MAX_PEBS_EVENTS) {
+		for_each_set_bit(bit, (unsigned long *)&at->status, x86_pmu.max_pebs_events) {
 			event = cpuc->events[bit];
 			if (!test_bit(bit, cpuc->active_mask))
 				continue;

@@ -670,7 +670,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
 			break;
 		}
 
-		if (!event || bit >= MAX_PEBS_EVENTS)
+		if (!event || bit >= x86_pmu.max_pebs_events)
 			continue;
 
 		__intel_pmu_pebs_event(event, iregs, at);

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