MX: Set a common gpio.h for all i.MX
Subsystems (2)
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Each i.MX has its own gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared.
--- arch/arm/include/asm/arch-mx25/gpio.h | 12 +-------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +----- arch/arm/include/asm/arch-mx35/gpio.h | 12 +-------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +----- arch/arm/include/asm/arch-mx6/gpio.h | 7 +----- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 ++++++++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 1 + 8 files changed, 45 insertions(+), 42 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.h
arch/arm/include/asm/arch-mx25/gpio.h +1 -11
@@ -30,16 +30,6 @@*/ #define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx31/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx35/gpio.h +1 -11
@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx5/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx6/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */
arch/arm/include/asm/arch-mx6/imx-regs.h +0 -2
@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h>
arch/arm/include/asm/imx-common/gpio.h new file +39 -0
@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + + +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { +u32 gpio_dr;/* data */ +u32 gpio_dir;/* direction */ +u32 psr;/* pad satus */ +}; +#endif + +#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) + +#endif
include/configs/mx6qsabrelite.h +1 -0
@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS
Signature · 1 line
1.7.9.5
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Hi Stefano,
Quoted 3 lines
Each i.MX has its own
gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared.
Good!
Quoted 25 lines
Signed-off-by Stefano Babic <[email protected]>CC Matt Sealey <[email protected]>CC Marek Vasut <[email protected]>CC Benoit Thebaudeau <[email protected]>CC Jason Liu <[email protected]>--- arch/arm/include/asm/arch-mx25/gpio.h | 12 +-------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +----- arch/arm/include/asm/arch-mx35/gpio.h | 12 +-------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +----- arch/arm/include/asm/arch-mx6/gpio.h | 7 +----- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 ++++++++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 1 + 8 files changed, 45 insertions(+), 42 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.harch/arm/include/asm/arch-mx25/gpio.h +0
-0
arch/arm/include/asm/arch-mx25/gpio.h line 32
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arch/arm/include/asm/arch-mx25/gpio.h +0
-0@@ -30,16 +30,6 @@*/ #define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f))
Keeping this is also useless. GPIO_NUMBER() from the new <asm/imx-common/gpio.h> can be used instead everywhere needed.
Quoted 82 lines
arch/arm/include/asm/arch-mx25/gpio.h +1
-11-/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx31/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx35/gpio.h +1
-11@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx5/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx6/gpio.h +0
-0@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H
arch/arm/include/asm/arch-mx6/gpio.h line 30
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arch/arm/include/asm/arch-mx6/gpio.h +1
-6-/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */
Why do you keep all these old <asm/gpio.h>? The new <asm/imx-common/gpio.h> can be included instead everywhere needed.
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arch/arm/include/asm/arch-mx6/imx-regs.h +0
-2@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h> arch/arm/include/asm/imx-common/gpio.h new file +23
-0@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ +
arch/arm/include/asm/imx-common/gpio.h line 33
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arch/arm/include/asm/imx-common/gpio.h new file +10
-0+ +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { + u32 gpio_dr; /* data */ + u32 gpio_dir; /* direction */ + u32 psr; /* pad satus */
Why don't you rename this to gpio_psr to be more consistent?
This made me wonder how mxc_gpio.c could build successfully with this naming. It's because gpio_get_value() uses DR instead of PSR. This is an issue. Linux uses PSR, and U-Boot should do so since DR does not always reflect the pin state, while PSR does. This makes a big difference if you want to detect a short circuit on a GPIO pin configured as output, or if you want to read the level of a pin driven by a non-GPIO function. This is another patch to make.
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arch/arm/include/asm/imx-common/gpio.h new file +6
-0+}; +#endif + +#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) + +#endif include/configs/mx6qsabrelite.h +1
-1@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS --
Quoted 3 lines
1.7.9.5
The rest sounds good.
This is a bit off topic, but shouldn't the iomux-v3 stuff be moved to a common location for all these i.MXs too? As to the header file, it's already done, but the C file is under arch/arm/cpu/armv7/imx-common/ while it is absolutely not armv7-specific. Unlike Linux's, U-Boot's SoC files are organized per CPU instead of per platform, which makes the organization of such platform common code a bit complicated. This also encourages the duplication of platform code. Perhaps it could be moved to a new arch/arm/cpu/imx-common/ folder (this would require an addition to the main Makefile)?
Best regards,
Beno?t
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Quoted 6 lines · Beno?t Th?baudeau
Hi Stefano,
This is a bit off topic, but shouldn't the iomux-v3 stuff be moved to a common location for all these i.MXs too? As to the header file, it's already done, but the C file is under
arch/arm/cpu/armv7/imx-common/while it is absolutely not armv7-specific.
True, I'd advocate that.
Signature · 2 lines
Matt Sealey <[email protected]> Product Development Analyst, Genesi USA, Inc.
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Dear Matt Sealey,
Quoted 11 lines
On Sat, Aug 18, 2012 at 2:25 PM, Beno?t Th?baudeau
Quoted 6 lines · <[email protected]> wrote:
Hi Stefano,
This is a bit off topic, but shouldn't the iomux-v3 stuff be moved to a common location for all these i.MXs too? As to the header file, it's already done, but the C file is under
arch/arm/cpu/armv7/imx-common/while it is absolutely not armv7-specific.True, I'd advocate that.
Ceretainly, but it can be done in a subsequent patch
Best regards,
Marek Vasut
PATCH 1/1 MX: Set a common gpio.h for all i.MX
In reply to Benoît ThébaudeauAm 18/08/2012 21:25, schrieb Beno?t Th?baudeau:
Quoted 5 lines
Quoted 2 lines
#define
MXC_GPIO_PORT_TO_NUM(port, bit)(((port - 1) << 5) + (bit &0x1f))Keeping this is also useless.
GPIO_NUMBER()from the new <asm/imx-common/gpio.h> can be used instead everywhere needed.
That is right - I drop it.
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arch/arm/include/asm/arch-mx5/gpio.h +1
-6-/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h>
Quoted 4 lines
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#endif /*
__ASM_ARCH_MX6_GPIO_H*/Why do you keep all these old <
asm/gpio.h>? The new <asm/imx-common/gpio.h> can be included instead everywhere needed.
No. The GPIO is common for all SOCs in u-boot, not only i.MX. The common interface requires that a asm/gpio.h exists. See common/cmd_gpio.c.
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arch/arm/include/asm/imx-common/gpio.h line 33
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arch/arm/include/asm/imx-common/gpio.h new file +9
-0+#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { + u32 gpio_dr; /* data */ + u32 gpio_dir; /* direction */ + u32 psr; /* pad satus */Why don't you rename this to
gpio_psrto be more consistent?
I can do it, or drop it: psr is not used by the driver.
Quoted 2 lines
This made me wonder how
mxc_gpio.ccould build successfully with this naming.
psr is not used
Quoted 1 line
It's because
gpio_get_value()uses DR instead of PSR.
Exactly
Quoted 5 lines
This is an issue. Linux
uses PSR, and U-Boot should do so since DR does not always reflect the pin state, while PSR does. This makes a big difference if you want to detect a short circuit on a GPIO pin configured as output, or if you want to read the level of a pin driven by a non-GPIO function. This is another patch to make.
Right, this is a patch for the gpio driver itself.
Quoted 4 lines
The rest sounds good.
This is a bit off topic,
Never mind.
Quoted 6 lines
but shouldn't the iomux-v3 stuff be moved to a common
location for all these i.MXs too? As to the header file, it's already done, but the C file is underarch/arm/cpu/armv7/imx-common/while it is absolutely not armv7-specific. Unlike Linux's, U-Boot's SoC files are organized per CPU instead of per platform, which makes the organization of such platform common code a bit complicated.
Right. I miss in u-boot a plat-mxc for common code.
Quoted 3 lines
This also encourages the duplication of platform code. Perhaps it could be moved to a new
arch/arm/cpu/imx-common/folder (this would require an addition to the mainMakefile)?
Up now it was not yet done, because it is an exception in u-boot. But surely, a common place for code across cpu boundaries helps for i.MX.
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Hi Stefano,
Quoted 9 lines
Quoted 7 lines
Quoted 3 lines
#define
MXC_GPIO_PORT_TO_NUM(port, bit)(((port - 1) << 5) + (bit &
0x1f))Keeping this is also useless.
GPIO_NUMBER()from the new <asm/imx-common/gpio.h>
can be used instead everywhere needed.That is right - I drop it.
I don't know if you are aware of it, but just to let you know, I've seen the following patch that will interfere:
http://patchwork.ozlabs.org/patch/165311/
http://git.denx.de/?p=u-boot/u-boot-staging.git;a=commitdiff;h=72739219a12bf02820d29a89cb2b7fdc4d0e840f
You may want to merge it to your imx tree and rebase after it for your patch.
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arch/arm/include/asm/arch-mx5/gpio.h +1
-6-/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> Quoted 5 lines
Quoted 1 line
#endif /*
__ASM_ARCH_MX6_GPIO_H*/Why do you keep all these old <
asm/gpio.h>? The new <asm/imx-common/gpio.h> can
be included instead everywhere needed.
Quoted 3 lines
No. The GPIO is common for all SOCs in u-boot, not only i.MX. The common
interface requires that aasm/gpio.hexists. Seecommon/cmd_gpio.c.
Right.
Best regards,
Beno?t
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Quoted 10 lines · Beno?t Th?baudeau
Hi Stefano,
Quoted 8 lines
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Quoted 3 lines
#define
MXC_GPIO_PORT_TO_NUM(port, bit)(((port - 1) << 5) + (bit &
0x1f))Keeping this is also useless.
GPIO_NUMBER()from the new <asm/imx-common/gpio.h>
can be used instead everywhere needed.
Quoted 6 lines
Quoted 1 line
That is right - I drop it.
I don't know if you are aware of it, but just to let you know, I've seen the following patch that will interfere:
http://patchwork.ozlabs.org/patch/165311/
http://git.denx.de/?p=u-boot/u-boot-staging.git;a=commitdiff;h=72739219a12bf02820d29a89cb2b7fdc4d0e840f
Thanks, I cherry-pick it and I rebase on it.
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
Fabio Estevam
reviewerPATCH 1/1 MX: Set a common gpio.h for all i.MX
In reply to Stefano BabicHi Stefano,
Quoted 1 line · Stefano Babic
+#define
GPIO_NUMBER(port, index)((((port)-1)*32)+((index)&31))
What about calling this macro IMX_GPIO_NR instead?
This way we can have the same macro name in U-boot and in the kernel.
Thanks,
Fabio Estevam
PATCH 1/1 MX: Set a common gpio.h for all i.MX
Dear Fabio Estevam,
Quoted 9 lines
Hi Stefano,
Quoted 2 lines · Stefano Babic
+#define
GPIO_NUMBER(port, index)
((((port)-1)*32)+((index)&31))What about calling this macro
IMX_GPIO_NRinstead?This way we can have the same macro name in U-boot and in the kernel.
Agreed
Quoted 3 lines
Thanks,
Fabio Estevam
Best regards,
Marek Vasut
PATCH 1/1 MX: Set a common gpio.h for all i.MX
In reply to Fabio EstevamAm 19/08/2012 00:59, schrieb Fabio Estevam:
Quoted 9 lines
Hi Stefano,
Quoted 1 line · Stefano Babic
+#define
GPIO_NUMBER(port, index)((((port)-1)*32)+((index)&31))What about calling this macro
IMX_GPIO_NRinstead?This way we can have the same macro name in U-boot and in the kernel.
Right, agree, fix in V2.
Regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH v2 1/1 MX: Set a common gpio.h for all i.MX
In reply to Stefano Babic---
Changes in v2:
- call the macro IMX_GPIO_NR as in kernel (Fabio Estevam)
- change psr in gpio_psr (Benoit Thebaudeau)
- drop MXC_GPIO_PORT_TO_NUM and use common macro (Benoit Thebaudeau)
arch/arm/include/asm/arch-mx25/gpio.h | 5 ----- arch/arm/include/asm/imx-common/gpio.h | 4 ++-- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 28 ++++++++++++------------- board/karo/tx25/tx25.c | 10 ++++----- board/syteco/zmx25/zmx25.c | 26 +++++++++++------------ include/configs/mx6qsabrelite.h | 2 +- 6 files changed, 35 insertions(+), 40 deletions(-)
arch/arm/include/asm/arch-mx25/gpio.h +0 -5
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX25_GPIO_H#define __ASM_ARCH_MX25_GPIO_H -/* Converts a GPIO port number and the internal bit position -* to the GPIO number -*/ -#define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) -#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/imx-common/gpio.h +2 -2
@@ -30,10 +30,10 @@struct gpio_regs {u32 gpio_dr;/* data */ u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ +u32 gpio_psr;/* pad satus */ };#endif -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) +#define IMX_GPIO_NR (port, index) ((((port)-1)*32)+((index)&31))#endif
board/freescale/mx6qsabrelite/mx6qsabrelite.c +14 -14
@@ -85,12 +85,12 @@ struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp =GPIO_NUMBER (3 ,21 ) + .gp =IMX_GPIO_NR (3 ,21 ) }, .sda = { .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp =GPIO_NUMBER (3 ,28 ) + .gp =IMX_GPIO_NR (3 ,28 ) } };
@@ -99,12 +99,12 @@ struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp =GPIO_NUMBER (4 ,12 ) + .gp =IMX_GPIO_NR (4 ,12 ) }, .sda = { .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp =GPIO_NUMBER (4 ,13 ) + .gp =IMX_GPIO_NR (4 ,13 ) } };
@@ -113,12 +113,12 @@ struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp =GPIO_NUMBER (1 ,5 ) + .gp =IMX_GPIO_NR (1 ,5 ) }, .sda = { .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp =GPIO_NUMBER (7 ,11 ) + .gp =IMX_GPIO_NR (7 ,11 ) } };
@@ -227,9 +227,9 @@ int board_ehci_hcd_init(int port)imx_iomux_v3_setup_multiple_pads (usb_pads,ARRAY_SIZE (usb_pads));/* Reset USB hub */ -gpio_direction_output (GPIO_NUMBER (7 ,12 ),0 ); +gpio_direction_output (IMX_GPIO_NR (7 ,12 ),0 );mdelay (2 ); -gpio_set_value (GPIO_NUMBER (7 ,12 ),1 ); +gpio_set_value (IMX_GPIO_NR (7 ,12 ),1 );return 0 ; }
@@ -411,12 +411,12 @@ struct button_key { };static struct button_key const buttons[] = { - {"back" ,GPIO_NUMBER (2 ,2 ),'B' }, - {"home" ,GPIO_NUMBER (2 ,4 ),'H' }, - {"menu" ,GPIO_NUMBER (2 ,1 ),'M' }, - {"search" ,GPIO_NUMBER (2 ,3 ),'S' }, - {"volup" ,GPIO_NUMBER (7 ,13 ),'V' }, - {"voldown" ,GPIO_NUMBER (4 ,5 ),'v' }, + {"back" ,IMX_GPIO_NR (2 ,2 ),'B' }, + {"home" ,IMX_GPIO_NR (2 ,4 ),'H' }, + {"menu" ,IMX_GPIO_NR (2 ,1 ),'M' }, + {"search" ,IMX_GPIO_NR (2 ,3 ),'S' }, + {"volup" ,IMX_GPIO_NR (7 ,13 ),'V' }, + {"voldown" ,IMX_GPIO_NR (4 ,5 ),'v' }, };/*
board/karo/tx25/tx25.c +5 -5
@@ -34,8 +34,8 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_FEC_MXC -#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) -#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) +#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) +#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)void tx25_fec_init (void ) {struct iomuxc_mux_ctl *muxctl;
@@ -103,9 +103,9 @@ void tx25_fec_init(void)/* * set each to 1 and make each an output */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,10 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,11 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,12 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,10 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,11 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,12 ),1 );mdelay (22 );/* this value came from RedBoot */
board/syteco/zmx25/zmx25.c +13 -13
@@ -56,7 +56,7 @@ int board_init()/* Setup of core volatage selection pin to run at 1.4V */ writel (gpio_mux_mode5, &muxctl->pad_ext_armclk);/* VCORE GPIO3[15] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,15 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,15 ),1 );/* Setup of input daisy chains for SD card pins*/ writel (gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);
@@ -68,10 +68,10 @@ int board_init()/* Setup of digital output for USB power and OC */ writel (gpio_mux_mode5, &muxctl->pad_csi_d3);/* USB Power GPIO1[28] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,28 ),1 ); +gpio_direction_output (IMX_GPIO_NR (1 ,28 ),1 );writel (gpio_mux_mode5, &muxctl->pad_csi_d2);/* USB OC GPIO1[27] */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (1 ,18 )); +gpio_direction_input (IMX_GPIO_NR (1 ,18 ));/* Setup of digital output control pins */ writel (gpio_mux_mode5, &muxctl->pad_csi_d8);/* Ouput 1 Ctrl GPIO1[7] */
@@ -83,21 +83,21 @@ int board_init()writel (0 , &padctl->pad_csi_d5);/* Ouput 2 Stat pull up off */ /* Switch both output drivers off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,7 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,6 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,7 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,6 ),0 );/* Setup of key input pin GPIO2[29]*/ writel (gpio_mux_mode5 |MX25_PIN_MUX_SION , &muxctl->pad_kpp_row0);writel (0 , &padctl->pad_kpp_row0);/* Key pull up off */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +gpio_direction_input (IMX_GPIO_NR (2 ,29 ));/* Setup of status LED outputs */ writel (gpio_mux_mode5, &muxctl->pad_csi_d9);/* GPIO4[21] */ writel (gpio_mux_mode5, &muxctl->pad_csi_d4);/* GPIO1[29] */ /* Switch both LEDs off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); +gpio_direction_output (IMX_GPIO_NR (4 ,21 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,29 ),0 );/* Setup of CAN1 and CAN2 signals */ writel (gpio_mux_mode6, &muxctl->pad_gpio_a);/* CAN1 TX */
@@ -148,12 +148,12 @@ int board_late_init(void)writel (gpio_mux_mode2, &muxctl->pad_uart2_cts);/* assert PHY reset (low) */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,16 ),0 ); +gpio_direction_output (IMX_GPIO_NR (3 ,16 ),0 );udelay (5000 );/* deassert PHY reset */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (3 ,16 ),1 ); +gpio_set_value (IMX_GPIO_NR (3 ,16 ),1 );udelay (5000 );#endif
@@ -161,12 +161,12 @@ int board_late_init(void) e =getenv ("gs_base_board" );if (e !=NULL ) {if (strcmp (e,"G283" ) ==0 ) { -int key =gpio_get_value (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +int key =gpio_get_value (IMX_GPIO_NR (2 ,29 ));if (key) {/* Switch on both LEDs to inidcate boot mode */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); -gpio_set_value (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); +gpio_set_value (IMX_GPIO_NR (1 ,29 ),0 ); +gpio_set_value (IMX_GPIO_NR (4 ,21 ),0 );setenv ("preboot" ,"run gs_slow_boot" ); }else
include/configs/mx6qsabrelite.h +1 -1
@@ -54,7 +54,7 @@#define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))#define CONFIG_SF_DEFAULT_SPEED 25000000#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)#endif
Signature · 1 line
1.7.9.5
PATCH v3 1/1 MX: Set a common gpio.h for all i.MX
In reply to Stefano Babic---
Changes in v2:
- please ignore this version, it is broken
Changes in v3:
- call the macro IMX_GPIO_NR as in kernel (Fabio Estevam)
- change psr in gpio_psr (Benoit Thebaudeau)
- drop MXC_GPIO_PORT_TO_NUM and use common macro (Benoit Thebaudeau)
arch/arm/include/asm/arch-mx25/gpio.h | 17 +---------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +---- arch/arm/include/asm/arch-mx35/gpio.h | 12 +------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 +++++++++++++++++++++++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 28 +++++++++--------- board/karo/tx25/tx25.c | 10 +++---- board/syteco/zmx25/zmx25.c | 26 ++++++++--------- include/configs/mx6qsabrelite.h | 3 +- 11 files changed, 78 insertions(+), 80 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.h
arch/arm/include/asm/arch-mx25/gpio.h +1 -16
@@ -25,21 +25,6 @@#ifndef __ASM_ARCH_MX25_GPIO_H#define __ASM_ARCH_MX25_GPIO_H -/* Converts a GPIO port number and the internal bit position -* to the GPIO number -*/ -#define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) - -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx31/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx35/gpio.h +1 -11
@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx5/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx6/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */
arch/arm/include/asm/arch-mx6/imx-regs.h +0 -2
@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h>
arch/arm/include/asm/imx-common/gpio.h new file +39 -0
@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + + +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { +u32 gpio_dr;/* data */ +u32 gpio_dir;/* direction */ +u32 gpio_psr;/* pad satus */ +}; +#endif + +#define IMX_GPIO_NR (port, index) ((((port)-1)*32)+((index)&31)) + +#endif
board/freescale/mx6qsabrelite/mx6qsabrelite.c +14 -14
@@ -85,12 +85,12 @@ struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp =GPIO_NUMBER (3 ,21 ) + .gp =IMX_GPIO_NR (3 ,21 ) }, .sda = { .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp =GPIO_NUMBER (3 ,28 ) + .gp =IMX_GPIO_NR (3 ,28 ) } };
@@ -99,12 +99,12 @@ struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp =GPIO_NUMBER (4 ,12 ) + .gp =IMX_GPIO_NR (4 ,12 ) }, .sda = { .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp =GPIO_NUMBER (4 ,13 ) + .gp =IMX_GPIO_NR (4 ,13 ) } };
@@ -113,12 +113,12 @@ struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp =GPIO_NUMBER (1 ,5 ) + .gp =IMX_GPIO_NR (1 ,5 ) }, .sda = { .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp =GPIO_NUMBER (7 ,11 ) + .gp =IMX_GPIO_NR (7 ,11 ) } };
@@ -227,9 +227,9 @@ int board_ehci_hcd_init(int port)imx_iomux_v3_setup_multiple_pads (usb_pads,ARRAY_SIZE (usb_pads));/* Reset USB hub */ -gpio_direction_output (GPIO_NUMBER (7 ,12 ),0 ); +gpio_direction_output (IMX_GPIO_NR (7 ,12 ),0 );mdelay (2 ); -gpio_set_value (GPIO_NUMBER (7 ,12 ),1 ); +gpio_set_value (IMX_GPIO_NR (7 ,12 ),1 );return 0 ; }
@@ -411,12 +411,12 @@ struct button_key { };static struct button_key const buttons[] = { - {"back" ,GPIO_NUMBER (2 ,2 ),'B' }, - {"home" ,GPIO_NUMBER (2 ,4 ),'H' }, - {"menu" ,GPIO_NUMBER (2 ,1 ),'M' }, - {"search" ,GPIO_NUMBER (2 ,3 ),'S' }, - {"volup" ,GPIO_NUMBER (7 ,13 ),'V' }, - {"voldown" ,GPIO_NUMBER (4 ,5 ),'v' }, + {"back" ,IMX_GPIO_NR (2 ,2 ),'B' }, + {"home" ,IMX_GPIO_NR (2 ,4 ),'H' }, + {"menu" ,IMX_GPIO_NR (2 ,1 ),'M' }, + {"search" ,IMX_GPIO_NR (2 ,3 ),'S' }, + {"volup" ,IMX_GPIO_NR (7 ,13 ),'V' }, + {"voldown" ,IMX_GPIO_NR (4 ,5 ),'v' }, };/*
board/karo/tx25/tx25.c +5 -5
@@ -34,8 +34,8 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_FEC_MXC -#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) -#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) +#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) +#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)void tx25_fec_init (void ) {struct iomuxc_mux_ctl *muxctl;
@@ -103,9 +103,9 @@ void tx25_fec_init(void)/* * set each to 1 and make each an output */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,10 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,11 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,12 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,10 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,11 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,12 ),1 );mdelay (22 );/* this value came from RedBoot */
board/syteco/zmx25/zmx25.c +13 -13
@@ -56,7 +56,7 @@ int board_init()/* Setup of core volatage selection pin to run at 1.4V */ writel (gpio_mux_mode5, &muxctl->pad_ext_armclk);/* VCORE GPIO3[15] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,15 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,15 ),1 );/* Setup of input daisy chains for SD card pins*/ writel (gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);
@@ -68,10 +68,10 @@ int board_init()/* Setup of digital output for USB power and OC */ writel (gpio_mux_mode5, &muxctl->pad_csi_d3);/* USB Power GPIO1[28] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,28 ),1 ); +gpio_direction_output (IMX_GPIO_NR (1 ,28 ),1 );writel (gpio_mux_mode5, &muxctl->pad_csi_d2);/* USB OC GPIO1[27] */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (1 ,18 )); +gpio_direction_input (IMX_GPIO_NR (1 ,18 ));/* Setup of digital output control pins */ writel (gpio_mux_mode5, &muxctl->pad_csi_d8);/* Ouput 1 Ctrl GPIO1[7] */
@@ -83,21 +83,21 @@ int board_init()writel (0 , &padctl->pad_csi_d5);/* Ouput 2 Stat pull up off */ /* Switch both output drivers off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,7 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,6 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,7 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,6 ),0 );/* Setup of key input pin GPIO2[29]*/ writel (gpio_mux_mode5 |MX25_PIN_MUX_SION , &muxctl->pad_kpp_row0);writel (0 , &padctl->pad_kpp_row0);/* Key pull up off */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +gpio_direction_input (IMX_GPIO_NR (2 ,29 ));/* Setup of status LED outputs */ writel (gpio_mux_mode5, &muxctl->pad_csi_d9);/* GPIO4[21] */ writel (gpio_mux_mode5, &muxctl->pad_csi_d4);/* GPIO1[29] */ /* Switch both LEDs off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); +gpio_direction_output (IMX_GPIO_NR (4 ,21 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,29 ),0 );/* Setup of CAN1 and CAN2 signals */ writel (gpio_mux_mode6, &muxctl->pad_gpio_a);/* CAN1 TX */
@@ -148,12 +148,12 @@ int board_late_init(void)writel (gpio_mux_mode2, &muxctl->pad_uart2_cts);/* assert PHY reset (low) */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,16 ),0 ); +gpio_direction_output (IMX_GPIO_NR (3 ,16 ),0 );udelay (5000 );/* deassert PHY reset */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (3 ,16 ),1 ); +gpio_set_value (IMX_GPIO_NR (3 ,16 ),1 );udelay (5000 );#endif
@@ -161,12 +161,12 @@ int board_late_init(void) e =getenv ("gs_base_board" );if (e !=NULL ) {if (strcmp (e,"G283" ) ==0 ) { -int key =gpio_get_value (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +int key =gpio_get_value (IMX_GPIO_NR (2 ,29 ));if (key) {/* Switch on both LEDs to inidcate boot mode */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); -gpio_set_value (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); +gpio_set_value (IMX_GPIO_NR (1 ,29 ),0 ); +gpio_set_value (IMX_GPIO_NR (4 ,21 ),0 );setenv ("preboot" ,"run gs_slow_boot" ); }else
include/configs/mx6qsabrelite.h +2 -1
@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS
@@ -53,7 +54,7 @@#define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))#define CONFIG_SF_DEFAULT_SPEED 25000000#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)#endif
Signature · 1 line
1.7.9.5
PATCH v3 1/1 MX: Set a common gpio.h for all i.MX
Hi Stefano,
Your detailed description from v1 is gone.
Quoted 1 line
Signed-off-by Stefano Babic <[email protected]>
Your Cc's from v1 are gone.
Quoted 411 lines
---
Changes in v2:
- please ignore this version, it is brokenChanges in v3:
- call the macroIMX_GPIO_NRas in kernel (Fabio Estevam)
- change psr ingpio_psr(Benoit Thebaudeau)
- dropMXC_GPIO_PORT_TO_NUMand use common macro (Benoit Thebaudeau)arch/arm/include/asm/arch-mx25/gpio.h | 17 +---------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +---- arch/arm/include/asm/arch-mx35/gpio.h | 12 +------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 +++++++++++++++++++++++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 28 +++++++++--------- board/karo/tx25/tx25.c | 10 +++---- board/syteco/zmx25/zmx25.c | 26 ++++++++--------- include/configs/mx6qsabrelite.h | 3 +- 11 files changed, 78 insertions(+), 80 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.harch/arm/include/asm/arch-mx25/gpio.h +1
-16@@ -25,21 +25,6 @@#ifndef __ASM_ARCH_MX25_GPIO_H#define __ASM_ARCH_MX25_GPIO_H -/* Converts a GPIO port number and the internal bit position -* to the GPIO number -*/ -#define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) - -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx31/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx35/gpio.h +1
-11@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx5/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx6/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */ arch/arm/include/asm/arch-mx6/imx-regs.h +0
-2@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h> arch/arm/include/asm/imx-common/gpio.h new file +39
-0@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + + +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { +u32 gpio_dr;/* data */ +u32 gpio_dir;/* direction */ +u32 gpio_psr;/* pad satus */ +}; +#endif + +#define IMX_GPIO_NR (port, index) ((((port)-1)*32)+((index)&31)) + +#endif board/freescale/mx6qsabrelite/mx6qsabrelite.c +14
-14@@ -85,12 +85,12 @@ struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp =GPIO_NUMBER (3 ,21 ) + .gp =IMX_GPIO_NR (3 ,21 ) }, .sda = { .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp =GPIO_NUMBER (3 ,28 ) + .gp =IMX_GPIO_NR (3 ,28 ) } };@@ -99,12 +99,12 @@ struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp =GPIO_NUMBER (4 ,12 ) + .gp =IMX_GPIO_NR (4 ,12 ) }, .sda = { .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp =GPIO_NUMBER (4 ,13 ) + .gp =IMX_GPIO_NR (4 ,13 ) } };@@ -113,12 +113,12 @@ struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp =GPIO_NUMBER (1 ,5 ) + .gp =IMX_GPIO_NR (1 ,5 ) }, .sda = { .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp =GPIO_NUMBER (7 ,11 ) + .gp =IMX_GPIO_NR (7 ,11 ) } };@@ -227,9 +227,9 @@ int board_ehci_hcd_init(int port)imx_iomux_v3_setup_multiple_pads (usb_pads,ARRAY_SIZE (usb_pads));/* Reset USB hub */ -gpio_direction_output (GPIO_NUMBER (7 ,12 ),0 ); +gpio_direction_output (IMX_GPIO_NR (7 ,12 ),0 );mdelay (2 ); -gpio_set_value (GPIO_NUMBER (7 ,12 ),1 ); +gpio_set_value (IMX_GPIO_NR (7 ,12 ),1 );return 0 ; }@@ -411,12 +411,12 @@ struct button_key { };static struct button_key const buttons[] = { - {"back" ,GPIO_NUMBER (2 ,2 ),'B' }, - {"home" ,GPIO_NUMBER (2 ,4 ),'H' }, - {"menu" ,GPIO_NUMBER (2 ,1 ),'M' }, - {"search" ,GPIO_NUMBER (2 ,3 ),'S' }, - {"volup" ,GPIO_NUMBER (7 ,13 ),'V' }, - {"voldown" ,GPIO_NUMBER (4 ,5 ),'v' }, + {"back" ,IMX_GPIO_NR (2 ,2 ),'B' }, + {"home" ,IMX_GPIO_NR (2 ,4 ),'H' }, + {"menu" ,IMX_GPIO_NR (2 ,1 ),'M' }, + {"search" ,IMX_GPIO_NR (2 ,3 ),'S' }, + {"volup" ,IMX_GPIO_NR (7 ,13 ),'V' }, + {"voldown" ,IMX_GPIO_NR (4 ,5 ),'v' }, };/* board/karo/tx25/tx25.c +5
-5@@ -34,8 +34,8 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_FEC_MXC -#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) -#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) +#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) +#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)void tx25_fec_init (void ) {struct iomuxc_mux_ctl *muxctl;@@ -103,9 +103,9 @@ void tx25_fec_init(void)/* * set each to 1 and make each an output */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,10 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,11 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,12 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,10 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,11 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,12 ),1 );mdelay (22 );/* this value came from RedBoot */ board/syteco/zmx25/zmx25.c +1
-1@@ -56,7 +56,7 @@ int board_init()/* Setup of core volatage selection pin to run at 1.4V */ writel (gpio_mux_mode5, &muxctl->pad_ext_armclk);/* VCORE GPIO3[15] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,15 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,15 ),1 );/* Setup of input daisy chains for SD card pins*/ board/syteco/zmx25/zmx25.c +2
-2writel (gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);@@ -68,10 +68,10 @@ int board_init()/* Setup of digital output for USB power and OC */ writel (gpio_mux_mode5, &muxctl->pad_csi_d3);/* USB Power GPIO1[28] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,28 ),1 ); +gpio_direction_output (IMX_GPIO_NR (1 ,28 ),1 );writel (gpio_mux_mode5, &muxctl->pad_csi_d2);/* USB OC GPIO1[27] */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (1 ,18 )); +gpio_direction_input (IMX_GPIO_NR (1 ,18 ));/* Setup of digital output control pins */ board/syteco/zmx25/zmx25.c +10
-10writel (gpio_mux_mode5, &muxctl->pad_csi_d8);/* Ouput 1 Ctrl GPIO1[7] */ @@ -83,21 +83,21 @@ int board_init()writel (0 , &padctl->pad_csi_d5);/* Ouput 2 Stat pull up off */ /* Switch both output drivers off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,7 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,6 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,7 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,6 ),0 );/* Setup of key input pin GPIO2[29]*/ writel (gpio_mux_mode5 |MX25_PIN_MUX_SION , &muxctl->pad_kpp_row0);writel (0 , &padctl->pad_kpp_row0);/* Key pull up off */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +gpio_direction_input (IMX_GPIO_NR (2 ,29 ));/* Setup of status LED outputs */ writel (gpio_mux_mode5, &muxctl->pad_csi_d9);/* GPIO4[21] */ writel (gpio_mux_mode5, &muxctl->pad_csi_d4);/* GPIO1[29] */ /* Switch both LEDs off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); +gpio_direction_output (IMX_GPIO_NR (4 ,21 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,29 ),0 );/* Setup of CAN1 and CAN2 signals */ writel (gpio_mux_mode6, &muxctl->pad_gpio_a);/* CAN1 TX */ @@ -148,12 +148,12 @@ int board_late_init(void)writel (gpio_mux_mode2, &muxctl->pad_uart2_cts);/* assert PHY reset (low) */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,16 ),0 ); +gpio_direction_output (IMX_GPIO_NR (3 ,16 ),0 );udelay (5000 );/* deassert PHY reset */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (3 ,16 ),1 ); +gpio_set_value (IMX_GPIO_NR (3 ,16 ),1 );udelay (5000 );#endif @@ -161,12 +161,12 @@ int board_late_init(void) e =getenv ("gs_base_board" );if (e !=NULL ) {if (strcmp (e,"G283" ) ==0 ) { -int key =gpio_get_value (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +int key =gpio_get_value (IMX_GPIO_NR (2 ,29 ));if (key) {/* Switch on both LEDs to inidcate boot mode */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); -gpio_set_value (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); +gpio_set_value (IMX_GPIO_NR (1 ,29 ),0 ); +gpio_set_value (IMX_GPIO_NR (4 ,21 ),0 );setenv ("preboot" ,"run gs_slow_boot" ); }else include/configs/mx6qsabrelite.h +2
-2@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -53,7 +54,7 @@#define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))#define CONFIG_SF_DEFAULT_SPEED 25000000#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)#endif --
Quoted 3 lines
1.7.9.5
Apart from the patch header, I'm fine with this version.
Best regards,
Beno?t
PATCH v3 1/1 MX: Set a common gpio.h for all i.MX
Am 19/08/2012 15:30, schrieb Beno?t Th?baudeau:
Quoted 4 lines
Hi Stefano,
Your detailed description from v1 is gone.
I will add it again
Quoted 3 lines
Quoted 1 line
Signed-off-by Stefano Babic <[email protected]>Your Cc's from v1 are gone.
This is ok - I used patman this time, and CC are automatically handled by the tool and discharged from the patch header.
Regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH v4 1/1 MX: Set a common gpio.h for all i.MX
In reply to Stefano BabicEach i.MX has its own gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared.
---
Changes in v2:
- please ignore this version, it is broken
Changes in v3:
- call the macro IMX_GPIO_NR as in kernel (Fabio Estevam)
- change psr in gpio_psr (Benoit Thebaudeau)
- drop MXC_GPIO_PORT_TO_NUM and use common macro (Benoit Thebaudeau)
Changes in v4:
- Add missing comment in commit message
arch/arm/include/asm/arch-mx25/gpio.h | 17 +---------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +---- arch/arm/include/asm/arch-mx35/gpio.h | 12 +------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 +++++++++++++++++++++++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 28 +++++++++--------- board/karo/tx25/tx25.c | 10 +++---- board/syteco/zmx25/zmx25.c | 26 ++++++++--------- include/configs/mx6qsabrelite.h | 3 +- 11 files changed, 78 insertions(+), 80 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.h
arch/arm/include/asm/arch-mx25/gpio.h +1 -16
@@ -25,21 +25,6 @@#ifndef __ASM_ARCH_MX25_GPIO_H#define __ASM_ARCH_MX25_GPIO_H -/* Converts a GPIO port number and the internal bit position -* to the GPIO number -*/ -#define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) - -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx31/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx35/gpio.h +1 -11
@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx5/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx6/gpio.h +1 -6
@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */
arch/arm/include/asm/arch-mx6/imx-regs.h +0 -2
@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h>
arch/arm/include/asm/imx-common/gpio.h new file +39 -0
@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + + +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { +u32 gpio_dr;/* data */ +u32 gpio_dir;/* direction */ +u32 gpio_psr;/* pad satus */ +}; +#endif + +#define IMX_GPIO_NR (port, index) ((((port)-1)*32)+((index)&31)) + +#endif
board/freescale/mx6qsabrelite/mx6qsabrelite.c +14 -14
@@ -85,12 +85,12 @@ struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp =GPIO_NUMBER (3 ,21 ) + .gp =IMX_GPIO_NR (3 ,21 ) }, .sda = { .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp =GPIO_NUMBER (3 ,28 ) + .gp =IMX_GPIO_NR (3 ,28 ) } };
@@ -99,12 +99,12 @@ struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp =GPIO_NUMBER (4 ,12 ) + .gp =IMX_GPIO_NR (4 ,12 ) }, .sda = { .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp =GPIO_NUMBER (4 ,13 ) + .gp =IMX_GPIO_NR (4 ,13 ) } };
@@ -113,12 +113,12 @@ struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp =GPIO_NUMBER (1 ,5 ) + .gp =IMX_GPIO_NR (1 ,5 ) }, .sda = { .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp =GPIO_NUMBER (7 ,11 ) + .gp =IMX_GPIO_NR (7 ,11 ) } };
@@ -227,9 +227,9 @@ int board_ehci_hcd_init(int port)imx_iomux_v3_setup_multiple_pads (usb_pads,ARRAY_SIZE (usb_pads));/* Reset USB hub */ -gpio_direction_output (GPIO_NUMBER (7 ,12 ),0 ); +gpio_direction_output (IMX_GPIO_NR (7 ,12 ),0 );mdelay (2 ); -gpio_set_value (GPIO_NUMBER (7 ,12 ),1 ); +gpio_set_value (IMX_GPIO_NR (7 ,12 ),1 );return 0 ; }
@@ -411,12 +411,12 @@ struct button_key { };static struct button_key const buttons[] = { - {"back" ,GPIO_NUMBER (2 ,2 ),'B' }, - {"home" ,GPIO_NUMBER (2 ,4 ),'H' }, - {"menu" ,GPIO_NUMBER (2 ,1 ),'M' }, - {"search" ,GPIO_NUMBER (2 ,3 ),'S' }, - {"volup" ,GPIO_NUMBER (7 ,13 ),'V' }, - {"voldown" ,GPIO_NUMBER (4 ,5 ),'v' }, + {"back" ,IMX_GPIO_NR (2 ,2 ),'B' }, + {"home" ,IMX_GPIO_NR (2 ,4 ),'H' }, + {"menu" ,IMX_GPIO_NR (2 ,1 ),'M' }, + {"search" ,IMX_GPIO_NR (2 ,3 ),'S' }, + {"volup" ,IMX_GPIO_NR (7 ,13 ),'V' }, + {"voldown" ,IMX_GPIO_NR (4 ,5 ),'v' }, };/*
board/karo/tx25/tx25.c +5 -5
@@ -34,8 +34,8 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_FEC_MXC -#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) -#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) +#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) +#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)void tx25_fec_init (void ) {struct iomuxc_mux_ctl *muxctl;
@@ -103,9 +103,9 @@ void tx25_fec_init(void)/* * set each to 1 and make each an output */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,10 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,11 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,12 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,10 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,11 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,12 ),1 );mdelay (22 );/* this value came from RedBoot */
board/syteco/zmx25/zmx25.c +13 -13
@@ -56,7 +56,7 @@ int board_init()/* Setup of core volatage selection pin to run at 1.4V */ writel (gpio_mux_mode5, &muxctl->pad_ext_armclk);/* VCORE GPIO3[15] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,15 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,15 ),1 );/* Setup of input daisy chains for SD card pins*/ writel (gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);
@@ -68,10 +68,10 @@ int board_init()/* Setup of digital output for USB power and OC */ writel (gpio_mux_mode5, &muxctl->pad_csi_d3);/* USB Power GPIO1[28] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,28 ),1 ); +gpio_direction_output (IMX_GPIO_NR (1 ,28 ),1 );writel (gpio_mux_mode5, &muxctl->pad_csi_d2);/* USB OC GPIO1[27] */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (1 ,18 )); +gpio_direction_input (IMX_GPIO_NR (1 ,18 ));/* Setup of digital output control pins */ writel (gpio_mux_mode5, &muxctl->pad_csi_d8);/* Ouput 1 Ctrl GPIO1[7] */
@@ -83,21 +83,21 @@ int board_init()writel (0 , &padctl->pad_csi_d5);/* Ouput 2 Stat pull up off */ /* Switch both output drivers off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,7 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,6 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,7 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,6 ),0 );/* Setup of key input pin GPIO2[29]*/ writel (gpio_mux_mode5 |MX25_PIN_MUX_SION , &muxctl->pad_kpp_row0);writel (0 , &padctl->pad_kpp_row0);/* Key pull up off */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +gpio_direction_input (IMX_GPIO_NR (2 ,29 ));/* Setup of status LED outputs */ writel (gpio_mux_mode5, &muxctl->pad_csi_d9);/* GPIO4[21] */ writel (gpio_mux_mode5, &muxctl->pad_csi_d4);/* GPIO1[29] */ /* Switch both LEDs off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); +gpio_direction_output (IMX_GPIO_NR (4 ,21 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,29 ),0 );/* Setup of CAN1 and CAN2 signals */ writel (gpio_mux_mode6, &muxctl->pad_gpio_a);/* CAN1 TX */
@@ -148,12 +148,12 @@ int board_late_init(void)writel (gpio_mux_mode2, &muxctl->pad_uart2_cts);/* assert PHY reset (low) */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,16 ),0 ); +gpio_direction_output (IMX_GPIO_NR (3 ,16 ),0 );udelay (5000 );/* deassert PHY reset */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (3 ,16 ),1 ); +gpio_set_value (IMX_GPIO_NR (3 ,16 ),1 );udelay (5000 );#endif
@@ -161,12 +161,12 @@ int board_late_init(void) e =getenv ("gs_base_board" );if (e !=NULL ) {if (strcmp (e,"G283" ) ==0 ) { -int key =gpio_get_value (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +int key =gpio_get_value (IMX_GPIO_NR (2 ,29 ));if (key) {/* Switch on both LEDs to inidcate boot mode */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); -gpio_set_value (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); +gpio_set_value (IMX_GPIO_NR (1 ,29 ),0 ); +gpio_set_value (IMX_GPIO_NR (4 ,21 ),0 );setenv ("preboot" ,"run gs_slow_boot" ); }else
include/configs/mx6qsabrelite.h +2 -1
@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS
@@ -53,7 +54,7 @@#define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))#define CONFIG_SF_DEFAULT_SPEED 25000000#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)#endif
Signature · 1 line
1.7.9.5
PATCH v4 1/1 MX: Set a common gpio.h for all i.MX
Hi Stefano,
Quoted 419 lines
Each i.MX has its own
gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared.Signed-off-by Stefano Babic <[email protected]>---
Changes in v2:
- please ignore this version, it is brokenChanges in v3:
- call the macroIMX_GPIO_NRas in kernel (Fabio Estevam)
- change psr ingpio_psr(Benoit Thebaudeau)
- dropMXC_GPIO_PORT_TO_NUMand use common macro (Benoit Thebaudeau)Changes in v4:
- Add missing comment in commit messagearch/arm/include/asm/arch-mx25/gpio.h | 17 +---------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +---- arch/arm/include/asm/arch-mx35/gpio.h | 12 +------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 +++++++++++++++++++++++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 28 +++++++++--------- board/karo/tx25/tx25.c | 10 +++---- board/syteco/zmx25/zmx25.c | 26 ++++++++--------- include/configs/mx6qsabrelite.h | 3 +- 11 files changed, 78 insertions(+), 80 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.harch/arm/include/asm/arch-mx25/gpio.h +1
-16@@ -25,21 +25,6 @@#ifndef __ASM_ARCH_MX25_GPIO_H#define __ASM_ARCH_MX25_GPIO_H -/* Converts a GPIO port number and the internal bit position -* to the GPIO number -*/ -#define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) - -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif
arch/arm/include/asm/arch-mx31/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx35/gpio.h +1
-11@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx5/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx6/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */ arch/arm/include/asm/arch-mx6/imx-regs.h +0
-2@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h> arch/arm/include/asm/imx-common/gpio.h new file +39
-0@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + + +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { +u32 gpio_dr;/* data */ +u32 gpio_dir;/* direction */ +u32 gpio_psr;/* pad satus */ +}; +#endif + +#define IMX_GPIO_NR (port, index) ((((port)-1)*32)+((index)&31)) + +#endif board/freescale/mx6qsabrelite/mx6qsabrelite.c +14
-14@@ -85,12 +85,12 @@ struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp =GPIO_NUMBER (3 ,21 ) + .gp =IMX_GPIO_NR (3 ,21 ) }, .sda = { .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp =GPIO_NUMBER (3 ,28 ) + .gp =IMX_GPIO_NR (3 ,28 ) } };@@ -99,12 +99,12 @@ struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp =GPIO_NUMBER (4 ,12 ) + .gp =IMX_GPIO_NR (4 ,12 ) }, .sda = { .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp =GPIO_NUMBER (4 ,13 ) + .gp =IMX_GPIO_NR (4 ,13 ) } };@@ -113,12 +113,12 @@ struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp =GPIO_NUMBER (1 ,5 ) + .gp =IMX_GPIO_NR (1 ,5 ) }, .sda = { .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp =GPIO_NUMBER (7 ,11 ) + .gp =IMX_GPIO_NR (7 ,11 ) } };@@ -227,9 +227,9 @@ int board_ehci_hcd_init(int port)imx_iomux_v3_setup_multiple_pads (usb_pads,ARRAY_SIZE (usb_pads));/* Reset USB hub */ -gpio_direction_output (GPIO_NUMBER (7 ,12 ),0 ); +gpio_direction_output (IMX_GPIO_NR (7 ,12 ),0 );mdelay (2 ); -gpio_set_value (GPIO_NUMBER (7 ,12 ),1 ); +gpio_set_value (IMX_GPIO_NR (7 ,12 ),1 );return 0 ; }@@ -411,12 +411,12 @@ struct button_key { };static struct button_key const buttons[] = { - {"back" ,GPIO_NUMBER (2 ,2 ),'B' }, - {"home" ,GPIO_NUMBER (2 ,4 ),'H' }, - {"menu" ,GPIO_NUMBER (2 ,1 ),'M' }, - {"search" ,GPIO_NUMBER (2 ,3 ),'S' }, - {"volup" ,GPIO_NUMBER (7 ,13 ),'V' }, - {"voldown" ,GPIO_NUMBER (4 ,5 ),'v' }, + {"back" ,IMX_GPIO_NR (2 ,2 ),'B' }, + {"home" ,IMX_GPIO_NR (2 ,4 ),'H' }, + {"menu" ,IMX_GPIO_NR (2 ,1 ),'M' }, + {"search" ,IMX_GPIO_NR (2 ,3 ),'S' }, + {"volup" ,IMX_GPIO_NR (7 ,13 ),'V' }, + {"voldown" ,IMX_GPIO_NR (4 ,5 ),'v' }, };/* board/karo/tx25/tx25.c +5
-5@@ -34,8 +34,8 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_FEC_MXC -#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) -#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) +#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) +#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)void tx25_fec_init (void ) {struct iomuxc_mux_ctl *muxctl;@@ -103,9 +103,9 @@ void tx25_fec_init(void)/* * set each to 1 and make each an output */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,10 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,11 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,12 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,10 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,11 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,12 ),1 );mdelay (22 );/* this value came from RedBoot */ board/syteco/zmx25/zmx25.c +1
-1@@ -56,7 +56,7 @@ int board_init()/* Setup of core volatage selection pin to run at 1.4V */ writel (gpio_mux_mode5, &muxctl->pad_ext_armclk);/* VCORE GPIO3[15] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,15 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,15 ),1 );/* Setup of input daisy chains for SD card pins*/ board/syteco/zmx25/zmx25.c +2
-2writel (gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);@@ -68,10 +68,10 @@ int board_init()/* Setup of digital output for USB power and OC */ writel (gpio_mux_mode5, &muxctl->pad_csi_d3);/* USB Power GPIO1[28] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,28 ),1 ); +gpio_direction_output (IMX_GPIO_NR (1 ,28 ),1 );writel (gpio_mux_mode5, &muxctl->pad_csi_d2);/* USB OC GPIO1[27] */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (1 ,18 )); +gpio_direction_input (IMX_GPIO_NR (1 ,18 ));/* Setup of digital output control pins */ board/syteco/zmx25/zmx25.c +10
-10writel (gpio_mux_mode5, &muxctl->pad_csi_d8);/* Ouput 1 Ctrl GPIO1[7] */ @@ -83,21 +83,21 @@ int board_init()writel (0 , &padctl->pad_csi_d5);/* Ouput 2 Stat pull up off */ /* Switch both output drivers off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,7 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,6 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,7 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,6 ),0 );/* Setup of key input pin GPIO2[29]*/ writel (gpio_mux_mode5 |MX25_PIN_MUX_SION , &muxctl->pad_kpp_row0);writel (0 , &padctl->pad_kpp_row0);/* Key pull up off */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +gpio_direction_input (IMX_GPIO_NR (2 ,29 ));/* Setup of status LED outputs */ writel (gpio_mux_mode5, &muxctl->pad_csi_d9);/* GPIO4[21] */ writel (gpio_mux_mode5, &muxctl->pad_csi_d4);/* GPIO1[29] */ /* Switch both LEDs off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); +gpio_direction_output (IMX_GPIO_NR (4 ,21 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,29 ),0 );/* Setup of CAN1 and CAN2 signals */ writel (gpio_mux_mode6, &muxctl->pad_gpio_a);/* CAN1 TX */ @@ -148,12 +148,12 @@ int board_late_init(void)writel (gpio_mux_mode2, &muxctl->pad_uart2_cts);/* assert PHY reset (low) */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,16 ),0 ); +gpio_direction_output (IMX_GPIO_NR (3 ,16 ),0 );udelay (5000 );/* deassert PHY reset */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (3 ,16 ),1 ); +gpio_set_value (IMX_GPIO_NR (3 ,16 ),1 );udelay (5000 );#endif @@ -161,12 +161,12 @@ int board_late_init(void) e =getenv ("gs_base_board" );if (e !=NULL ) {if (strcmp (e,"G283" ) ==0 ) { -int key =gpio_get_value (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +int key =gpio_get_value (IMX_GPIO_NR (2 ,29 ));if (key) {/* Switch on both LEDs to inidcate boot mode */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); -gpio_set_value (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); +gpio_set_value (IMX_GPIO_NR (1 ,29 ),0 ); +gpio_set_value (IMX_GPIO_NR (4 ,21 ),0 );setenv ("preboot" ,"run gs_slow_boot" ); }else include/configs/mx6qsabrelite.h +2
-2@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -53,7 +54,7 @@#define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))#define CONFIG_SF_DEFAULT_SPEED 25000000#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)#endif --
Quoted 3 lines
1.7.9.5
This is perfect this time. You can ACK yourself. ;)
Best regards,
Beno?t
PATCH v4 1/1 MX: Set a common gpio.h for all i.MX
In reply to Stefano BabicWorks fine on the Efika MX :)
Signature · 2 lines
Matt Sealey <[email protected]> Product Development Analyst, Genesi USA, Inc.
Quoted 405 lines · Stefano Babic
Each i.MX has its own
gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared.Signed-off-by Stefano Babic <[email protected]>---
Changes in v2:
- please ignore this version, it is brokenChanges in v3:
- call the macroIMX_GPIO_NRas in kernel (Fabio Estevam)
- change psr ingpio_psr(Benoit Thebaudeau)
- dropMXC_GPIO_PORT_TO_NUMand use common macro (Benoit Thebaudeau)Changes in v4:
- Add missing comment in commit messagearch/arm/include/asm/arch-mx25/gpio.h | 17 +---------- arch/arm/include/asm/arch-mx31/gpio.h | 7 +---- arch/arm/include/asm/arch-mx35/gpio.h | 12 +------- arch/arm/include/asm/arch-mx5/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/gpio.h | 7 +---- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- arch/arm/include/asm/imx-common/gpio.h | 39 +++++++++++++++++++++++++ board/freescale/mx6qsabrelite/mx6qsabrelite.c | 28 +++++++++--------- board/karo/tx25/tx25.c | 10 +++---- board/syteco/zmx25/zmx25.c | 26 ++++++++--------- include/configs/mx6qsabrelite.h | 3 +- 11 files changed, 78 insertions(+), 80 deletions(-) create mode 100644 arch/arm/include/asm/imx-common/gpio.harch/arm/include/asm/arch-mx25/gpio.h +1
-16@@ -25,21 +25,6 @@#ifndef __ASM_ARCH_MX25_GPIO_H#define __ASM_ARCH_MX25_GPIO_H -/* Converts a GPIO port number and the internal bit position -* to the GPIO number -*/ -#define MXC_GPIO_PORT_TO_NUM (port, bit) (((port - 1) << 5) + (bit & 0x1f)) - -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx31/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX31_GPIO_H#define __ASM_ARCH_MX31_GPIO_H -/* GPIO Registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx35/gpio.h +1
-11@@ -25,16 +25,6 @@#ifndef __ASM_ARCH_MX35_GPIO_H#define __ASM_ARCH_MX35_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr;/* data */ -u32 gpio_dir;/* direction */ -u32 psr;/* pad satus */ -u32 icr1;/* interrupt config 1 */ -u32 icr2;/* interrupt config 2 */ -u32 imr;/* interrupt mask */ -u32 isr;/* interrupt status */ -u32 edge_sel;/* edge select */ -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx5/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX5_GPIO_H#define __ASM_ARCH_MX5_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif arch/arm/include/asm/arch-mx6/gpio.h +1
-6@@ -25,11 +25,6 @@#ifndef __ASM_ARCH_MX6_GPIO_H#define __ASM_ARCH_MX6_GPIO_H -/* GPIO registers */ -struct gpio_regs { -u32 gpio_dr; -u32 gpio_dir; -u32 gpio_psr; -}; +#include <asm/imx-common/gpio.h> #endif /* __ASM_ARCH_MX6_GPIO_H */ arch/arm/include/asm/arch-mx6/imx-regs.h +0
-2@@ -172,8 +172,6 @@#define IMX_IIM_BASE OCOTP_BASE_ADDR#define FEC_QUIRK_ENET_MAC -#define GPIO_NUMBER (port, index) ((((port)-1)*32)+((index)&31)) -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h> arch/arm/include/asm/imx-common/gpio.h new file +39
-0@@ -0,0 +1,39 @@ +/* +* Copyright (C) 2011 +* Stefano Babic, DENX Software Engineering, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + + +#ifndef __ASM_ARCH_IMX_GPIO_H +#define __ASM_ARCH_IMX_GPIO_H + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +/* GPIO registers */ +struct gpio_regs { +u32 gpio_dr;/* data */ +u32 gpio_dir;/* direction */ +u32 gpio_psr;/* pad satus */ +}; +#endif + +#define IMX_GPIO_NR (port, index) ((((port)-1)*32)+((index)&31)) + +#endif board/freescale/mx6qsabrelite/mx6qsabrelite.c +14
-14@@ -85,12 +85,12 @@ struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp =GPIO_NUMBER (3 ,21 ) + .gp =IMX_GPIO_NR (3 ,21 ) }, .sda = { .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp = GPIO_NUMBER(3, 28) + .gp = IMX_GPIO_NR(3, 28) } };@@ -99,12 +99,12 @@ struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp =GPIO_NUMBER (4 ,12 ) + .gp =IMX_GPIO_NR (4 ,12 ) }, .sda = { .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp = GPIO_NUMBER(4, 13) + .gp = IMX_GPIO_NR(4, 13) } };@@ -113,12 +113,12 @@ struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp =GPIO_NUMBER (1 ,5 ) + .gp =IMX_GPIO_NR (1 ,5 ) }, .sda = { .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp = GPIO_NUMBER(7, 11) + .gp = IMX_GPIO_NR(7, 11) } };@@ -227,9 +227,9 @@ int board_ehci_hcd_init(int port)imx_iomux_v3_setup_multiple_pads (usb_pads,ARRAY_SIZE (usb_pads));/* Reset USB hub */ -gpio_direction_output (GPIO_NUMBER (7 ,12 ),0 ); +gpio_direction_output (IMX_GPIO_NR (7 ,12 ),0 );mdelay (2 ); -gpio_set_value (GPIO_NUMBER (7 ,12 ),1 ); +gpio_set_value (IMX_GPIO_NR (7 ,12 ),1 );return 0 ; }@@ -411,12 +411,12 @@ struct button_key { };static struct button_key const buttons[] = { - {"back" ,GPIO_NUMBER (2 ,2 ),'B' }, - {"home" ,GPIO_NUMBER (2 ,4 ),'H' }, - {"menu" ,GPIO_NUMBER (2 ,1 ),'M' }, - {"search" ,GPIO_NUMBER (2 ,3 ),'S' }, - {"volup" ,GPIO_NUMBER (7 ,13 ),'V' }, - {"voldown" ,GPIO_NUMBER (4 ,5 ),'v' }, + {"back" ,IMX_GPIO_NR (2 ,2 ),'B' }, + {"home" ,IMX_GPIO_NR (2 ,4 ),'H' }, + {"menu" ,IMX_GPIO_NR (2 ,1 ),'M' }, + {"search" ,IMX_GPIO_NR (2 ,3 ),'S' }, + {"volup" ,IMX_GPIO_NR (7 ,13 ),'V' }, + {"voldown" ,IMX_GPIO_NR (4 ,5 ),'v' }, };/* board/karo/tx25/tx25.c +5
-5@@ -34,8 +34,8 @@DECLARE_GLOBAL_DATA_PTR ;#ifdef CONFIG_FEC_MXC -#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7) -#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9) +#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) +#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)void tx25_fec_init (void ) {struct iomuxc_mux_ctl *muxctl;@@ -103,9 +103,9 @@ void tx25_fec_init(void)/* * set each to 1 and make each an output */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,10 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,11 ),1 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,12 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,10 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,11 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,12 ),1 );mdelay (22 );/* this value came from RedBoot */ board/syteco/zmx25/zmx25.c +13
-13@@ -56,7 +56,7 @@ int board_init()/* Setup of core volatage selection pin to run at 1.4V */ writel (gpio_mux_mode5, &muxctl->pad_ext_armclk);/* VCORE GPIO3[15] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,15 ),1 ); +gpio_direction_output (IMX_GPIO_NR (3 ,15 ),1 );/* Setup of input daisy chains for SD card pins*/ writel (gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);@@ -68,10 +68,10 @@ int board_init()/* Setup of digital output for USB power and OC */ writel (gpio_mux_mode5, &muxctl->pad_csi_d3);/* USB Power GPIO1[28] */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,28 ),1 ); +gpio_direction_output (IMX_GPIO_NR (1 ,28 ),1 );writel (gpio_mux_mode5, &muxctl->pad_csi_d2);/* USB OC GPIO1[27] */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (1 ,18 )); +gpio_direction_input (IMX_GPIO_NR (1 ,18 ));/* Setup of digital output control pins */ writel (gpio_mux_mode5, &muxctl->pad_csi_d8);/* Ouput 1 Ctrl GPIO1[7] */ @@ -83,21 +83,21 @@ int board_init()writel (0 , &padctl->pad_csi_d5);/* Ouput 2 Stat pull up off */ /* Switch both output drivers off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,7 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,6 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,7 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,6 ),0 );/* Setup of key input pin GPIO2[29]*/ writel (gpio_mux_mode5 |MX25_PIN_MUX_SION , &muxctl->pad_kpp_row0);writel (0 , &padctl->pad_kpp_row0);/* Key pull up off */ -gpio_direction_input (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +gpio_direction_input (IMX_GPIO_NR (2 ,29 ));/* Setup of status LED outputs */ writel (gpio_mux_mode5, &muxctl->pad_csi_d9);/* GPIO4[21] */ writel (gpio_mux_mode5, &muxctl->pad_csi_d4);/* GPIO1[29] */ /* Switch both LEDs off */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); +gpio_direction_output (IMX_GPIO_NR (4 ,21 ),0 ); +gpio_direction_output (IMX_GPIO_NR (1 ,29 ),0 );/* Setup of CAN1 and CAN2 signals */ writel (gpio_mux_mode6, &muxctl->pad_gpio_a);/* CAN1 TX */ @@ -148,12 +148,12 @@ int board_late_init(void)writel (gpio_mux_mode2, &muxctl->pad_uart2_cts);/* assert PHY reset (low) */ -gpio_direction_output (MXC_GPIO_PORT_TO_NUM (3 ,16 ),0 ); +gpio_direction_output (IMX_GPIO_NR (3 ,16 ),0 );udelay (5000 );/* deassert PHY reset */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (3 ,16 ),1 ); +gpio_set_value (IMX_GPIO_NR (3 ,16 ),1 );udelay (5000 );#endif @@ -161,12 +161,12 @@ int board_late_init(void) e =getenv ("gs_base_board" );if (e !=NULL ) {if (strcmp (e,"G283" ) ==0 ) { -int key =gpio_get_value (MXC_GPIO_PORT_TO_NUM (2 ,29 )); +int key =gpio_get_value (IMX_GPIO_NR (2 ,29 ));if (key) {/* Switch on both LEDs to inidcate boot mode */ -gpio_set_value (MXC_GPIO_PORT_TO_NUM (1 ,29 ),0 ); -gpio_set_value (MXC_GPIO_PORT_TO_NUM (4 ,21 ),0 ); +gpio_set_value (IMX_GPIO_NR (1 ,29 ),0 ); +gpio_set_value (IMX_GPIO_NR (4 ,21 ),0 );setenv ("preboot" ,"run gs_slow_boot" ); }else include/configs/mx6qsabrelite.h +2
-2@@ -31,6 +31,7 @@#define CONFIG_MACH_TYPE 3769#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -53,7 +54,7 @@#define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))#define CONFIG_SF_DEFAULT_SPEED 25000000#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)#endif --1.7.9.5
PATCH v4 1/1 MX: Set a common gpio.h for all i.MX
Quoted 4 lines · Matt Sealey
Works fine on the Efika MX :)
Tested-by Matt Sealey <[email protected]>
Ok, thanks, I push it on the server.
Regards,
Stefano
Signature · 5 lines
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