Per device coherent DMA map ops

PATCH New Rob Herring 3 participants 9 messages Aug 14, 2012 – Aug 21, 2012

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Network drivers Device tree bindings Arm (32-bit) Arm sub-architectures +3 more subsystems

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Rob Herring

author

2012-08-14 03:49 UTC #0 lore raw

cover Per device coherent DMA map ops

From: Rob Herring <[email protected]>

This is series adds coherent DMA map operations which can be set per device. Expanding on the first RFC[1], this version adds iommu ops and implements support on highbank platform.

arch_is_coherent is never defined true since removing ixp2xxx, so we can remove it altogether.

Rob

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/113921.html

Rob Herring (4):
ARM: add coherent dma ops
ARM: add coherent iommu dma ops
ARM: kill off arch_is_coherent
ARM: highbank: add coherent DMA setup

 .../devicetree/bindings/ata/ahci-platform.txt      |    3 +
 .../devicetree/bindings/dma/arm-pl330.txt          |    3 +
 .../devicetree/bindings/net/calxeda-xgmac.txt      |    3 +
 arch/arm/boot/dts/highbank.dts                     |    1 +
 arch/arm/include/asm/barrier.h                     |    7 +-
 arch/arm/include/asm/dma-mapping.h                 |    1 +
 arch/arm/include/asm/memory.h                      |    8 -
 arch/arm/mach-highbank/highbank.c                  |   52 ++++
 arch/arm/mm/dma-mapping.c                          |  254 ++++++++++++++++----
 arch/arm/mm/mmu.c                                  |   17 +-
 10 files changed, 271 insertions(+), 78 deletions(-)

Signature · 1 line

1.7.9.5

Rob Herring

author

2012-08-14 03:49 UTC #1 lore raw

PATCH 1/4 ARM: add coherent dma ops

From: Rob Herring <[email protected]>

arch_is_coherent is problematic as it is a global symbol. This doesn't work for multi-platform kernels or platforms which can support per device coherent DMA.

This adds arm_coherent_dma_ops to be used for devices which connected coherently (i.e. to the ACP port on Cortex-A9 or A15). The arm_dma_ops are modified at boot when arch_is_coherent is true.

Signed-off-by Rob Herring <[email protected]>

Cc Russell King <[email protected]>

Cc Marek Szyprowski <[email protected]>

---
 arch/arm/include/asm/dma-mapping.h |    1 +
 arch/arm/mm/dma-mapping.c          |   71 ++++++++++++++++++++++++++++++------
 2 files changed, 60 insertions(+), 12 deletions(-)

arch/arm/include/asm/dma-mapping.h +1 -0

index 2ae842d..c27d855 100644
@@ -13,6 +13,7 @@
 
 #define DMA_ERROR_CODE	(~0)
 extern struct dma_map_ops arm_dma_ops;
+extern struct dma_map_ops arm_coherent_dma_ops;
 
 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
 {

arch/arm/mm/dma-mapping.c +59 ~~-12~~

141 lines not on this page · raw message

Signature · 1 line

1.7.9.5

Rob Herring

author

2012-08-14 03:49 UTC #2 lore raw

PATCH 2/4 ARM: add coherent iommu dma ops

In reply to Rob Herring

From: Rob Herring <[email protected]>

Remove arch_is_coherent() from iommu dma ops and implement separate coherent ops functions.

Signed-off-by Rob Herring <[email protected]>

Cc Russell King <[email protected]>

Cc Marek Szyprowski <[email protected]>

---
 arch/arm/mm/dma-mapping.c |  183 +++++++++++++++++++++++++++++++++++----------
 1 file changed, 143 insertions(+), 40 deletions(-)

arch/arm/mm/dma-mapping.c +143 ~~-40~~

index c14e37e..29c3b3a 100644
@@ -1254,7 +1254,8 @@ static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
  */
 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
 			  size_t size, dma_addr_t *handle,
-			  enum dma_data_direction dir, struct dma_attrs *attrs)
+			  enum dma_data_direction dir, struct dma_attrs *attrs,
+			  bool is_coherent)
 {
 	struct dma_iommu_mapping *mapping = dev->archdata.mapping;
 	dma_addr_t iova, iova_base;

@@ -1273,8 +1274,8 @@ static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
 		phys_addr_t phys = page_to_phys(sg_page(s));
 		unsigned int len = PAGE_ALIGN(s->offset + s->length);
 
-		if (!arch_is_coherent() &&
-		    !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
+		if (!is_coherent &&
+			!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
 			__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
 
 		ret = iommu_map(mapping->domain, iova, phys, len, 0);

@@ -1292,20 +1293,9 @@ fail:
 	return ret;
 }
 
-/**
- * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
- * @dev: valid struct device pointer
- * @sg: list of buffers
- * @nents: number of buffers to map
- * @dir: DMA transfer direction
- *
- * Map a set of buffers described by scatterlist in streaming mode for DMA.
- * The scatter gather list elements are merged together (if possible) and
- * tagged with the appropriate dma address and length. They are obtained via
- * sg_dma_{address,length}.
- */
-int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-		     enum dma_data_direction dir, struct dma_attrs *attrs)
+static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+		     enum dma_data_direction dir, struct dma_attrs *attrs,
+		     bool is_coherent)
 {
 	struct scatterlist *s = sg, *dma = sg, *start = sg;
 	int i, count = 0;

@@ -1321,7 +1311,7 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 
 		if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
 			if (__map_sg_chunk(dev, start, size, &dma->dma_address,
-			    dir, attrs) < 0)
+			    dir, attrs, is_coherent) < 0)
 				goto bad_mapping;
 
 			dma->dma_address += offset;

@@ -1334,7 +1324,8 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 		}
 		size += s->length;
 	}
-	if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs) < 0)
+	if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
+		is_coherent) < 0)
 		goto bad_mapping;
 
 	dma->dma_address += offset;

@@ -1349,17 +1340,44 @@ bad_mapping:
 }
 
 /**
- * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
+ * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
  * @dev: valid struct device pointer
  * @sg: list of buffers
- * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
- * @dir: DMA transfer direction (same as was passed to dma_map_sg)
+ * @nents: number of buffers to map
+ * @dir: DMA transfer direction
  *
- * Unmap a set of streaming mode DMA translations.  Again, CPU access
- * rules concerning calls here are the same as for dma_unmap_single().
+ * Map a set of i/o coherent buffers described by scatterlist in streaming
+ * mode for DMA. The scatter gather list elements are merged together (if
+ * possible) and tagged with the appropriate dma address and length. They are
+ * obtained via sg_dma_{address,length}.
  */
-void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
-			enum dma_data_direction dir, struct dma_attrs *attrs)
+int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
+		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
+{
+	return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
+}
+
+/**
+ * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
+ * @dev: valid struct device pointer
+ * @sg: list of buffers
+ * @nents: number of buffers to map
+ * @dir: DMA transfer direction
+ *
+ * Map a set of buffers described by scatterlist in streaming mode for DMA.
+ * The scatter gather list elements are merged together (if possible) and
+ * tagged with the appropriate dma address and length. They are obtained via
+ * sg_dma_{address,length}.
+ */
+int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
+		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
+{
+	return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
+}
+
+static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
+		int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
+		bool is_coherent)
 {
 	struct scatterlist *s;
 	int i;

@@ -1368,7 +1386,7 @@ void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
 		if (sg_dma_len(s))
 			__iommu_remove_mapping(dev, sg_dma_address(s),
 					       sg_dma_len(s));
-		if (!arch_is_coherent() &&
+		if (!is_coherent &&
 		    !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
 			__dma_page_dev_to_cpu(sg_page(s), s->offset,
 					      s->length, dir);

@@ -1376,6 +1394,38 @@ void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
 }
 
 /**
+ * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
+ * @dev: valid struct device pointer
+ * @sg: list of buffers
+ * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)
+ *
+ * Unmap a set of streaming mode DMA translations.  Again, CPU access
+ * rules concerning calls here are the same as for dma_unmap_single().
+ */
+void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
+		int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
+{
+	__iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
+}
+
+/**
+ * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
+ * @dev: valid struct device pointer
+ * @sg: list of buffers
+ * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)
+ *
+ * Unmap a set of streaming mode DMA translations.  Again, CPU access
+ * rules concerning calls here are the same as for dma_unmap_single().
+ */
+void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
+			enum dma_data_direction dir, struct dma_attrs *attrs)
+{
+	__iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
+}
+
+/**
  * arm_iommu_sync_sg_for_cpu
  * @dev: valid struct device pointer
  * @sg: list of buffers

@@ -1389,8 +1439,7 @@ void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
 	int i;
 
 	for_each_sg(sg, s, nents, i)
-		if (!arch_is_coherent())
-			__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
+		__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
 
 }

@@ -1408,22 +1457,21 @@ void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 	int i;
 
 	for_each_sg(sg, s, nents, i)
-		if (!arch_is_coherent())
-			__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
+		__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
 }
 
 
 /**
- * arm_iommu_map_page
+ * arm_coherent_iommu_map_page
  * @dev: valid struct device pointer
  * @page: page that buffer resides in
  * @offset: offset into page for start of buffer
  * @size: size of buffer to map
  * @dir: DMA transfer direction
  *
- * IOMMU aware version of arm_dma_map_page()
+ * Coherent IOMMU aware version of arm_dma_map_page()
  */
-static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
+static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
 	     unsigned long offset, size_t size, enum dma_data_direction dir,
 	     struct dma_attrs *attrs)
 {

@@ -1431,9 +1479,6 @@ static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
 	dma_addr_t dma_addr;
 	int ret, len = PAGE_ALIGN(size + offset);
 
-	if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
-		__dma_page_cpu_to_dev(page, offset, size, dir);
-
 	dma_addr = __alloc_iova(mapping, len);
 	if (dma_addr == DMA_ERROR_CODE)
 		return dma_addr;

@@ -1449,6 +1494,52 @@ fail:
 }
 
 /**
+ * arm_iommu_map_page
+ * @dev: valid struct device pointer
+ * @page: page that buffer resides in
+ * @offset: offset into page for start of buffer
+ * @size: size of buffer to map
+ * @dir: DMA transfer direction
+ *
+ * IOMMU aware version of arm_dma_map_page()
+ */
+static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
+	     unsigned long offset, size_t size, enum dma_data_direction dir,
+	     struct dma_attrs *attrs)
+{
+	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
+		__dma_page_cpu_to_dev(page, offset, size, dir);
+
+	return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
+}
+
+/**
+ * arm_coherent_iommu_unmap_page
+ * @dev: valid struct device pointer
+ * @handle: DMA address of buffer
+ * @size: size of buffer (same as passed to dma_map_page)
+ * @dir: DMA transfer direction (same as passed to dma_map_page)
+ *
+ * Coherent IOMMU aware version of arm_dma_unmap_page()
+ */
+static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
+		size_t size, enum dma_data_direction dir,
+		struct dma_attrs *attrs)
+{
+	struct dma_iommu_mapping *mapping = dev->archdata.mapping;
+	dma_addr_t iova = handle & PAGE_MASK;
+	struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
+	int offset = handle & ~PAGE_MASK;
+	int len = PAGE_ALIGN(size + offset);
+
+	if (!iova)
+		return;
+
+	iommu_unmap(mapping->domain, iova, len);
+	__free_iova(mapping, iova, len);
+}
+
+/**
  * arm_iommu_unmap_page
  * @dev: valid struct device pointer
  * @handle: DMA address of buffer

@@ -1470,7 +1561,7 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
 	if (!iova)
 		return;
 
-	if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
+	if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
 		__dma_page_dev_to_cpu(page, offset, size, dir);
 
 	iommu_unmap(mapping->domain, iova, len);

@@ -1488,8 +1579,7 @@ static void arm_iommu_sync_single_for_cpu(struct device *dev,
 	if (!iova)
 		return;
 
-	if (!arch_is_coherent())
-		__dma_page_dev_to_cpu(page, offset, size, dir);
+	__dma_page_dev_to_cpu(page, offset, size, dir);
 }
 
 static void arm_iommu_sync_single_for_device(struct device *dev,

@@ -1523,6 +1613,19 @@ struct dma_map_ops iommu_ops = {
 	.sync_sg_for_device	= arm_iommu_sync_sg_for_device,
 };
 
+struct dma_map_ops iommu_coherent_ops = {
+	.alloc		= arm_iommu_alloc_attrs,
+	.free		= arm_iommu_free_attrs,
+	.mmap		= arm_iommu_mmap_attrs,
+	.get_sgtable	= arm_iommu_get_sgtable,
+
+	.map_page	= arm_coherent_iommu_map_page,
+	.unmap_page	= arm_coherent_iommu_unmap_page,
+
+	.map_sg		= arm_coherent_iommu_map_sg,
+	.unmap_sg	= arm_coherent_iommu_unmap_sg,
+};
+
 /**
  * arm_iommu_create_mapping
  * @bus: pointer to the bus holding the client device (for IOMMU calls)

Signature · 1 line

1.7.9.5

Rob Herring

author

2012-08-14 03:49 UTC #3 lore raw

PATCH 3/4 ARM: kill off arch_is_coherent

In reply to Rob Herring

From: Rob Herring <[email protected]>

With ixp2xxx removed, there are no platforms that define arch_is_coherent, so the last occurrences of arch_is_coherent can be removed. Any new platform with coherent i/o should use coherent dma mapping functions.

Signed-off-by Rob Herring <[email protected]>

Cc Russell King <[email protected]>

Cc Marek Szyprowski <[email protected]>

---
 arch/arm/include/asm/barrier.h |    7 +++----
 arch/arm/include/asm/memory.h  |    8 --------
 arch/arm/mm/mmu.c              |   17 +++--------------
 3 files changed, 6 insertions(+), 26 deletions(-)

arch/arm/include/asm/barrier.h +3 -4

index 0511238..8dcd9c7 100644
@@ -44,10 +44,9 @@
 #define rmb()		dsb()
 #define wmb()		mb()
 #else
-#include <asm/memory.h>
-#define mb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#define rmb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#define wmb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define mb()		barrier()
+#define rmb()		barrier()
+#define wmb()		barrier()
 #endif
 
 #ifndef CONFIG_SMP

arch/arm/include/asm/memory.h +0 -8

index e965f1b..93ff0f1 100644
@@ -272,14 +272,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
 #define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
 #define virt_addr_valid(kaddr)	((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
 
-/*
- * Optional coherency support.  Currently used only by selected
- * Intel XSC3-based systems.
- */
-#ifndef arch_is_coherent
-#define arch_is_coherent()		0
-#endif
-
 #endif
 
 #include <asm-generic/memory_model.h>

arch/arm/mm/mmu.c +3 ~~-14~~

index 4c2d045..ee2a6f0 100644
@@ -216,7 +216,7 @@ static struct mem_type mem_types[] = {
 		.prot_l1	= PMD_TYPE_TABLE,
 		.prot_sect	= PROT_SECT_DEVICE | PMD_SECT_WB,
 		.domain		= DOMAIN_IO,
-	},	
+	},
 	[MT_DEVICE_WC] = {	/* ioremap_wc */
 		.prot_pte	= PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
 		.prot_l1	= PMD_TYPE_TABLE,

@@ -422,17 +422,6 @@ static void __init build_mem_type_table(void)
 	vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
 
 	/*
-	 * Enable CPU-specific coherency if supported.
-	 * (Only available on XSC3 at the moment.)
-	 */
-	if (arch_is_coherent() && cpu_is_xsc3()) {
-		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
-		mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
-		mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
-		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
-		mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
-	}
-	/*
 	 * ARMv6 and above have extended page tables.
 	 */
 	if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) {

@@ -777,8 +766,8 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
 		create_mapping(md);
 		vm->addr = (void *)(md->virtual & PAGE_MASK);
 		vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
-		vm->phys_addr = __pfn_to_phys(md->pfn); 
-		vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; 
+		vm->phys_addr = __pfn_to_phys(md->pfn);
+		vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
 		vm->flags |= VM_ARM_MTYPE(md->type);
 		vm->caller = iotable_init;
 		vm_area_add_early(vm++);

Signature · 1 line

1.7.9.5

Rob Herring

author

2012-08-14 03:49 UTC #4 lore raw

PATCH 4/4 ARM: highbank: add coherent DMA setup

In reply to Rob Herring

From: Rob Herring <[email protected]>

Some highbank DMA masters can support coherent (ACP) or non-coherent DMA. This sets up dma_map_ops for masters which are configured for coherent DMA.

Signed-off-by Rob Herring <[email protected]>

---
 .../devicetree/bindings/ata/ahci-platform.txt      |    3 ++
 .../devicetree/bindings/dma/arm-pl330.txt          |    3 ++
 .../devicetree/bindings/net/calxeda-xgmac.txt      |    3 ++
 arch/arm/boot/dts/highbank.dts                     |    1 +
 arch/arm/mach-highbank/highbank.c                  |   52 ++++++++++++++++++++
 5 files changed, 62 insertions(+)

Documentation/devicetree/bindings/ata/ahci-platform.txt +3 -0

index 8bb8a76..6c1ad01 100644
@@ -8,6 +8,9 @@ Required properties:
 - interrupts        : <interrupt mapping for SATA IRQ>
 - reg               : <registers mapping>
 
+Optional properties:
+- dma-coherent      : Present if dma operations are coherent
+
 Example:
         sata at ffe08000 {
 		compatible = "calxeda,hb-ahci";

Documentation/devicetree/bindings/dma/arm-pl330.txt +3 -0

index a4cd273..36e27d5 100644
@@ -9,6 +9,9 @@ Required properties:
     region.
   - interrupts: interrupt number to the cpu.
 
+Optional properties:
+- dma-coherent      : Present if dma operations are coherent
+
 Example:
 
 	pdma0: pdma at 12680000 {

Documentation/devicetree/bindings/net/calxeda-xgmac.txt +3 -0

index 411727a..c8ae996 100644
@@ -6,6 +6,9 @@ Required properties:
 - interrupts : Should contain 3 xgmac interrupts. The 1st is main interrupt.
   The 2nd is pwr mgt interrupt. The 3rd is low power state interrupt.
 
+Optional properties:
+- dma-coherent      : Present if dma operations are coherent
+
 Example:
 
 ethernet at fff50000 {

arch/arm/boot/dts/highbank.dts +1 -0

index 9fecf1a..7414577 100644
@@ -121,6 +121,7 @@
 			compatible = "calxeda,hb-ahci";
 			reg = <0xffe08000 0x10000>;
 			interrupts = <0 83 4>;
+			dma-coherent;
 		};
 
 		sdhci at ffe0e000 {

arch/arm/mach-highbank/highbank.c +52 -0

74 lines not on this page · raw message

Signature · 1 line

1.7.9.5

Marek Szyprowski

2012-08-20 14:16 UTC #5 lore raw

cover Per device coherent DMA map ops

In reply to Rob Herring

Hello,

Quoted 19 lines · Rob Herring

From: Rob Herring <[email protected]>
This is series adds coherent DMA map operations which can be set per device. Expanding on the first RFC[1], this version adds iommu ops and implements support on highbank platform.
arch_is_coherent is never defined true since removing ixp2xxx, so we can remove it altogether.
Rob
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/113921.html
Rob Herring (4):
ARM: add coherent dma ops
ARM: add coherent iommu dma ops
ARM: kill off arch_is_coherent
ARM: highbank: add coherent DMA setup

Quoted 11 lines

 .../devicetree/bindings/ata/ahci-platform.txt      |    3 +
 .../devicetree/bindings/dma/arm-pl330.txt          |    3 +
 .../devicetree/bindings/net/calxeda-xgmac.txt      |    3 +
 arch/arm/boot/dts/highbank.dts                     |    1 +
 arch/arm/include/asm/barrier.h                     |    7 +-
 arch/arm/include/asm/dma-mapping.h                 |    1 +
 arch/arm/include/asm/memory.h                      |    8 -
 arch/arm/mach-highbank/highbank.c                  |   52 ++++
 arch/arm/mm/dma-mapping.c                          |  254 ++++++++++++++++----
 arch/arm/mm/mmu.c                                  |   17 +-
 10 files changed, 271 insertions(+), 78 deletions(-)

I like those patches and I would like to take it to my dma-mapping-next tree, but I wonder how to handle merging of the last patch. Arnd, Olof - could You tell me how to do it? I assume that it should be somehow merged by arm-soc tree, so it depends on the earlier patches. Would it be enough if I take them to the topic branch? Then I can continue works on dma-mapping subsystem by merging that topic branch to my dma-mapping-next and you will also take it as a dependency for highbank patches. Am I right?

Best regards

Signature · 2 lines

Marek Szyprowski
Samsung Poland R&D Center

Rob Herring

author

2012-08-20 14:54 UTC #6 lore raw

cover Per device coherent DMA map ops

Quoted 35 lines · Marek Szyprowski

Hello,
Quoted 19 lines · Rob Herring
From: Rob Herring <[email protected]>
This is series adds coherent DMA map operations which can be set per device. Expanding on the first RFC[1], this version adds iommu ops and implements support on highbank platform.
arch_is_coherent is never defined true since removing ixp2xxx, so we can remove it altogether.
Rob
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/113921.html
Rob Herring (4):
ARM: add coherent dma ops
ARM: add coherent iommu dma ops
ARM: kill off arch_is_coherent
ARM: highbank: add coherent DMA setup
Quoted 11 lines
 .../devicetree/bindings/ata/ahci-platform.txt      |    3 +
 .../devicetree/bindings/dma/arm-pl330.txt          |    3 +
 .../devicetree/bindings/net/calxeda-xgmac.txt      |    3 +
 arch/arm/boot/dts/highbank.dts                     |    1 +
 arch/arm/include/asm/barrier.h                     |    7 +-
 arch/arm/include/asm/dma-mapping.h                 |    1 +
 arch/arm/include/asm/memory.h                      |    8 -
 arch/arm/mach-highbank/highbank.c                  |   52 ++++
 arch/arm/mm/dma-mapping.c                          |  254 ++++++++++++++++----
 arch/arm/mm/mmu.c                                  |   17 +-
 10 files changed, 271 insertions(+), 78 deletions(-)

Quoted 7 lines

I like those patches and I would like to take it to my dma-mapping-next tree, but I wonder how to handle merging of the last patch. Arnd, Olof - could You tell me how to do it? I assume that it should be somehow merged by arm-soc tree, so it depends on the earlier patches. Would it be enough if I take them to the topic branch? Then I can continue works on dma-mapping subsystem by merging that topic branch to my dma-mapping-next and you will also take it as a dependency for highbank patches. Am I right?

I'm fine with it all going in thru your tree. Seems a bit silly to deal with tracking the dependencies all for 1 patch. The only possible conflict I see is with the dts file and some other SATA related changes which will go in via the ata tree. But the merge is trivial and the conflict will be there either with your tree or arm-soc.

Rob

Arnd Bergmann

2012-08-20 20:06 UTC #7 lore raw

cover Per device coherent DMA map ops

Quoted 9 lines · Rob Herring

Quoted 8 lines
I like those patches and I would like to take it to my dma-mapping-next tree, but I wonder how to handle merging of the last patch. Arnd, Olof - could You tell me how to do it? I assume that it should be somehow merged by arm-soc tree, so it depends on the earlier patches. Would it be enough if I take them to the topic branch? Then I can continue works on dma-mapping subsystem by merging that topic branch to my dma-mapping-next and you will also take it as a dependency for highbank patches. Am I right?

Quoted 5 lines

I'm fine with it all going in thru your tree. Seems a bit silly to deal with tracking the dependencies all for 1 patch. The only possible conflict I see is with the dts file and some other SATA related changes which will go in via the ata tree. But the merge is trivial and the conflict will be there either with your tree or arm-soc.

Right. I see no problem having this patch go through the dma-mapping tree.

Arnd

Marek Szyprowski

2012-08-21 14:48 UTC #8 lore raw

cover Per device coherent DMA map ops

Hello,

Quoted 11 lines · Arnd Bergmann

Quoted 3 lines · Rob Herring
Quoted 3 lines
I like those patches and I would like to take it to my dma-mapping-next tree, but I wonder how to handle merging of the last patch. Arnd, Olof - could You tell me how to do it? I
assume
Quoted 6 lines
Quoted 5 lines
that it should be somehow merged by arm-soc tree, so it depends on the earlier patches. Would it be enough if I take them to the topic branch? Then I can continue works on dma-mapping subsystem by merging that topic branch to my dma-mapping-next and you will also take it as a dependency for highbank patches. Am I right?

Quoted 7 lines

Quoted 5 lines
I'm fine with it all going in thru your tree. Seems a bit silly to deal with tracking the dependencies all for 1 patch. The only possible conflict I see is with the dts file and some other SATA related changes which will go in via the ata tree. But the merge is trivial and the conflict will be there either with your tree or arm-soc.
Right. I see no problem having this patch go through the dma-mapping tree.

Ok, I've took them to my dma-mapping-next tree and I will handle pushing them to Linus.

Best regards

Signature · 2 lines

Marek Szyprowski
Samsung Poland R&D Center