ARM: clk-imx35: Fix SSI clock registration

SSI block has two types of clock:

ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.

Currently SSI driver only supports slave mode and only need to handle the ipg clock, because the peripheral clock comes from the master codec.

Only register the ipg clock and do not register the peripheral clock for ssi.

Tested-by Mark Brown <[email protected]>

in that it stops boot hanging on the board, though it still doesn't make AC'97 come out of reset happily. That's probably some separate issue (pinmux perhaps?) though.

On Wed, Aug 22, 2012 at 4:27 PM, Mark Brown

Quoted 3 lines

in that it stops boot hanging on the board, though it still doesn't make AC'97 come out of reset happily. That's probably some separate issue (pinmux perhaps?) though.

Yes, looks like a separate issue.

Did imx_ssi_probe go successfully? What is the error log you are getting?

Quoted 1 line

Did imx_ssi_probe go successfully? What is the error log you are getting?

The controller probes but there's no perceptible activity on the pins when we try to reset the CODEC so no register I/O.

SSI block has two types of clock:

ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.

Currently SSI driver only supports slave mode and only need to handle the ipg clock, because the peripheral clock comes from the master codec.

Only register the ipg clock and do not register the peripheral clock for ssi.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- Use ssi2_gate for imx-ssi.1

 arch/arm/mach-imx/clk-imx35.c |    6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

arch/arm/mach-imx/clk-imx35.c +2 -4

index c6422fb..f7910df 100644
@@ -230,10 +230,8 @@ int __init mx35_clocks_init()
 	clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
 	clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
 	clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
-	clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0");
-	clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0");
-	clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1");
-	clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1");
+	clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
+	clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
 	/* i.mx35 has the i.mx21 type uart */
 	clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");

Signature · 1 line

1.7.9.5