ARM: add infra-structure for BCM2835 and Raspberry Pi

From: Simon Arlott <[email protected]>

The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system.

http://www.raspberrypi.org/.

This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since.

---
v4:
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix from broadcom to brcm.
* Document device tree vendor prefix.
* Added VFP (Kconfig help says one must be selected) and EABI (to match binaries produced by RPi toolchains, so user-space works) to defconfig.
v3:
* Added DT binding documentation for the SoC itself.
* Changed patch subject from "support" to "infra-structure", and added to the commit description, to indicate that the patch isn't adding complete support for the SoC/board.
* Added all S-o-b tags from downstream, now that I have permission to fix them up to be valid.
* Changed patch author to Simon Arlott, now I have permission to change his email address to something valid.
* Limited my (c) additions to files I created; the other changes turnd out to be trivial.
v2:
* Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
* Remove #define UART_BAUD since it isn't used.
* Don't select WATCHDOG from ARCH_BCM2835
* Remove 8250 and PL010 serial ports from bcm2835_defconfig
* Remove <mach/hardware.h>
* Rename common.c back to bcm2835.c; matches downstream and is preferred naming style.

---
 Documentation/devicetree/bindings/arm/bcm2835.txt  |    8 ++
 .../devicetree/bindings/vendor-prefixes.txt        |    1 +
 arch/arm/Kconfig                                   |   17 ++++
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts                |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |   10 +++
 arch/arm/configs/bcm2835_defconfig                 |   95 ++++++++++++++++++++
 arch/arm/mach-bcm2835/Makefile                     |    1 +
 arch/arm/mach-bcm2835/Makefile.boot                |    5 ++
 arch/arm/mach-bcm2835/bcm2835.c                    |   77 ++++++++++++++++
 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h   |   29 ++++++
 arch/arm/mach-bcm2835/include/mach/debug-macro.S   |   21 +++++
 arch/arm/mach-bcm2835/include/mach/timex.h         |   26 ++++++
 arch/arm/mach-bcm2835/include/mach/uncompress.h    |   45 ++++++++++
 14 files changed, 348 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2835.txt
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2835_defconfig
 create mode 100644 arch/arm/mach-bcm2835/Makefile
 create mode 100644 arch/arm/mach-bcm2835/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2835/bcm2835.c
 create mode 100644 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2835/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/uncompress.h

new file mode 100644
index 0000000..ac68348
@@ -0,0 +1,8 @@
+Broadcom BCM2835 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2835 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm2835";

index db4d3af..4f293e5 100644
@@ -10,6 +10,7 @@ apm	Applied Micro Circuits Corporation (APM)
 arm	ARM Ltd.
 atmel	Atmel Corporation
 bosch	Bosch Sensortec GmbH
+brcm	Broadcom Corporation
 cavium	Cavium, Inc.
 chrp	Common Hardware Reference Platform
 cortina	Cortina Systems, Inc.

index d0021fe..04b063c 100644
@@ -349,6 +349,23 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2835
+	bool "Broadcom BCM2835 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for the Broadcom BCM2835 SoC. This SoC is
+	  use in the Raspberry Pi, and Roku 2 devices.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU

index a812d12..b1c333c 100644
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2835)		:= bcm2835
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx

new file mode 100644
index 0000000..7dd860f
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	compatible = "raspberrypi,model-b", "brcm,bcm2835";
+	model = "Raspberry Pi Model B";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};

new file mode 100644
index 0000000..7e5c5a4
@@ -0,0 +1,10 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm2835";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";
+	};
+};

new file mode 100644
index 0000000..4c3892f
@@ -0,0 +1 @@
+obj-y += bcm2835.o

new file mode 100644
index 0000000..0831fd1
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb

new file mode 100644
index 0000000..d4dfcf7
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2835_BCM2835_SOC_H__
+#define __MACH_BCM2835_BCM2835_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2835_PERIPH_PHYS	0x20000000
+#define BCM2835_PERIPH_VIRT	0xf0000000
+#define BCM2835_PERIPH_SIZE	SZ_16M
+#define BCM2835_DEBUG_PHYS	0x20201000
+#define BCM2835_DEBUG_VIRT	0xf0201000
+
+#endif

new file mode 100644
index 0000000..8a161e4
@@ -0,0 +1,21 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2835_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2835_DEBUG_PHYS
+	ldr	\rv, =BCM2835_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>

new file mode 100644
index 0000000..6d021e1
@@ -0,0 +1,26 @@
+/*
+ *  BCM2835 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif

1.7.9.5

From: Simon Arlott <[email protected]>

The BCM2835 contains a custom interrupt controller, which supports 72 interrupt sources using a 2-level register scheme. The interrupt controller, or the HW block containing it, is referred to occasionally as "armctrl" in the SoC documentation, hence the symbol naming in the code.

This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce the size of the hwirq space, and pass the total size of the hwirq space to irq_domain_add_linear(), rather than just the number of valid hwirqs; the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT, rather than nesting it inside a /axi node. Hence, changed the reg value since /axi had a ranges property. This seems simpler to me, but I'm not sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence removing the need to patch include/linux/irqdomain.h or kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

--
v4:
* Moved IRQ driver to drivers/irqchip/.
* Simplified armctrl_of_init() using of_iomap().
* Moved binding into Documentation/devicetree/bindings/interrupt-controller/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.

---
 .../brcm,bcm2835-armctrl-ic.txt                    |  110 ++++++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    8 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   10 +-
 drivers/Kconfig                                    |    2 +
 drivers/Makefile                                   |    1 +
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-bcm2835.c                      |  223 ++++++++++++++++++++
 include/linux/irqchip/bcm2835.h                    |   29 +++
 8 files changed, 375 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
 create mode 100644 drivers/irqchip/Kconfig
 create mode 100644 drivers/irqchip/Makefile
 create mode 100644 drivers/irqchip/irq-bcm2835.c
 create mode 100644 include/linux/irqchip/bcm2835.h

new file mode 100644
index 0000000..7bcf2f7
@@ -0,0 +1,110 @@
+BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
+
+The BCM2835 contains a custom top-level interrupt controller, which supports
+72 interrupt sources using a 2-level register scheme. The interrupt
+controller, or the HW block containing it, is referred to occasionally
+as "armctrl" in the SoC documentation, hence naming of this binding.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-armctrl-ic.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+
+  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
+  pending" register, or 1/2 respectively for interrupts in the "IRQ pending
+  1/2" register.
+
+  The 2nd cell contains the interrupt number within the bank. Valid values
+  are 0..7 for bank 0, and 0..31 for bank 1.
+
+The interrupt sources are as follows:
+
+Bank 0:
+0: ARM_TIMER
+1: ARM_MAILBOX
+2: ARM_DOORBELL_0
+3: ARM_DOORBELL_1
+4: VPU0_HALTED
+5: VPU1_HALTED
+6: ILLEGAL_TYPE0
+7: ILLEGAL_TYPE1
+
+Bank 1:
+0: TIMER0
+1: TIMER1
+2: TIMER2
+3: TIMER3
+4: CODEC0
+5: CODEC1
+6: CODEC2
+7: VC_JPEG
+8: ISP
+9: VC_USB
+10: VC_3D
+11: TRANSPOSER
+12: MULTICORESYNC0
+13: MULTICORESYNC1
+14: MULTICORESYNC2
+15: MULTICORESYNC3
+16: DMA0
+17: DMA1
+18: VC_DMA2
+19: VC_DMA3
+20: DMA4
+21: DMA5
+22: DMA6
+23: DMA7
+24: DMA8
+25: DMA9
+26: DMA10
+27: DMA11
+28: DMA12
+29: AUX
+30: ARM
+31: VPUDMA
+
+Bank 2:
+0: HOSTPORT
+1: VIDEOSCALER
+2: CCP2TX
+3: SDC
+4: DSI0
+5: AVE
+6: CAM0
+7: CAM1
+8: HDMI0
+9: HDMI1
+10: PIXELVALVE1
+11: I2CSPISLV
+12: DSI1
+13: PWA0
+14: PWA1
+15: CPR
+16: SMI
+17: GPIO0
+18: GPIO1
+19: GPIO2
+20: GPIO3
+21: VC_I2C
+22: VC_SPI
+23: VC_I2SPCM
+24: VC_SDIO
+25: VC_UART
+26: SLIMBUS
+27: VEC
+28: CPG
+29: RNG
+30: VC_ARASANSDIO
+31: AVSPMON
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "brcm,bcm2835-armctrl-ic";
+	reg = <0x2000b200 0x200>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};

index 7e5c5a4..33e8d533 100644
@@ -3,8 +3,16 @@
 / {
 	compatible = "brcm,bcm2835";
 	model = "BCM2835";
+	interrupt-parent = <&intc>;
 
 	chosen {
 		bootargs = "earlyprintk";
 	};
+
+	intc: interrupt-controller {
+		compatible = "brcm,bcm2835-armctrl-ic";
+		reg = <0x2000b200 0x200>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
 };

index f6b36b4..72c4b5f 100644
@@ -13,12 +13,12 @@
  */
 
 #include <linux/init.h>
+#include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <asm/exception.h>
 
 #include <mach/bcm2835_soc.h>
 

@@ -34,14 +34,6 @@ void __init bcm2835_map_io(void)
 	iotable_init(&io_map, 1);
 }
 
-void __init bcm2835_init_irq(void)
-{
-}
-
-asmlinkage void __exception_irq_entry bcm2835_handle_irq(struct pt_regs *regs)
-{
-}
-
 void __init bcm2835_init(void)
 {
 	int ret;

index 324e958..dbdefa3 100644
@@ -154,4 +154,6 @@ source "drivers/vme/Kconfig"
 
 source "drivers/pwm/Kconfig"
 
+source "drivers/irqchip/Kconfig"
+
 endmenu

index d64a0f7..f776bd6 100644
@@ -6,6 +6,7 @@
 #
 
 obj-y				+= bus/
+obj-y				+= irqchip/
 
 # GPIO must come after pinctrl as gpios may need to mux pins etc
 obj-y				+= pinctrl/

new file mode 100644
index 0000000..e69de29

new file mode 100644
index 0000000..054321d
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o

new file mode 100644
index 0000000..48a859b
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_IRQCHIP_BCM2835_H_
+#define __LINUX_IRQCHIP_BCM2835_H_
+
+#include <asm/exception.h>
+
+extern void bcm2835_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry bcm2835_handle_irq(
+	struct pt_regs *regs);
+
+#endif

1.7.9.5

From: Simon Arlott <[email protected]>

The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values, and generates an interrupt.

Timer 3 is used as the Linux timer.

The BCM2835 also contains an SP804-based timer module. However, it apparently has significant differences from the standard SP804 IP block, and Broadcom's documentation recommends using the system timer instead.

This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved to drivers/clocksource/. This looks like the desired location for such code now.
* Added DT binding docs.
* Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more.
* Simplified bcm2835_time_init() to find one matching node and operate on it, rather than looping over all matching nodes. This seems more consistent with other clocksource code.
* Simplified bcm2835_time_init() using of_iomap().
* Renamed struct bcm2835_timer.index to match_mask to better represent its purpose.
* s/printk(PR_INFO/pr_info(/

---
v4:
* Simplified bcm2835_time_init() using of_iomap().
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix. v3:
* New patch.

---
 .../bindings/timer/brcm,bcm2835-system-timer.txt   |   22 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |    7 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   10 +-
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/bcm2835_timer.c                |  161 ++++++++++++++++++++
 include/linux/bcm2835_timer.h                      |   22 +++
 6 files changed, 214 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
 create mode 100644 drivers/clocksource/bcm2835_timer.c
 create mode 100644 include/linux/bcm2835_timer.h

new file mode 100644
index 0000000..a0b727f
@@ -0,0 +1,22 @@
+BCM2835 System Timer
+
+The System Timer peripheral provides four 32-bit timer channels and a
+single 64-bit free running counter. Each channel has an output compare
+register, which is compared against the 32 least significant bits of the
+free running counter values, and generates an interrupt.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-system-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+	compatible = "brcm,bcm2835-system-timer";
+	reg = <0x20003000 0x1000>;
+	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+	clock-frequency = <1000000>;
+};

index 33e8d533..c7ac399 100644
@@ -9,6 +9,13 @@
 		bootargs = "earlyprintk";
 	};
 
+	timer {
+		compatible = "brcm,bcm2835-system-timer";
+		reg = <0x20003000 0x1000>;
+		interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+		clock-frequency = <1000000>;
+	};
+
 	intc: interrupt-controller {
 		compatible = "brcm,bcm2835-armctrl-ic";
 		reg = <0x2000b200 0x200>;

index 72c4b5f..e3f2968 100644
@@ -15,10 +15,10 @@
 #include <linux/init.h>
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
+#include <linux/bcm2835_timer.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 
 #include <mach/bcm2835_soc.h>
 

@@ -46,14 +46,6 @@ void __init bcm2835_init(void)
 	}
 }
 
-static void __init bcm2835_timer_init(void)
-{
-}
-
-struct sys_timer bcm2835_timer = {
-	.init = bcm2835_timer_init
-};
-
 static const char * const bcm2835_compat[] = {
 	"brcm,bcm2835",
 	NULL

index 6591990..cccde85 100644
@@ -14,3 +14,4 @@ obj-$(CONFIG_DW_APB_TIMER_OF)	+= dw_apb_timer_of.o
 obj-$(CONFIG_CLKSRC_DBX500_PRCMU)	+= clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
 obj-$(CONFIG_CLKSRC_ARM_GENERIC)	+= arm_generic.o
+obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o

new file mode 100644
index 0000000..25680fe
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM2835_TIMER_H
+#define __BCM2835_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer bcm2835_timer;
+
+#endif

1.7.9.5

From: Simon Arlott <[email protected]>

This patch adds a minimal stub clock driver for the BCM2835. Its sole purpose is to allow the PL011 AMBA clk_get() API calls to provide something that looks enough like a clock that the driver probes and operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/clk/.
* Modified .dev_id for UART clocks to match UART DT node names.

--
v4:
* Moved implementation to drivers/clk/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.

---
 arch/arm/mach-bcm2835/bcm2835.c |    3 +++
 drivers/clk/Makefile            |    1 +
 drivers/clk/clk-bcm2835.c       |   52 +++++++++++++++++++++++++++++++++++++++
 include/linux/clk/bcm2835.h     |   24 ++++++++++++++++++
 4 files changed, 80 insertions(+)
 create mode 100644 drivers/clk/clk-bcm2835.c
 create mode 100644 include/linux/clk/bcm2835.h

index e3f2968..f6fea49 100644
@@ -16,6 +16,7 @@
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
+#include <linux/clk/bcm2835.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>

@@ -38,6 +39,8 @@ void __init bcm2835_init(void)
 {
 	int ret;
 
+	bcm2835_init_clocks();
+
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
 				   NULL);
 	if (ret) {

index 6492651..f3e828c 100644
@@ -3,6 +3,7 @@ obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \
 				   clk-mux.o clk-divider.o clk-fixed-factor.o
 # SoCs specific
+obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_ARCH_NOMADIK)	+= clk-nomadik.o
 obj-$(CONFIG_ARCH_HIGHBANK)	+= clk-highbank.o
 obj-$(CONFIG_ARCH_MXS)		+= mxs/

new file mode 100644
index 0000000..aa937f6
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_BCM2835_H_
+#define __LINUX_CLK_BCM2835_H_
+
+void __init bcm2835_init_clocks(void);
+
+#endif

1.7.9.5

From: Simon Arlott <[email protected]>

This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Modified UART DT node to use a unit-address to create unique UART node names, rather than using non-type names "uart0" and "uart1". Note that UART 1 (the Broadcom "mini UART") is not yet present, but I'm naming the DT node in anticipation that it will be added.

--
v4:
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix. v3:
* New patch.

---
 arch/arm/boot/dts/bcm2835.dtsi |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

index c7ac399..e837780 100644
@@ -6,7 +6,7 @@
 	interrupt-parent = <&intc>;
 
 	chosen {
-		bootargs = "earlyprintk";
+		bootargs = "earlyprintk console=ttyAMA0";
 	};
 
 	timer {

@@ -22,4 +22,11 @@
 		interrupt-controller;
 		#interrupt-cells = <2>;
 	};
+
+	uart at 20201000 {
+		compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+		reg = <0x20201000 0x1000>;
+		interrupts = <2 25>;
+		clock-frequency = <3000000>;
+	};
 };

1.7.9.5

Just looked at that document. Funny how they actually put details about the kernel implementation (the static mapping address) into a hardware manual.

This had escaped me so far. I think we should put this into the device tree so that the representation of devices in the .dts file matches the one in the manual, like this

	vc-bus {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x20000000 0x7e000000 0x02000000>;

		other devices {

		};
	};


	Arnd

Yes. I keep hoping they'll fix this and re-issue the document. Dom, what do you think that chances are of that?

I guess I can see the advantage of having the .dts reg values match the documentation. I just worry that doing so is more about matching the documentation rather than describing the true HW. Still, I suppose with the ranges property, it's clear what the true physical addresses are.. It also introduces a completely fake bus just to perform the address re-writing; I wonder if putting the ranges property at the top-level node work instead?.

So now that almost everything is ack'd, how should this get into the tree - will you take (an updated version of) these patches and apply them directly to arm-soc, or should I commit them and send a pull request? (For the latter, I'd have to look up how to create a new k.org git repo).

Thanks for the reviews.

I don't think it easily works with the reg property in the root. Having a node for the "soc" components isn't all that unusual, a bunch of other platforms do that.

The advantage is that we have something to conceptually group all the on-chip components, and it works with the infrastructure in drivers/base/soc.c.

We can do whatever suits you best. Pull requests are slightly faster to import. It's also ok if you use the linux-tegra git this time fi that helps you.

Arnd