ARM: Add Altera SOCFPGA Cyclone5
Subsystems (2)
PATCH v3 1/1 ARM: Add Altera SOCFPGA Cyclone5
From: Dinh Nguyen <[email protected]>
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6 Test building edminiv2_config and km_kirkwood_config w/o errors.
Signed-off-by Dinh Nguyen <[email protected]>
Signed-off-by Chin Liang See <[email protected]>
Signed-off-by Pavel Machek <[email protected]>
--- MAINTAINERS | 5 + arch/arm/cpu/armv7/socfpga/Makefile | 51 ++++ arch/arm/cpu/armv7/socfpga/config.mk | 16 ++ arch/arm/cpu/armv7/socfpga/lowlevel_init.S | 77 +++++++ arch/arm/cpu/armv7/socfpga/misc.c | 54 +++++ arch/arm/cpu/armv7/socfpga/spl.c | 48 ++++ arch/arm/cpu/armv7/socfpga/timer.c | 105 +++++++++ arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 57 +++++ arch/arm/include/asm/arch-kirkwood/cpu.h | 1 - arch/arm/include/asm/arch-orion5x/cpu.h | 1 - arch/arm/include/asm/arch-socfpga/reset_manager.h | 36 +++ .../include/asm/arch-socfpga/socfpga_base_addrs.h | 27 +++ arch/arm/include/asm/arch-socfpga/spl.h | 26 ++ arch/arm/include/asm/arch-socfpga/timer.h | 29 +++ board/altera/socfpga_cyclone5/Makefile | 50 ++++ board/altera/socfpga_cyclone5/socfpga_cyclone5.c | 85 +++++++ boards.cfg | 1 + include/common.h | 2 +- include/configs/socfpga_cyclone5.h | 240 ++++++++++++++++++++ 19 files changed, 908 insertions(+), 3 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/Makefile create mode 100644 arch/arm/cpu/armv7/socfpga/config.mk create mode 100644 arch/arm/cpu/armv7/socfpga/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/socfpga/misc.c create mode 100644 arch/arm/cpu/armv7/socfpga/spl.c create mode 100644 arch/arm/cpu/armv7/socfpga/timer.c create mode 100644 arch/arm/cpu/armv7/socfpga/u-boot-spl.lds create mode 100644 arch/arm/include/asm/arch-socfpga/reset_config.h create mode 100644 arch/arm/include/asm/arch-socfpga/reset_manager.h create mode 100644 arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h create mode 100644 arch/arm/include/asm/arch-socfpga/spl.h create mode 100644 arch/arm/include/asm/arch-socfpga/timer.h create mode 100644 board/altera/socfpga_cyclone5/Makefile create mode 100644 board/altera/socfpga_cyclone5/socfpga_cyclone5.c create mode 100644 include/configs/socfpga_cyclone5.h
MAINTAINERS +5 -0
@@ -765,6 +765,11 @@ Nagendra T S <[email protected]> am3517_crane ARM ARMV7 (AM35x SoC) +Dinh Nguyen <[email protected]> +Chin Liang See <[email protected]> + + socfpga socfpga_cyclone5 + Kyungmin Park <[email protected]> apollon ARM1136EJS
arch/arm/cpu/armv7/socfpga/Makefile new file +51 -0
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arch/arm/cpu/armv7/socfpga/config.mk new file +16 -0
@@ -0,0 +1,16 @@ +# +# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed "as is" WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +ifndef CONFIG_SPL_BUILD +ALL-y += $(obj)u-boot.img +endif
arch/arm/cpu/armv7/socfpga/lowlevel_init.S new file +77 -0
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arch/arm/cpu/armv7/socfpga/misc.c new file +54 -0
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arch/arm/cpu/armv7/socfpga/spl.c new file +48 -0
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arch/arm/cpu/armv7/socfpga/timer.c new file +105 -0
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arch/arm/cpu/armv7/socfpga/u-boot-spl.lds new file +57 -0
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arch/arm/include/asm/arch-kirkwood/cpu.h +0 -1
@@ -155,7 +155,6 @@ struct kwgpio_registers {/* * functions */ -void reset_cpu (unsigned long ignored);unsigned char get_random_hex (void );unsigned int kw_sdram_bar (enum memory_bank bank);unsigned int kw_sdram_bs (enum memory_bank bank);
arch/arm/include/asm/arch-orion5x/cpu.h +0 -1
@@ -251,7 +251,6 @@ struct orion5x_ddr_addr_decode_registers {/* * functions */ -void reset_cpu (unsigned long ignored);u32 orion5x_device_id (void );u32 orion5x_device_rev (void );unsigned int orion5x_winctrl_calcsize (unsigned int sizeval);
arch/arm/include/asm/arch-socfpga/reset_config.h new file +0 -0
arch/arm/include/asm/arch-socfpga/reset_manager.h new file +36 -0
@@ -0,0 +1,36 @@ +/* +* Copyright (C) 2012 Altera Corporation <www.altera.com> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef _RESET_MANAGER_H_ +#define _RESET_MANAGER_H_ + +void reset_deassert_peripherals_handoff (void ); + +struct socfpga_reset_manager { +u32 padding1; +u32 ctrl; +u32 padding2; +u32 padding3; +u32 mpu_mod_reset; +u32 per_mod_reset; +u32 per2_mod_reset; +u32 brg_mod_reset; +}; + +#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 + +#endif /* _RESET_MANAGER_H_ */
arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h new file +27 -0
@@ -0,0 +1,27 @@ +/* +* Copyright (C) 2012 Altera Corporation <www.altera.com> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef _SOCFPGA_BASE_ADDRS_H_ +#define _SOCFPGA_BASE_ADDRS_H_ + +#define SOCFPGA_L3REGS_ADDRESS 0xff800000 +#define SOCFPGA_UART0_ADDRESS 0xffc02000 +#define SOCFPGA_UART1_ADDRESS 0xffc03000 +#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 +#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 + +#endif /* _SOCFPGA_BASE_ADDRS_H_ */
arch/arm/include/asm/arch-socfpga/spl.h new file +26 -0
@@ -0,0 +1,26 @@ +/* +* Copyright (C) 2012 Pavel Machek <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef _SOCFPGA_SPL_H_ +#define _SOCFPGA_SPL_H_ + +/* Symbols from linker script */ +extern void __malloc_start, __malloc_end, __stack_start; + +#define BOOT_DEVICE_RAM 1 + +#endif
arch/arm/include/asm/arch-socfpga/timer.h new file +29 -0
@@ -0,0 +1,29 @@ +/* +* Copyright (C) 2012 Altera Corporation <www.altera.com> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef _SOCFPGA_TIMER_H_ +#define _SOCFPGA_TIMER_H_ + +struct socfpga_timer { +u32 load_val; +u32 curr_val; +u32 ctrl; +u32 eoi; +u32 int_stat; +}; + +#endif
board/altera/socfpga_cyclone5/Makefile new file +50 -0
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board/altera/socfpga_cyclone5/socfpga_cyclone5.c new file +85 -0
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boards.cfg +1 -0
@@ -261,6 +261,7 @@ seaboard arm armv7 seaboard nvidia ventana arm armv7 ventana nvidia tegra2 whistler arm armv7 whistler nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 +socfpga_cyclone5 arm armv7 socfpga_cyclone5 altera socfpga actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8
include/common.h +1 -1
@@ -582,7 +582,7 @@ int checkicache (void);int checkdcache (void );void upmconfig (unsigned int ,unsigned int *,unsigned int );ulong get_tbclk (void ); -void reset_cpu (ulong addr); +void reset_cpu (ulong addr) __attribute__((noreturn));#if defined (CONFIG_OF_LIBFDT ) && defined (CONFIG_OF_BOARD_SETUP )void ft_cpu_setup (void *blob,bd_t *bd);#ifdef CONFIG_PCI
include/configs/socfpga_cyclone5.h new file +240 -0
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Signature · 1 line
1.7.7.4
PATCH v3 1/1 ARM: Add Altera SOCFPGA Cyclone5
Dear dinguyen at altera.com,
Quoted 7 lines
From: Dinh Nguyen <[email protected]>
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6 Test building
edminiv2_configandkm_kirkwood_configw/o errors.
This doesn't belong into the commit message.
Quoted 31 lines
Signed-off-by Dinh Nguyen <[email protected]>Signed-off-by Chin Liang See <[email protected]>Signed-off-by Pavel Machek <[email protected]>--- MAINTAINERS | 5 + arch/arm/cpu/armv7/socfpga/Makefile | 51 ++++ arch/arm/cpu/armv7/socfpga/config.mk | 16 ++ arch/arm/cpu/armv7/socfpga/lowlevel_init.S | 77 +++++++ arch/arm/cpu/armv7/socfpga/misc.c | 54 +++++ arch/arm/cpu/armv7/socfpga/spl.c | 48 ++++ arch/arm/cpu/armv7/socfpga/timer.c | 105 +++++++++ arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 57 +++++ arch/arm/include/asm/arch-kirkwood/cpu.h | 1 - arch/arm/include/asm/arch-orion5x/cpu.h | 1 - arch/arm/include/asm/arch-socfpga/reset_manager.h | 36 +++ .../include/asm/arch-socfpga/socfpga_base_addrs.h | 27 +++ arch/arm/include/asm/arch-socfpga/spl.h | 26 ++ arch/arm/include/asm/arch-socfpga/timer.h | 29 +++ board/altera/socfpga_cyclone5/Makefile | 50 ++++ board/altera/socfpga_cyclone5/socfpga_cyclone5.c | 85 +++++++ boards.cfg | 1 + include/common.h | 2 +- include/configs/socfpga_cyclone5.h | 240 ++++++++++++++++++++ 19 files changed, 908 insertions(+), 3 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/Makefile create mode 100644 arch/arm/cpu/armv7/socfpga/config.mk create mode 100644 arch/arm/cpu/armv7/socfpga/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/socfpga/misc.c create mode 100644 arch/arm/cpu/armv7/socfpga/spl.c create mode 100644 arch/arm/cpu/armv7/socfpga/timer.c create mode 100644 arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
Quoted 8 lines
create mode 100644 arch/arm/include/asm/arch-socfpga/reset_config.h create mode 100644 arch/arm/include/asm/arch-socfpga/reset_manager.h create mode 100644 arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h create mode 100644 arch/arm/include/asm/arch-socfpga/spl.h create mode 100644 arch/arm/include/asm/arch-socfpga/timer.h create mode 100644 board/altera/socfpga_cyclone5/Makefile create mode 100644 board/altera/socfpga_cyclone5/socfpga_cyclone5.c create mode 100644 include/configs/socfpga_cyclone5.h
This is a V3, what are the changes from V2?
Read up http://www.denx.de/wiki/U-Boot/Patches
Otherwise it seems ok :)
[...]
PATCH v3 1/1 ARM: Add Altera SOCFPGA Cyclone5
Hi Marek,
Quoted 11 lines · Marek Vasut
Dear dinguyen at altera.com,
Quoted 7 lines
From: Dinh Nguyen <[email protected]>
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6 Test building
edminiv2_configandkm_kirkwood_configw/o errors.This doesn't belong into the commit message.
Will split out per Tom's comments in v4.
Quoted 41 lines
Quoted 32 lines
Signed-off-by Dinh Nguyen <[email protected]>Signed-off-by Chin Liang See <[email protected]>Signed-off-by Pavel Machek <[email protected]>--- MAINTAINERS | 5 + arch/arm/cpu/armv7/socfpga/Makefile | 51 ++++ arch/arm/cpu/armv7/socfpga/config.mk | 16 ++ arch/arm/cpu/armv7/socfpga/lowlevel_init.S | 77 +++++++ arch/arm/cpu/armv7/socfpga/misc.c | 54 +++++ arch/arm/cpu/armv7/socfpga/spl.c | 48 ++++ arch/arm/cpu/armv7/socfpga/timer.c | 105 +++++++++ arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 57 +++++ arch/arm/include/asm/arch-kirkwood/cpu.h | 1 - arch/arm/include/asm/arch-orion5x/cpu.h | 1 - arch/arm/include/asm/arch-socfpga/reset_manager.h | 36 +++ .../include/asm/arch-socfpga/socfpga_base_addrs.h | 27 +++ arch/arm/include/asm/arch-socfpga/spl.h | 26 ++ arch/arm/include/asm/arch-socfpga/timer.h | 29 +++ board/altera/socfpga_cyclone5/Makefile | 50 ++++ board/altera/socfpga_cyclone5/socfpga_cyclone5.c | 85 +++++++ boards.cfg | 1 + include/common.h | 2 +- include/configs/socfpga_cyclone5.h | 240 ++++++++++++++++++++ 19 files changed, 908 insertions(+), 3 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/Makefile create mode 100644 arch/arm/cpu/armv7/socfpga/config.mk create mode 100644 arch/arm/cpu/armv7/socfpga/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/socfpga/misc.c create mode 100644 arch/arm/cpu/armv7/socfpga/spl.c create mode 100644 arch/arm/cpu/armv7/socfpga/timer.c create mode 100644 arch/arm/cpu/armv7/socfpga/u-boot-spl.ldsQuoted 8 lines
create mode 100644 arch/arm/include/asm/arch-socfpga/reset_config.h create mode 100644 arch/arm/include/asm/arch-socfpga/reset_manager.h create mode 100644 arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h create mode 100644 arch/arm/include/asm/arch-socfpga/spl.h create mode 100644 arch/arm/include/asm/arch-socfpga/timer.h create mode 100644 board/altera/socfpga_cyclone5/Makefile create mode 100644 board/altera/socfpga_cyclone5/socfpga_cyclone5.c create mode 100644 include/configs/socfpga_cyclone5.h
Quoted 1 line
This is a V3, what are the changes from V2?
Outside of this comment "__noreturn attribute to reset_cpu()", were there others?
Thanks for the review.
Dinh
Quoted 7 lines
Read up http://www.denx.de/wiki/U-Boot/Patches
Otherwise it seems ok :)
[...]
PATCH v3 1/1 ARM: Add Altera SOCFPGA Cyclone5
In reply to dinguyen at altera.comQuoted 3 lines · dinguyen at altera.com
From: Dinh Nguyen <[email protected]>
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
[snip]
arch/arm/cpu/armv7/socfpga/misc.c line 30
Quoted 4 lines
arch/arm/cpu/armv7/socfpga/misc.c new file +4
-0+/* +* Write the reset manager register to cause reset +*/ +__attribute__((noreturn))void reset_cpu (ulong addr)
Please add <linux/compiler.h> to the file and use __noreturn, thanks (but when adding the prototype to include/common.h spell it out like this, this is a known issue atm, we can't use <linux/compiler.h> in <common.h> right now).
Quoted 17 lines
arch/arm/include/asm/arch-kirkwood/cpu.h +0
-1@@ -155,7 +155,6 @@ struct kwgpio_registers {/* * functions */ -void reset_cpu (unsigned long ignored);unsigned char get_random_hex (void );unsigned int kw_sdram_bar (enum memory_bank bank);unsigned int kw_sdram_bs (enum memory_bank bank);arch/arm/include/asm/arch-orion5x/cpu.h +0
-0
arch/arm/include/asm/arch-orion5x/cpu.h struct orion5x_ddr_addr_decode_registers { · line 256
Quoted 7 lines
arch/arm/include/asm/arch-orion5x/cpu.h +0
-1@@ -251,7 +251,6 @@ struct orion5x_ddr_addr_decode_registers {/* * functions */ -void reset_cpu (unsigned long ignored);u32 orion5x_device_id (void );u32 orion5x_device_rev (void );unsigned int orion5x_winctrl_calcsize (unsigned int sizeval);
The reset_cpu bugfix (which I am glad you're doing) needs to be a separate patch. Thanks!
Signature · 8 lines
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