: powerpc/perf: Sample only if SIAR-Valid bit is set in P7+
PATCH v4 1/1 : powerpc/perf: Sample only if SIAR-Valid bit is set in P7+
powerpc/perf: Sample only if SIAR-Valid bit is set in P7+
On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the contents of SIAR and SDAR are valid.
For marked instructions on P7+, we must save the contents of SIAR and SDAR registers only if these new bits are set.
This code/check for the SIAR-Valid bit is specific to P7+, so rather than waste a CPU-feature bit use the PVR flag.
Note that Carl Love proposed a similar change for oprofile:
https://lkml.org/lkml/2012/6/22/309
Changelog [v4]:
- Port to powerpc/next branch - where PV_POWER7p is now PVR_POWER7p and __is_processor() is now pvr_version_is()
- Ensure patch doesn't break 32-bit build.
Changelog[v3]:
- Commit 5c093efa6f2 added checks to use SIAR only for kernel samples. Extend that to use SIAR only if SIAR-valid bit is set (in processors that implement that bit).
Changelog[v2]:
- [Gabriel Paubert] Rename PV_POWER7P to PV_POWER7p.
--- arch/powerpc/include/asm/perf_event_server.h | 1 + arch/powerpc/include/asm/reg.h | 4 ++ arch/powerpc/perf/core-book3s.c | 44 ++++++++++++++++++++++--- arch/powerpc/perf/power7-pmu.c | 3 ++ 4 files changed, 46 insertions(+), 6 deletions(-)
arch/powerpc/include/asm/perf_event_server.h +1 -0
@@ -49,6 +49,7 @@ struct power_pmu {#define PPMU_ALT_SIPR 2/* uses alternate posn for SIPR/HV */ #define PPMU_NO_SIPR 4/* no SIPR/HV in MMCRA at all */ #define PPMU_NO_CONT_SAMPLING 8/* no continuous sampling */ +#define PPMU_SIAR_VALID 16/* Processor has SIAR Valid bit */ /* * Values for flags to get_alternatives()
arch/powerpc/include/asm/reg.h +4 -0
@@ -606,6 +606,10 @@#define POWER6_MMCRA_SIPR 0x0000020000000000ULL#define POWER6_MMCRA_THRM 0x00000020UL#define POWER6_MMCRA_OTHER 0x0000000EUL + +#define POWER7P_MMCRA_SIAR_VALID 0x10000000/* P7+ SIAR contents valid */ +#define POWER7P_MMCRA_SDAR_VALID 0x08000000/* P7+ SDAR contents valid */ +#define SPRN_PMC1 787#define SPRN_PMC2 788#define SPRN_PMC3 789
arch/powerpc/perf/core-book3s.c +38 -6
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arch/powerpc/perf/power7-pmu.c +3 -0
@@ -373,6 +373,9 @@ static int __init init_power7_pmu(void) strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power7")) return -ENODEV; +if (pvr_version_is (PVR_POWER7p)) + power7_pmu.flags |=PPMU_SIAR_VALID ; +return register_power_pmu (&power7_pmu); }
Signature · 1 line
1.7.1