iPAQ h2200 support

Signed-off-by ?ukasz Da?ek <[email protected]>

---
 arch/arm/include/asm/mach-types.h |    1 +
 board/h2200/Makefile              |   51 ++++++++++
 board/h2200/h2200-header.S        |   27 +++++
 board/h2200/h2200.c               |  197
+++++++++++++++++++++++++++++++++++++ board/h2200/h2200.h               | 
 28 +++++
 boards.cfg                        |    2 +
 include/configs/h2200.h           |  168 +++++++++++++++++++++++++++++++
 7 files changed, 474 insertions(+), 0 deletions(-)
 create mode 100644 board/h2200/Makefile
 create mode 100644 board/h2200/h2200-header.S
 create mode 100644 board/h2200/h2200.c
 create mode 100644 board/h2200/h2200.h
 create mode 100644 include/configs/h2200.h

(quoted diff) +0 -0

b/arch/arm/include/asm/mach-types.h index 2d5c3bc..b03f385 100644

board/h2200/Makefile new file +2 -0

+	.org 0x1000 - 1
+	.byte 0x0

board/h2200/h2200.c new file +18 -0

new file mode 100644
index 0000000..d31c67f
@@ -0,0 +1,197 @@
+/*
+ * iPAQ h2200 board configuration
+ *
+ * Copyright (C) 2012 ?ukasz Da?ek <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 

USA + */

board/h2200/h2200.c new file +12 -0

+
+#include <common.h>
+#include <asm/arch/pxa.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/io.h>
+#include "h2200.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_H2200_USBETH
+int board_eth_init(bd_t *bis)
+{

include/configs/h2200.h new file +34 -0

+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_CPU_PXA25X		1
+#define CONFIG_BOARD_H2200		1
+
+#define CONFIG_SYS_NO_FLASH		1
+
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM_1			0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE		0x04000000 /* 64 MB */
+
+#define CONFIG_SYS_DRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_DRAM_SIZE		PHYS_SDRAM_1_SIZE
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR		0xfffff800
+
+#define CONFIG_ENV_SIZE			0x00040000
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
+
+#define CONFIG_ENV_IS_NOWHERE		1
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_LOAD_ADDR		0xa3000000 /* default load address */
+
+/*
+ * iPAQ 1st stage bootloader loads 2nd stage bootloader
+ * at address 0xa0040000 but bootloader requires header
+ * which is 0x1000 long.
+ *
+ * --- Header begin ---
+ *	.word 0xea0003fe ; b 0x1000

include/configs/h2200.h new file +42 -0

+/*
+ * USB device configuration
+ */
+
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
+#define CONFIG_USB_DEV_PULLUP_GPIO	33
+/* USB VBUS GPIO 3 */
+
+#define CONFIG_CMD_LOADB		1
+#define CONFIG_CMD_IMPORTENV		1
+#define CONFIG_CMD_SOURCE		1
+#define CONFIG_CMD_RUN			1
+#define CONFIG_CMD_IMI			1
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT		"> "
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		256
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
+
+#ifdef CONFIG_H2200_USBETH
+# define CONFIG_USB_ETH_SUBSET		1
+# define CONFIG_SYS_HUSH_PARSER		1
+# define CONFIG_SYS_PROMPT_HUSH_PS2	"$ "
+
+# define CONFIG_CMD_NET			1
+# define CONFIG_CMD_PING		1
+
+# define CONFIG_BOOTDELAY		2
+
+# define CONFIG_BOOTCOMMAND		\
+	"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
+	"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
+	"source :script ; " \
+	"bootm ; "
+

include/configs/h2200.h new file +7 -0

+# define CONFIG_EXTRA_ENV_SETTINGS \
+	"stdin=serial\0" \
+	"stdout=serial\0" \
+	"stderr=serial\0"
+#endif
+
+#endif /* __CONFIG_H */

Quoted 5 lines

board/h2200/h2200-header.S line 24

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board/h2200/h2200-header.S new file +3 -0

+
+	.org 0x40
+	.ascii "ECEC"

ECEC ... looks familiar, what is it though? WinCE bootloader signature ?

Yes.

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board/h2200/h2200.c new file +5 -0

+#endif
+
+	return 0;
+}
+

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+/*
+ * iPAQ h2200 has two stage bootloader.
+ * We only replace 2nd stage, so u-boot needs to be
+ * adpopted to the way how 1st stage bootloader works.
+ * Firstly, code needs to have first 4 bytes equal to
+ * 0xea0003fe (arm instruction b 0x1000)

GCC/GAS won't generate it so you use .word ?

No. GCC generates sth else than 0xea0003fe.

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board/h2200/h2200.c

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board/h2200/h2200.c new file +11 -0

+#endif
+
+	return 0;
+}
+
+/*
+ * iPAQ h2200 has two stage bootloader.
+ * We only replace 2nd stage, so u-boot needs to be
+ * adpopted to the way how 1st stage bootloader works.
+ * Firstly, code needs to have first 4 bytes equal to
+ * 0xea0003fe (arm instruction b 0x1000)

GCC/GAS won't generate it so you use .word ?

Quoted 1 line

No. GCC generates sth else than 0xea0003fe.

Try b 0x9098 ... is that it ?

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board/h2200/h2200.c

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board/h2200/h2200.c new file +11 -0

+#endif
+
+	return 0;
+}
+
+/*
+ * iPAQ h2200 has two stage bootloader.
+ * We only replace 2nd stage, so u-boot needs to be
+ * adpopted to the way how 1st stage bootloader works.
+ * Firstly, code needs to have first 4 bytes equal to
+ * 0xea0003fe (arm instruction b 0x1000)

GCC/GAS won't generate it so you use .word ?

Quoted 3 lines

Quoted 1 line

No. GCC generates sth else than 0xea0003fe.

Try b 0x9098 ... is that it ?

Yes, GCC/GAS generate 0xeafffffe (b 0x9098).

Can you tell me why? Can I left .word?

?ukasz Da?ek

Yes, GCC/GAS generate 0xeafffffe (b 0x9098).

Can you tell me why? Can I left .word?
Why is the jump offset 0x9098 ?

Quoted 4 lines

Yes, GCC/GAS generate 0xeafffffe (b 0x9098).

Can you tell me why? Can I left .word?
Why is the jump offset 0x9098 ?

I figured out that 0xeafffffe is a loop (b -4)

but I don't know
why toolchain generate b -4 instead of b 0x1000 and I don't know how to fix it (without .word).

?ukasz Da?ek

Dear ?ukasz Da?ek,

Quoted 5 lines · Marek Vasut

Quoted 4 lines

Yes, GCC/GAS generate 0xeafffffe (b 0x9098).

Can you tell me why? Can I left .word?
Why is the jump offset 0x9098 ?

Quoted 1 line

I figured out that 0xeafffffe is a loop (b -4)

ldr pc, pc, #-4

Quoted 3 lines

but I don't know
why toolchain generate b -4 instead of b 0x1000 and I don't know how to fix it (without .word).

I don't follow, sorry. How did you even get to 0xeafffffe ?

Quoted 12 lines

Dear ?ukasz Da?ek,

Quoted 7 lines · Marek Vasut

Quoted 4 lines

Yes, GCC/GAS generate 0xeafffffe (b 0x9098).

Can you tell me why? Can I left .word?
Why is the jump offset 0x9098 ?

I figured out that 0xeafffffe is a loop (b -4)

ldr pc, pc, #-4

Quoted 5 lines

Quoted 3 lines

but I don't know
why toolchain generate b -4 instead of b 0x1000 and I don't know how to fix it (without .word).

I don't follow, sorry. How did you even get to 0xeafffffe ?

My point is that GCC/GAS generate 0xeafffffe instead of 0xea0003fe when I use 'b 0x1000'.

That's why I use directive .word 0xea0003fe

instead of
asm instruction 'b 0x1000'. But I don't know that: Can I leave that .word directive or I can not.

Another question: I asked in cover letter question about tools. Can I add them in h2200 directory or should I put them somwhere else?

?ukasz Da?ek

Quoted 1 line

That's why I use directive .word 0xea0003fe

Check some arm instruction quick ref for what 0xea0003fe really is and if it really is necessary or anything else work just fine as well.

Quoted 6 lines

instead of
asm instruction 'b 0x1000'. But I don't know that: Can I leave that .word directive or I can not.

Another question: I asked in cover letter question about tools. Can I add them in h2200 directory or should I put them somwhere else?

I didn't receive the cover letter.

Quoted 4 lines

Quoted 1 line

That's why I use directive .word 0xea0003fe

Check some arm instruction quick ref for what 0xea0003fe really is and if it really is necessary or anything else work just fine as well.

0xea0003fe is a branch instruction. 0x3fe is an offset (0x3fe << 2 + 8 = 0x1000)
And I will left it. Bootloader checks for 4 bytes which have to be equal 0xfe, 0x03, 0x00, 0xea and for 4 bytes at the offset 0x40 which have to be equal E, C, E, C

Quoted 8 lines

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instead of
asm instruction 'b 0x1000'. But I don't know that: Can I leave that .word directive or I can not.

Another question: I asked in cover letter question about tools. Can I add them in h2200 directory or should I put them somwhere else?

I didn't receive the cover letter.

Weird, I sent it with patches. With your address in CC field. Btw. Did you got all 6 patches?

?ukasz Da?ek

Dear ?ukasz Da?ek,

Quoted 4 lines · Marek Vasut

Quoted 3 lines

Quoted 1 line

That's why I use directive .word 0xea0003fe

Check some arm instruction quick ref for what 0xea0003fe really is and if it really is necessary or anything else work just fine as well.

Quoted 5 lines

0xea0003fe is a branch instruction. 0x3fe is an offset (0x3fe<< 2 + 8 = 0x1000)
And I will left it. Bootloader checks for 4 bytes which have to be equal 0xfe, 0x03, 0x00, 0xea and for 4 bytes at the offset 0x40 which have to be equal E, C, E, C

It checks the branch instruction? What a piece of crap ... can't you replace it as well?

Quoted 14 lines

Dear ?ukasz Da?ek,

Quoted 11 lines · Marek Vasut

Quoted 4 lines

Quoted 1 line

That's why I use directive .word 0xea0003fe

Check some arm instruction quick ref for what 0xea0003fe really is and if it really is necessary or anything else work just fine as well.

0xea0003fe is a branch instruction. 0x3fe is an offset (0x3fe<< 2 + 8 = 0x1000)
And I will left it. Bootloader checks for 4 bytes which have to be equal 0xfe, 0x03, 0x00, 0xea and for 4 bytes at the offset 0x40 which have to be equal E, C, E, C

Quoted 2 lines

It checks the branch instruction? What a piece of crap ... can't you replace it as well?

I can't. I would have to prepare sth like x-loader used in ti omap processors.

And I want to add driver for sdcard and flash and keyboard and lcd would be nice... So I will left it as it is for now.

?ukasz Da?ek

Dear ?ukasz Da?ek,

Quoted 12 lines · Marek Vasut

Quoted 11 lines

Dear ?ukasz Da?ek,

Quoted 9 lines · Marek Vasut

Quoted 3 lines

Quoted 1 line

That's why I use directive .word 0xea0003fe

Check some arm instruction quick ref for what 0xea0003fe really is and if it really is necessary or anything else work just fine as well.

0xea0003fe is a branch instruction. 0x3fe is an offset (0x3fe<< 2 + 8 =
0x1000)
And I will left it. Bootloader checks for 4 bytes which have to be equal 0xfe, 0x03, 0x00, 0xea and for 4 bytes at the offset 0x40 which have to be equal E, C, E, C

Quoted 4 lines

Quoted 2 lines

It checks the branch instruction? What a piece of crap ... can't you replace it as well?

I can't. I would have to prepare sth like x-loader used in ti omap processors.

What? Why?

Quoted 2 lines

And I want to add driver for sdcard and flash and keyboard and lcd would be nice... So I will left it as it is for now.

these drivers are already in uboot

Quoted 21 lines

Dear ?ukasz Da?ek,

Quoted 19 lines · Marek Vasut

Quoted 17 lines

Dear ?ukasz Da?ek,

Quoted 7 lines · Marek Vasut

Quoted 5 lines

Quoted 1 line

That's why I use directive .word 0xea0003fe

Check some arm instruction quick ref for what 0xea0003fe really is and if it really is necessary or anything else work just fine as well.

Quoted 5 lines

0xea0003fe is a branch instruction. 0x3fe is an offset (0x3fe<< 2 +
8 = 0x1000)
And I will left it. Bootloader checks for 4 bytes which have to be equal 0xfe, 0x03, 0x00, 0xea and for 4 bytes at the offset 0x40 which have to be equal E, C, E, C

It checks the branch instruction? What a piece of crap ... can't you replace it as well?

Quoted 4 lines

Quoted 2 lines

I can't. I would have to prepare sth like x-loader used in ti omap processors.

What? Why?

h2200 uses companion chip from Samsung.

When device is powered on
chip loads 16kb of flash into internal SRAM and PXA executes it. That program is 1st stage bootloader.

But u-boot for my device has ~180kb. So it's to big for SRAM.

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And I want to add driver for sdcard and flash and keyboard and lcd would be nice... So I will left it as it is for now.

these drivers are already in uboot

I haven't seen any MediaQ 1178 drivers (LCD).

Also SD card and FLASH controllers are embedded in companion chip.

Chip is based on S3C440 (or 410?) processor but needs some tweaks and tests.

?ukasz Da?ek

h2200 uses companion chip from Samsung.
OneNAND ?

Quoted 3 lines

When device is powered on
chip loads 16kb of flash into internal SRAM and PXA executes it. That program is 1st stage bootloader.

Check OneNAND SPL

Quoted 6 lines

But u-boot for my device has ~180kb. So it's to big for SRAM.

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Quoted 2 lines

And I want to add driver for sdcard and flash and keyboard and lcd would be nice... So I will left it as it is for now.

these drivers are already in uboot

I haven't seen any MediaQ 1178 drivers (LCD).

oh it has separate LCD or it uses PXA LCDIF ?

Quoted 1 line

Also SD card and FLASH controllers are embedded in companion chip.

ASIC3 ?

Quoted 2 lines

Chip is based on S3C440 (or 410?) processor but needs some tweaks and tests.

Uhhh ?

Quoted 8 lines

h2200 uses companion chip from Samsung.
OneNAND ?

Quoted 3 lines

When device is powered on
chip loads 16kb of flash into internal SRAM and PXA executes it. That program is 1st stage bootloader.

Check OneNAND SPL

I'm not sure I didn't checked yet.

Quoted 10 lines

Quoted 8 lines

But u-boot for my device has ~180kb. So it's to big for SRAM.

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Quoted 2 lines

And I want to add driver for sdcard and flash and keyboard and lcd would be nice... So I will left it as it is for now.

these drivers are already in uboot

I haven't seen any MediaQ 1178 drivers (LCD).

oh it has separate LCD or it uses PXA LCDIF ?

MQ1178 is a separate SoC.

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Also SD card and FLASH controllers are embedded in companion chip.

ASIC3 ?

Hamcop

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Chip is based on S3C440 (or 410?) processor but needs some tweaks and tests.

Uhhh ?

Hamcop chip looks like s3c2440 processor without ARM core and with internal data busses limited to 16bytes. Really weird and buggy thing.

?ukasz Da?ek

Dear ?ukasz Da?ek,

[ Joe, see the bottom of my babble here ]

include/configs/h2200.h line 161

Quoted 4 lines

include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER            1
+# define CONFIG_USBNET_DEV_ADDR              "de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR     "de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

Hi Marek,

Quoted 10 lines · Marek Vasut

Dear ?ukasz Da?ek,

[ Joe, see the bottom of my babble here ]

include/configs/h2200.h line 161

Quoted 4 lines

include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER            1
+# define CONFIG_USBNET_DEV_ADDR              "de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR     "de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

I certainly agree, in most cases. However, a USB Ethernet device is unique in that it is known to be 1 of only 2 devices on the network. Therefore conflicts are unlikely. The only source of conflicts is if there are more than one of these devices plugged into the same host, and even then I'm not sure that it's a problem, since the routing will have to choose an interface first anyway.

-Joe

Review

Quoted 8 lines

and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */

(quoted diff) +2 -0

+
+static inline void writelrb(uint32_t val, uint32_t addr)

Replace this with clrsetbits_le32()

board/h2200/h2200.c line 90

Quoted 8 lines

board/h2200/h2200.c new file +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

[...]

include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

Quoted 10 lines

Review

Quoted 8 lines

and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */

(quoted diff) +2 -0

+
+static inline void writelrb(uint32_t val, uint32_t addr)

Replace this with clrsetbits_le32()

I've copied writelrb and pxa2xx_dram_init from pxa2xx.c
and I think there is a reason why it's done that way and not by clrsetbits_le32. But if you insist I can replace all calls to writelrb by clrsetbits.

Quoted 11 lines

board/h2200/h2200.c line 90

Quoted 8 lines

board/h2200/h2200.c new file +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

Quoted 1 line

[...]

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

Quoted 5 lines

include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

So tell me how should I specify mac addresses? By EXTRA_ENV_SETTINGS?

?ukasz Da?ek

Dear ?ukasz Da?ek,

Quoted 10 lines · Marek Vasut

Quoted 9 lines

Review

Quoted 8 lines

and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */

(quoted diff) +2 -0

+
+static inline void writelrb(uint32_t val, uint32_t addr)

Replace this with clrsetbits_le32()

Quoted 4 lines

I've copied writelrb and pxa2xx_dram_init from pxa2xx.c
and I think there is a reason why it's done that way and not by clrsetbits_le32. But if you insist I can replace all calls to writelrb by clrsetbits.

And can you elaborate on the reason please?

(hint: clrsetbits() wasn't there by the time)

Quoted 10 lines

Quoted 10 lines

board/h2200/h2200.c line 90

Quoted 8 lines

board/h2200/h2200.c new file +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

Quoted 4 lines

Quoted 1 line

[...]

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

So don't reinit the memory at all, just skip this whole part.

Quoted 6 lines

Quoted 5 lines

include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

So tell me how should I specify mac addresses? By EXTRA_ENV_SETTINGS?

Joe explained it, your adapter doesn't carry it's own mac?

Quoted 19 lines

Dear ?ukasz Da?ek,

Quoted 16 lines · Marek Vasut

Quoted 10 lines

Review

Quoted 8 lines

and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */

(quoted diff) +2 -0

+
+static inline void writelrb(uint32_t val, uint32_t addr)

Replace this with clrsetbits_le32()

I've copied writelrb and pxa2xx_dram_init from pxa2xx.c
and I think there is a reason why it's done that way and not by clrsetbits_le32. But if you insist I can replace all calls to writelrb by clrsetbits.

Quoted 3 lines

And can you elaborate on the reason please?

(hint: clrsetbits() wasn't there by the time)

I don't know what was the reason. I didn't change becuse I didn't want to break it.

Quoted 13 lines

Quoted 13 lines

Quoted 12 lines

board/h2200/h2200.c line 90

Quoted 8 lines

board/h2200/h2200.c new file +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

[...]

Quoted 5 lines

Quoted 3 lines

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

So don't reinit the memory at all, just skip this whole part.

1st stage loader doesn't init everything (for example MSC).

Quoted 9 lines

Quoted 7 lines

Quoted 5 lines

include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

So tell me how should I specify mac addresses? By EXTRA_ENV_SETTINGS?

Joe explained it, your adapter doesn't carry it's own mac?

No.

?ukasz Da?ek

Dear ?ukasz Da?ek,

Quoted 17 lines · Marek Vasut

Quoted 16 lines

Dear ?ukasz Da?ek,

Quoted 14 lines · Marek Vasut

Quoted 9 lines

Review

Quoted 8 lines

and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */

(quoted diff) +2 -0

+
+static inline void writelrb(uint32_t val, uint32_t addr)

Replace this with clrsetbits_le32()

I've copied writelrb and pxa2xx_dram_init from pxa2xx.c
and I think there is a reason why it's done that way and not by clrsetbits_le32. But if you insist I can replace all calls to writelrb by clrsetbits.

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And can you elaborate on the reason please?

(hint: clrsetbits() wasn't there by the time)

I don't know what was the reason. I didn't change becuse I didn't want to break it.

If you have time, replace it with clrsetbits() please ... in the original file.

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board/h2200/h2200.c line 90

Quoted 8 lines

board/h2200/h2200.c new file +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

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[...]

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

So don't reinit the memory at all, just skip this whole part.

1st stage loader doesn't init everything (for example MSC).

So I checked ... every board calls the dram init on it's own in dram_init() ... so just don't do that.

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include/configs/h2200.h new file +4 -0

+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

So tell me how should I specify mac addresses? By EXTRA_ENV_SETTINGS?

Joe explained it, your adapter doesn't carry it's own mac?

No.

Then leave it in ?

Quoted 26 lines

Dear ?ukasz Da?ek,

Quoted 24 lines · Marek Vasut

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Dear ?ukasz Da?ek,

Quoted 12 lines · Marek Vasut

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Review

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and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */

(quoted diff) +2 -0

+
+static inline void writelrb(uint32_t val, uint32_t addr)

Replace this with clrsetbits_le32()

Quoted 4 lines

I've copied writelrb and pxa2xx_dram_init from pxa2xx.c
and I think there is a reason why it's done that way and not by clrsetbits_le32. But if you insist I can replace all calls to writelrb by clrsetbits.

And can you elaborate on the reason please?

(hint: clrsetbits() wasn't there by the time)

Quoted 5 lines

Quoted 2 lines

I don't know what was the reason. I didn't change becuse I didn't want to break it.

If you have time, replace it with clrsetbits() please ... in the original file.

In arch/arm/cpu/pxa/pxa2xx.c?

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Review

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(quoted diff) +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

Quoted 1 line

[...]

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

Quoted 6 lines

Quoted 3 lines

Quoted 1 line

So don't reinit the memory at all, just skip this whole part.

1st stage loader doesn't init everything (for example MSC).

So I checked ... every board calls the dram init on it's own in dram_init() ... so just don't do that.

Do what? Don't call modified pxa2xx_dram_init?

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(quoted diff) +4 -0

+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"

Definitelly not, any mac address setting should not be present, Joe ?

So tell me how should I specify mac addresses? By EXTRA_ENV_SETTINGS?

Joe explained it, your adapter doesn't carry it's own mac?

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No.

Then leave it in ?

leave CONFIG_USBNET_DEV_ADDR...?

?ukasz Da?ek

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Review

Quoted 8 lines

(quoted diff) +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

Quoted 4 lines

Quoted 1 line

[...]

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

So don't reinit the memory at all, just skip this whole part.

Quoted 4 lines

Quoted 3 lines

Quoted 1 line

1st stage loader doesn't init everything (for example MSC).

So I checked ... every board calls the dram init on it's own in dram_init() ... so just don't do that.

Do what? Don't call modified pxa2xx_dram_init?

What exactly do you need to do ? What registers do you need to set ? How come the bootloader kick dram in, but won't configure MSC ?

Split out the MSC config and memory config maybe ?

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Review

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(quoted diff) +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

[...]

Quoted 7 lines

Quoted 5 lines

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Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

So don't reinit the memory at all, just skip this whole part.

1st stage loader doesn't init everything (for example MSC).

So I checked ... every board calls the dram init on it's own in dram_init() ... so just don't do that.

Quoted 6 lines

Quoted 1 line

Do what? Don't call modified pxa2xx_dram_init?

What exactly do you need to do ? What registers do you need to set ? How come the bootloader kick dram in, but won't configure MSC ?

Split out the MSC config and memory config maybe ?

Ok, I will rewrite that.

?ukasz Da?ek

Dear ?ukasz Da?ek,

Quoted 19 lines · Marek Vasut

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Review

Quoted 8 lines

(quoted diff) +8 -0

+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)

Why do you duplicate it ?!

Quoted 6 lines

Quoted 5 lines

Quoted 4 lines

Quoted 1 line

[...]

Because code in pxa2xx.c disable and then re-enable memory. And u-boot is executed from memory (1st stage bootloder copied it there).

So don't reinit the memory at all, just skip this whole part.

1st stage loader doesn't init everything (for example MSC).

So I checked ... every board calls the dram init on it's own in dram_init() ... so just don't do that.

Quoted 6 lines

Quoted 5 lines

Quoted 1 line

Do what? Don't call modified pxa2xx_dram_init?

What exactly do you need to do ? What registers do you need to set ? How come the bootloader kick dram in, but won't configure MSC ?

Split out the MSC config and memory config maybe ?

Ok, I will rewrite that.

Just pull it out, but make sure you don't break the other boards ...

Signed-off-by ?ukasz Da?ek <[email protected]>

---
 drivers/usb/gadget/Makefile     |    1 +
 drivers/usb/gadget/pxa25x_udc.c | 2059
+++++++++++++++++++++++++++++++++++++++ drivers/usb/gadget/pxa25x_udc.h | 
162 +++
 3 files changed, 2222 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/gadget/pxa25x_udc.c
 create mode 100644 drivers/usb/gadget/pxa25x_udc.h

Quoted 5 lines

Dear ?ukasz Da?ek,

Patch description is missing ...

are there any changes since your last post?

Just fixed DEBUG_NOISY stuff

Signed-off-by ?ukasz Da?ek <[email protected]>

---
 arch/arm/cpu/pxa/cpuinfo.c          |   11 +++++++++--
 arch/arm/include/asm/arch-pxa/pxa.h |   13 +++++++++++++
 2 files changed, 22 insertions(+), 2 deletions(-)

arch/arm/cpu/pxa/cpuinfo.c +0 -0

index f1cdd40..bab6340 100644

arch/arm/cpu/pxa/cpuinfo.c +5 -1

-#define	CPU_MASK_PXA_PRODID	0x3f0
 #define	CPU_VALUE_PXA25X	0x100
 #define	CPU_VALUE_PXA27X	0x110
 

@@ -51,6 +53,11 @@ int cpu_is_pxa27x(void)
 	return id == CPU_VALUE_PXA27X;
 }
 
+uint32_t pxa_get_cpu_revision(void)
+{
+	return pxa_get_cpuid() & CPU_MASK_PRODREV;
+}
+
 #ifdef	CONFIG_DISPLAY_CPUINFO
 static const char *pxa25x_get_revision(void)
 {

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-pxa/pxa.h index 49c6552..b67d8f2 100644

arch/arm/include/asm/arch-pxa/pxa.h +8 -0

@@ -22,8 +22,21 @@
 #ifndef	__PXA_H__
 #define	__PXA_H__
 
+#define PXA255_A0	0x00000106
+#define PXA250_C0	0x00000105
+#define PXA250_B2	0x00000104
+#define PXA250_B1	0x00000103
+#define PXA250_B0	0x00000102
+#define PXA250_A1	0x00000101
+#define PXA250_A0	0x00000100
+#define PXA210_C0	0x00000125

This is set of patches adding support for iPAQ h2200 device

Ad. [PATCH 1/6] h2200: Add support for iPAQ h2200 I've added device id to the mach-types.h file. But I'm pretty sure this is the bad way. The id I took from
http://www.arm.linux.org.uk/developer/machines/list.php?id=341

Device's 1st stage bootloader requires from 2nd stage loader specific header which I've defined in file h2200-header.S. For now it is build to h2200-header.bin which has to be concatenated with u-boot.bin (cat h2200-header.bin u-boot.bin > u-boot.rdy). I don't know how I can do this another way.

One more, can I add to device folder

program which generates packed
binary with header which device's rescue bootloader can flash into memory?

Ad. [PATCH 3/6] pxa: Add some stuff to examine cpu model and rev This patch shuld be already in pxa tree but it's not. Maybe I overlooked or sth. If so I'm sorry for sending it again.

?ukasz Da?ek (6):
h2200: Add support for iPAQ h2200
pxa25x: Add USB Ethernet driver
pxa: Add some stuff to examine cpu model and rev
usbether: Fixed bug when using with PXA25X chips
usbether: Define CONFIG_USB_ETH_{CDC,SUBSET}
usbether: Removed DEV_CONFIG_{CDC,SUBSET}

 arch/arm/cpu/pxa/cpuinfo.c          |   11 +-
 arch/arm/include/asm/arch-pxa/pxa.h |   13 +
 arch/arm/include/asm/mach-types.h   |    1 +
 board/h2200/Makefile                |   51 +
 board/h2200/h2200-header.S          |   27 +
 board/h2200/h2200.c                 |  197 ++++
 board/h2200/h2200.h                 |   28 +
 boards.cfg                          |    2 +
 drivers/usb/gadget/Makefile         |    1 +
 drivers/usb/gadget/ether.c          |   69 +-
 drivers/usb/gadget/pxa25x_udc.c     | 2059
+++++++++++++++++++++++++++++++++++ drivers/usb/gadget/pxa25x_udc.h     | 
162 +++
 include/configs/h2200.h             |  168 +++

 13 files changed, 2757 insertions(+), 32 deletions(-)
 create mode 100644 board/h2200/Makefile
 create mode 100644 board/h2200/h2200-header.S
 create mode 100644 board/h2200/h2200.c
 create mode 100644 board/h2200/h2200.h
 create mode 100644 drivers/usb/gadget/pxa25x_udc.c
 create mode 100644 drivers/usb/gadget/pxa25x_udc.h
 create mode 100644 include/configs/h2200.h

Device's 1st stage bootloader requires from 2nd stage loader specific header which I've defined in file h2200-header.S. For now it is build to h2200-header.bin which has to be concatenated with u-boot.bin (cat h2200-header.bin u-boot.bin > u-boot.rdy). I don't know how I can do this another way.

One more, can I add to device folder program which generates packed binary with header which device's rescue bootloader can flash into memory?