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mx25: add CPU revision 1.2

PATCH New Eric Bénard 4 participants 10 messages Sep 22, 2012 – Sep 23, 2012

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#0 lore raw

PATCH 1/3 mx25: add CPU revision 1.2

tested on a MCIMX257CJM4A which now reports :
CPU: Freescale i.MX25 rev1.2 at 399 MHz

---
 arch/arm/cpu/arm926ejs/mx25/generic.c     |    3 +++
 arch/arm/include/asm/arch-mx25/imx-regs.h |    1 +
 2 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +3 -0
index 8b07dae..cb74b82 100644
@@ -140,6 +140,9 @@ u32 get_cpu_rev(void)
 	case 0x01:
 		system_rev |= CHIP_REV_1_1;
 		break;
+	case 0x02:
+		system_rev |= CHIP_REV_1_2;
+		break;
 	default:
 		system_rev |= 0x8000;
 		break;
arch/arm/include/asm/arch-mx25/imx-regs.h +1 -0
index cf925d7..35a2fb6 100644
@@ -355,5 +355,6 @@ struct aips_regs {
 
 #define CHIP_REV_1_0		0x10
 #define CHIP_REV_1_1		0x11
+#define CHIP_REV_1_2		0x12
 
 #endif				/* _IMX_REGS_H */
Signature · 1 line
1.7.7.6
#1 lore raw

PATCH 2/3 mx25: fix compilation when CONFIG_FSL_ESDHC is enabled

else we get :
generic.c: In function 'get_clocks':
generic.c:210: error: 'MXC_ESDHC_CLK' undeclared (first use in this function)

please note this fix is a hack similar to the one used in arch/arm/cpu/arm1136/mx35/generic.c
and will pevent the usage of eSDHC2 (as done on i/MX35).

---
 arch/arm/cpu/arm926ejs/mx25/generic.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +1 -1
index cb74b82..6a3a8b3 100644
@@ -207,7 +207,7 @@ int cpu_eth_init(bd_t *bis)
 int get_clocks(void)
 {
 #ifdef CONFIG_FSL_ESDHC
-	gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
 #endif
 	return 0;
 }
Signature · 1 line
1.7.7.6
#2 lore raw

PATCH 2/3 mx25: fix compilation when CONFIG_FSL_ESDHC is enabled

Quoted 9 lines · Eric B?nard

else we get :
generic.c: In function 'get_clocks':
generic.c:210: error: 'MXC_ESDHC_CLK' undeclared (first use in this function)

please note this fix is a hack similar to the one used in arch/arm/cpu/arm1136/mx35/generic.c
and will pevent the usage of eSDHC2 (as done on i/MX35).

What about working in the proper fix then?

Signature · 3 lines
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br
#3 lore raw

PATCH 2/3 mx25: fix compilation when CONFIG_FSL_ESDHC is enabled

Hi Otavio, Eric,

Quoted 6 lines · Otavio Salvador
Quoted 5 lines · Eric B?nard

else we get :
generic.c: In function 'get_clocks':
generic.c:210: error: 'MXC_ESDHC_CLK' undeclared (first use in this function)

Quoted 7 lines
Quoted 5 lines

please note this fix is a hack similar to the one used in arch/arm/cpu/arm1136/mx35/generic.c
and will pevent the usage of eSDHC2 (as done on i/MX35).

What about working in the proper fix then?

Note that I have such a fix. I have already posted it for i.MX35, but it's missing a part that I will post soon, and I have the same fix for i.MX25 that I will also post soon.

Best regards,
Beno?t

#4 lore raw

PATCH 3/3 add Eukrea's CPUIMX25

In reply to Eric Bénard

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested)

bootlog :

U-Boot 2012.07-rc1-00029-gca2becc-dirty (Sep 22 2012 - 22:28:35)

CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR

DRAM:  64 MiB
WARNING: Caches not enabled
NAND:  256 MiB
MMC:   FSL_SDHC: 0

*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   FEC
Hit any key to stop autoboot:  0

CPUIMX25 U-Boot > mmc rescan
CPUIMX25 U-Boot > mmc part

Partition Map for MMC device 0 -- Partition Type: DOS

Partition Start Sector Num Sectors Type

    1		      2048	    262144	 b
---
 MAINTAINERS                               |    2 +
 board/eukrea/cpuimx25/Makefile            |   44 +++++++
 board/eukrea/cpuimx25/config.mk           |    5 +
 board/eukrea/cpuimx25/cpuimx25.c          |  123 ++++++++++++++++++
 board/eukrea/cpuimx25/imximage.cfg        |   55 ++++++++
 board/eukrea/cpuimx25/lowlevel_init.S     |  113 +++++++++++++++++
 boards.cfg                                |    2 +
 include/configs/cpuimx25.h                |  196 +++++++++++++++++++++++++++++
 nand_spl/board/eukrea/cpuimx25/Makefile   |   79 ++++++++++++
 nand_spl/board/eukrea/cpuimx25/config.mk  |    1 +
 nand_spl/board/eukrea/cpuimx25/u-boot.lds |   83 ++++++++++++
 11 files changed, 703 insertions(+), 0 deletions(-)
 create mode 100644 board/eukrea/cpuimx25/Makefile
 create mode 100644 board/eukrea/cpuimx25/config.mk
 create mode 100644 board/eukrea/cpuimx25/cpuimx25.c
 create mode 100644 board/eukrea/cpuimx25/imximage.cfg
 create mode 100644 board/eukrea/cpuimx25/lowlevel_init.S
 create mode 100644 include/configs/cpuimx25.h
 create mode 100644 nand_spl/board/eukrea/cpuimx25/Makefile
 create mode 100644 nand_spl/board/eukrea/cpuimx25/config.mk
 create mode 100644 nand_spl/board/eukrea/cpuimx25/u-boot.lds
MAINTAINERS +2 -0
index fd0c65c..25a58ab 100644
@@ -603,6 +603,8 @@ Eric Benard <[email protected]>
 	cpuat91		ARM920T
 	cpu9260		ARM926EJS (AT91SAM9260 SoC)
 	cpu9G20		ARM926EJS (AT91SAM9G20 SoC)
+	cpuimx25	i.MX25
+	cpuimx25nand	i.MX25
 
 Ajay Bhargav <[email protected]>
 
board/eukrea/cpuimx25/Makefile new file +44 -0

44 lines not on this page · raw message

board/eukrea/cpuimx25/config.mk new file +5 -0
new file mode 100644
index 0000000..18b2883
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+CONFIG_SYS_TEXT_BASE = 0x810c0000
+else
+CONFIG_SYS_TEXT_BASE = 0x81200000
+endif
board/eukrea/cpuimx25/cpuimx25.c new file +123 -0

123 lines not on this page · raw message

board/eukrea/cpuimx25/imximage.cfg new file +55 -0

55 lines not on this page · raw message

board/eukrea/cpuimx25/lowlevel_init.S new file +113 -0

113 lines not on this page · raw message

boards.cfg +2 -0
index 2d36d83..51a681c 100644
@@ -165,6 +165,8 @@ dockstar                     arm         arm926ejs   -                   Seagate
 tk71                         arm         arm926ejs   tk71                karo           kirkwood
 devkit3250                   arm         arm926ejs   devkit3250          timll          lpc32xx
 jadecpu                      arm         arm926ejs   jadecpu             syteco         mb86r0x
+cpuimx25                     arm         arm926ejs   cpuimx25            eukrea         mx25		cpuimx25:IMX_CONFIG=board/eukrea/cpuimx25/imximage.cfg
+cpuimx25nand                 arm         arm926ejs   cpuimx25            eukrea         mx25		cpuimx25:NAND_U_BOOT
 mx25pdk                      arm         arm926ejs   mx25pdk             freescale      mx25		mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
 tx25                         arm         arm926ejs   tx25                karo           mx25
 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
include/configs/cpuimx25.h new file +196 -0

196 lines not on this page · raw message

nand_spl/board/eukrea/cpuimx25/Makefile new file +79 -0

79 lines not on this page · raw message

nand_spl/board/eukrea/cpuimx25/config.mk new file +1 -0
new file mode 100644
index 0000000..68afbf1
@@ -0,0 +1 @@
+PAD_TO	:= 2048
nand_spl/board/eukrea/cpuimx25/u-boot.lds new file +83 -0

83 lines not on this page · raw message

Signature · 1 line
1.7.7.6
#5 lore raw

PATCH 3/3 add Eukrea's CPUIMX25

Quoted 9 lines · Eric B?nard

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested)

Quoted 3 lines

bootlog :

U-Boot 2012.07-rc1-00029-gca2becc-dirty (Sep 22 2012 - 22:28:35)

Please rebase it against 2012.10.

For iMX patches please keep Stefano Babic <[email protected]> in CC as he is the iMX custodian.

Cheers,

Signature · 3 lines
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br
#6 lore raw

PATCH 3/3 add Eukrea's CPUIMX25

Le Sat, 22 Sep 2012 18:18:58 -0300,
Otavio Salvador <[email protected]> a ?crit :

Quoted 10 lines · Eric B?nard
Quoted 9 lines

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested)

Quoted 9 lines
Quoted 3 lines

bootlog :

U-Boot 2012.07-rc1-00029-gca2becc-dirty (Sep 22 2012 - 22:28:35)

Please rebase it against 2012.10.

For iMX patches please keep Stefano Babic <[email protected]> in CC as he is the iMX custodian.

that should have been the case ... but I forget one = before his mail ...
git send-email --to u-boot at lists.denx.de --cc sbabic at denx.de --suppress-cc=self -3

Eric

#7 lore raw

PATCH 3/3 add Eukrea's CPUIMX25

In reply to Otavio Salvador

Hi Otavio,

Le Sat, 22 Sep 2012 18:18:58 -0300,
Otavio Salvador <[email protected]> a ?crit :

Quoted 10 lines · Eric B?nard
Quoted 9 lines

this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested)

Quoted 6 lines
Quoted 3 lines

bootlog :

U-Boot 2012.07-rc1-00029-gca2becc-dirty (Sep 22 2012 - 22:28:35)

Please rebase it against 2012.10.

the patch serie can be applied cleanly (and even compiled ;-) on 2012.10-rc1

Eric

#9 lore raw

PATCH 1/3 mx25: add CPU revision 1.2

In reply to Eric Bénard
Quoted 29 lines · Eric B?nard

tested on a MCIMX257CJM4A which now reports :
CPU: Freescale i.MX25 rev1.2 at 399 MHz

---
 arch/arm/cpu/arm926ejs/mx25/generic.c     |    3 +++
 arch/arm/include/asm/arch-mx25/imx-regs.h |    1 +
 2 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +3 -0
index 8b07dae..cb74b82 100644
@@ -140,6 +140,9 @@ u32 get_cpu_rev(void)
 	case 0x01:
 		system_rev |= CHIP_REV_1_1;
 		break;
+	case 0x02:
+		system_rev |= CHIP_REV_1_2;
+		break;
 	default:
 		system_rev |= 0x8000;
 		break;
arch/arm/include/asm/arch-mx25/imx-regs.h +0 -0
index cf925d7..35a2fb6 100644

arch/arm/include/asm/arch-mx25/imx-regs.h struct aips_regs { · line 360

Quoted 6 lines
arch/arm/include/asm/arch-mx25/imx-regs.h +1 -0
@@ -355,5 +355,6 @@ struct aips_regs {
 
 #define CHIP_REV_1_0		0x10
 #define CHIP_REV_1_1		0x11
+#define CHIP_REV_1_2		0x12
 
 #endif				/* _IMX_REGS_H */

Best regards,
Stefano Babic

Signature · 5 lines
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