GPIO: Add support for GPIO on CLPS711X-target platform
Subsystems (3)
PATCH v2 1/1 GPIO: Add support for GPIO on CLPS711X-target platform
The CLPS711X CPUs provide some GPIOs for use in the system. This driver provides support for these via gpiolib. Due to platform limitations, driver does not support interrupts, only inputs and outputs.
--- arch/arm/Kconfig | 1 + arch/arm/mach-clps711x/include/mach/gpio.h | 27 +++++ drivers/gpio/Kconfig | 4 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-clps711x.c | 150 ++++++++++++++++++++++++++++ 5 files changed, 183 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-clps711x/include/mach/gpio.h create mode 100644 drivers/gpio/gpio-clps711x.c
arch/arm/Kconfig +1 -0
@@ -384,6 +384,7 @@ config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" select CPU_ARM720T select ARCH_USES_GETTIMEOFFSET + select ARCH_REQUIRE_GPIOLIB select NEED_MACH_MEMORY_H help Support for Cirrus Logic 711x/721x/731x based boards.
arch/arm/mach-clps711x/include/mach/gpio.h new file +27 -0
@@ -0,0 +1,27 @@ +/* +* This file contains the CLPS711X GPIO definitions. +* +* Copyright (C) 2012 Alexander Shiyan <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +*/ + +/* Simple helper for convert port & pin to GPIO number */ +#define CLPS711X_GPIO (port, bit) ((port) * 8 + (bit)) + +/* Temporaty definitions for GPIO-ports */ +/* Will be removed after remove clps_read(write) macros */ +#include <mach/hardware.h> +#define _PADR ((u32)CLPS711X_VIRT_BASE + PADR) +#define _PBDR ((u32)CLPS711X_VIRT_BASE + PBDR) +#define _PCDR ((u32)CLPS711X_VIRT_BASE + PCDR) +#define _PDDR ((u32)CLPS711X_VIRT_BASE + PDDR) +#define _PADDR ((u32)CLPS711X_VIRT_BASE + PADDR) +#define _PBDDR ((u32)CLPS711X_VIRT_BASE + PBDDR) +#define _PCDDR ((u32)CLPS711X_VIRT_BASE + PCDDR) +#define _PDDDR ((u32)CLPS711X_VIRT_BASE + PDDDR) +#define _PEDR ((u32)CLPS711X_VIRT_BASE + PEDR) +#define _PEDDR ((u32)CLPS711X_VIRT_BASE + PEDDR)
drivers/gpio/Kconfig +4 -0
@@ -91,6 +91,10 @@ config GPIO_MAX730X comment "Memory mapped GPIO drivers:" +config GPIO_CLPS711X + def_bool y + depends on ARCH_CLPS711X + config GPIO_GENERIC_PLATFORM tristate "Generic memory-mapped GPIO controller support (MMIO platform device)" select GPIO_GENERIC
drivers/gpio/Makefile +1 -0
@@ -15,6 +15,7 @@ obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o +obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o
drivers/gpio/gpio-clps711x.c new file +150 -0
150 lines not on this page · raw message
Signature · 1 line
1.7.8.6
PATCH v2 1/1 GPIO: Add support for GPIO on CLPS711X-target platform
drivers/gpio/gpio-clps711x.c line 38
Quoted 13 lines · Alexander Shiyan
drivers/gpio/gpio-clps711x.c new file +13
-0+ +static const u32 clps711x_ports[] = { + _PADR, _PBDR, _PCDR, _PDDR, _PEDR, +}; + +static const u32 clps711x_pdirs[] = { + _PADDR, _PBDDR, _PCDDR, _PDDDR, _PEDDR, +}; + +static int gpio_clps711x_get (struct gpio_chip *chip,unsigned offset) +{ +return !!readb (clps711x_ports[chip->base /8 ]) & (1 << offset); +}
In 3.7 and later, you won't be able to readb/writeb on an integer address, all addresses have to be of "void __iomem *" or compatible type.
Arnd
PATCH v2 1/1 GPIO: Add support for GPIO on CLPS711X-target platform
Quoted 17 lines · Arnd Bergmann
drivers/gpio/gpio-clps711x.c line 38
Quoted 13 lines · Alexander Shiyan
drivers/gpio/gpio-clps711x.c new file +13
-0+ +static const u32 clps711x_ports[] = { + _PADR, _PBDR, _PCDR, _PDDR, _PEDR, +}; + +static const u32 clps711x_pdirs[] = { + _PADDR, _PBDDR, _PCDDR, _PDDDR, _PEDDR, +}; + +static int gpio_clps711x_get (struct gpio_chip *chip,unsigned offset) +{ +return !!readb (clps711x_ports[chip->base /8 ]) & (1 << offset); +}In 3.7 and later, you won't be able to readb/writeb on an integer address, all addresses have to be of "void
__iomem*" or compatible type.
OK that sounds like I can't merge this right now (but I like the patch apart for this) so hold off for the 3.8 merge window, and respin this on v3.7 as it comes out.
Yours,
Linus Walleij