am335x_evm: Enable UART{1,2,4,5}

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---
 arch/arm/cpu/armv7/am33xx/clock.c |   28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

arch/arm/cpu/armv7/am33xx/clock.c +3 -0

index 2b19506..4eb9226 100644
@@ -114,6 +114,34 @@ static void enable_per_clocks(void)
 	while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN)
 		;
 
+	/* UART1 */
+#ifdef CONFIG_SERIAL2
+	writel(PRCM_MOD_EN, &cmper->uart1clkctrl);

arch/arm/cpu/armv7/am33xx/clock.c +15 -0

+
+	/* UART4 */
+#ifdef CONFIG_SERIAL5
+	writel(PRCM_MOD_EN, &cmper->uart4clkctrl);
+	while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN)
+		;
+#endif /* CONFIG_SERIAL5 */
+
+	/* UART5 */
+#ifdef CONFIG_SERIAL6
+	writel(PRCM_MOD_EN, &cmper->uart5clkctrl);
+	while (readl(&cmper->uart5clkctrl) != PRCM_MOD_EN)
+		;
+#endif /* CONFIG_SERIAL6 */
+
 	/* MMC0*/
 	writel(PRCM_MOD_EN, &cmper->mmc0clkctrl);
 	while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)

Signature · 6 lines

1.7.10

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---
 arch/arm/cpu/armv7/am33xx/clock.c |   28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644

arch/arm/cpu/armv7/am33xx/clock.c +16 -0

+#endif /* CONFIG_SERIAL2 */
+
+	/* UART2 */
+#ifdef CONFIG_SERIAL3
+	writel(PRCM_MOD_EN, &cmper->uart2clkctrl);
+	while (readl(&cmper->uart2clkctrl) != PRCM_MOD_EN)
+		;
+#endif /* CONFIG_SERIAL3 */
+
+	/* UART4 */
+#ifdef CONFIG_SERIAL5
+	writel(PRCM_MOD_EN, &cmper->uart4clkctrl);
+	while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN)
+		;
+#endif /* CONFIG_SERIAL5 */
+

Dear Andrew Bradford,

Quoted 16 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---
 arch/arm/cpu/armv7/am33xx/clock.c |   28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644

arch/arm/cpu/armv7/am33xx/clock.c +0 -0

@@ -114,6 +114,34 @@ static void enable_per_clocks(void)
 	while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN)
 		;
 

arch/arm/cpu/armv7/am33xx/clock.c static void enable_per_clocks(void) · line 121

Quoted 5 lines

arch/arm/cpu/armv7/am33xx/clock.c +5 -0

+	/* UART1 */
+#ifdef CONFIG_SERIAL2
+	writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
+	while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
+		;

Call WATCHDOG_RESET() here, fix glboally

Quoted 21 lines

Dear Andrew Bradford,

Quoted 19 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---

 arch/arm/cpu/armv7/am33xx/clock.c |   28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644

arch/arm/cpu/armv7/am33xx/clock.c +0 -0

@@ -114,6 +114,34 @@ static void enable_per_clocks(void)
 
 	while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN)
 
 		;
 

Quoted 7 lines

arch/arm/cpu/armv7/am33xx/clock.c static void enable_per_clocks(void) · line 121

Quoted 5 lines

arch/arm/cpu/armv7/am33xx/clock.c +5 -0

+	/* UART1 */
+#ifdef CONFIG_SERIAL2
+	writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
+	while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
+		;

Call WATCHDOG_RESET() here, fix glboally

We don't have WATCHDOG_RESET...

Dear Tom Rini,

Quoted 27 lines · Marek Vasut

Quoted 25 lines

Dear Andrew Bradford,

Quoted 19 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 +	writel(PRCM_MOD_EN,

Quoted 2 lines

&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl)
!= PRCM_MOD_EN) + ;

Call WATCHDOG_RESET() here, fix glboally

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

Quoted 29 lines

Dear Tom Rini,

Quoted 27 lines · Marek Vasut

Quoted 25 lines

Dear Andrew Bradford,

Quoted 19 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 +	writel(PRCM_MOD_EN,

Quoted 2 lines

&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl)
!= PRCM_MOD_EN) + ;

Call WATCHDOG_RESET() here, fix glboally

Quoted 3 lines

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

It looks like it opts-out to {} in most cases, in <watchdog.h>

Dear Tom Rini,

Quoted 30 lines · Marek Vasut

Quoted 29 lines

Dear Tom Rini,

Quoted 27 lines · Marek Vasut

Quoted 25 lines

Dear Andrew Bradford,

Quoted 19 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 +	writel(PRCM_MOD_EN,

Quoted 2 lines

&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl)
!= PRCM_MOD_EN) + ;

Call WATCHDOG_RESET() here, fix glboally

Quoted 5 lines

Quoted 3 lines

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

It looks like it opts-out to {} in most cases, in <watchdog.h>

Correct, we use it to retrigger watchdog timer if implemented.

Quoted 36 lines

Dear Tom Rini,

Quoted 34 lines · Marek Vasut

Quoted 32 lines

Dear Tom Rini,

Quoted 21 lines · Marek Vasut

Quoted 20 lines

Dear Andrew Bradford,

Quoted 18 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by Andrew Bradford <[email protected]>

---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;

Quoted 7 lines

Quoted 5 lines

Quoted 3 lines

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 +	writel(PRCM_MOD_EN,

&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl)
!= PRCM_MOD_EN) + ;

Call WATCHDOG_RESET() here, fix glboally

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

Quoted 3 lines

Quoted 1 line

It looks like it opts-out to {} in most cases, in <watchdog.h>

Correct, we use it to retrigger watchdog timer if implemented.

Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.

Dear Tom Rini,

Quoted 46 lines · Marek Vasut

Quoted 44 lines

Dear Tom Rini,

Quoted 34 lines · Marek Vasut

Quoted 33 lines

Dear Tom Rini,

Quoted 31 lines

Quoted 28 lines · Marek Vasut

Dear Andrew Bradford,

Quoted 22 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by: Andrew Bradford
<[email protected]> ---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index
2b19506..4eb9226 100644 ---
a/arch/arm/cpu/armv7/am33xx/clock.c +++
b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6
+114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) !=
PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 + 

Quoted 2 lines

writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while
(readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ;

Call WATCHDOG_RESET() here, fix glboally

Quoted 6 lines

Quoted 3 lines

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

It looks like it opts-out to {} in most cases, in
<watchdog.h>

Correct, we use it to retrigger watchdog timer if implemented.

Quoted 4 lines

Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.

So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Quoted 54 lines · Marek Vasut

Dear Tom Rini,

Quoted 51 lines · Marek Vasut

Quoted 37 lines

Dear Tom Rini,

Quoted 35 lines · Marek Vasut

Quoted 34 lines

Dear Tom Rini,

Quoted 32 lines

Quoted 29 lines · Marek Vasut

Dear Andrew Bradford,

Quoted 24 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by: Andrew Bradford
<[email protected]> ---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index
2b19506..4eb9226 100644 ---
a/arch/arm/cpu/armv7/am33xx/clock.c +++
b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6
+114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) !=
PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 + 

writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while
(readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)

Review

Quoted 1 line

(quoted diff) +1 -0

+		;

Call WATCHDOG_RESET() here, fix glboally

Quoted 8 lines

Quoted 6 lines

Quoted 3 lines

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

It looks like it opts-out to {} in most cases, in
<watchdog.h>

Correct, we use it to retrigger watchdog timer if implemented.

Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.

Quoted 2 lines

So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?

I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.

Tom & Marek,

Quoted 58 lines · On Thu, 27 Sep 2012 10:53:05 -0700 Tom Rini <[email protected]> wrote:

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Quoted 54 lines · Marek Vasut

Dear Tom Rini,

Quoted 51 lines · Marek Vasut

Quoted 37 lines

Dear Tom Rini,

Quoted 35 lines · Marek Vasut

Quoted 34 lines

Dear Tom Rini,

Quoted 32 lines

Quoted 29 lines · Marek Vasut

Dear Andrew Bradford,

Quoted 24 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by: Andrew Bradford
<[email protected]> ---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index
2b19506..4eb9226 100644 ---
a/arch/arm/cpu/armv7/am33xx/clock.c +++
b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6
+114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) !=
PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 + 

writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while
(readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)

Review

Quoted 1 line

(quoted diff) +1 -0

+		;

Call WATCHDOG_RESET() here, fix glboally

Quoted 8 lines

Quoted 6 lines

Quoted 3 lines

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

It looks like it opts-out to {} in most cases, in
<watchdog.h>

Correct, we use it to retrigger watchdog timer if implemented.

Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.

Quoted 8 lines

Quoted 2 lines

So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?

I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.

Is there a consensus on the use of WATCHDOG_RESET vs. udelay(1) in this instance?

Looking through the arch/arm/cpu/armv7/{omap-common,omap3}/clock files shows no use of either WATCHDOG_RESET or udelay(1) in the ways mentioned. In fact, I can't easily find a use of WATCHDOG_RESET at all within arch/arm/cpu/armv7 code.

What is the goal of using either udelay(1) or WATCHDOG_RESET as recommended here?

Quoted 81 lines

Tom & Marek,

On Thu, 27 Sep 2012 10:53:05 -0700

Quoted 59 lines · Tom Rini

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Quoted 55 lines · Marek Vasut

Dear Tom Rini,

Quoted 52 lines · Marek Vasut

Quoted 38 lines

Dear Tom Rini,

Quoted 36 lines · Marek Vasut

Quoted 35 lines

Dear Tom Rini,

Quoted 33 lines

On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut

Quoted 29 lines · wrote:

Dear Andrew Bradford,

Quoted 24 lines

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.

Signed-off-by: Andrew Bradford
<[email protected]> ---

arch/arm/cpu/armv7/am33xx/clock.c | 28
++++++++++++++++++++++++++++ 1 file changed, 28
insertions(+)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/am33xx/clock.c index
2b19506..4eb9226 100644 ---
a/arch/arm/cpu/armv7/am33xx/clock.c +++
b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6
+114,34 @@ static void enable_per_clocks(void)

while (readl(&cmwkup->wkup_uart0ctrl) !=
PRCM_MOD_EN) ;

(quoted diff) +1 -0

+	/* UART1 */ +#ifdef CONFIG_SERIAL2 +

writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while
(readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)

Review

Quoted 1 line

(quoted diff) +1 -0

+		;

Call WATCHDOG_RESET() here, fix glboally

Quoted 8 lines

Quoted 6 lines

Quoted 3 lines

Quoted 1 line

We don't have WATCHDOG_RESET...

You do, and it opts-out to udelay(1) is most cases.

It looks like it opts-out to {} in most cases, in
<watchdog.h>

Correct, we use it to retrigger watchdog timer if implemented.

Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.

Quoted 8 lines

Quoted 2 lines

So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?

I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.

Is there a consensus on the use of WATCHDOG_RESET vs. udelay(1) in this instance?

Looking through the arch/arm/cpu/armv7/{omap-common,omap3}/clock files shows no use of either WATCHDOG_RESET or udelay(1) in the ways mentioned. In fact, I can't easily find a use of WATCHDOG_RESET at all within arch/arm/cpu/armv7 code.

Quoted 2 lines

What is the goal of using either udelay(1) or WATCHDOG_RESET as recommended here?

Lets just match the rest of the SoC code and have the empty loop. We can have the discussion about what kind of delay or macro makes most sense another time.

Dear Tom Rini,

Quoted 3 lines

Lets just match the rest of the SoC code and have the empty loop. We can have the discussion about what kind of delay or macro makes most sense another time.

WATCHDOG_RESET() shall obviously be called, just enable watchdog and your uboot will keep restarting in such loops.

If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the proper pin-muxing as per the RS232 cape configuration.

Signed-off-by Andrew Bradford <[email protected]>

---
 arch/arm/cpu/armv7/am33xx/board.c            |   14 +++++++++
 arch/arm/include/asm/arch-am33xx/sys_proto.h |    6 +++-
 board/ti/am335x/mux.c                        |   43 ++++++++++++++++++++++++++
 3 files changed, 62 insertions(+), 1 deletion(-)

arch/arm/cpu/armv7/am33xx/board.c +0 -0

index ecc2671..32d1da4 100644
@@ -152,7 +152,21 @@ void s_init(void)
 	/* UART softreset */
 	u32 regVal;

arch/arm/cpu/armv7/am33xx/board.c +6 -0

+#ifdef CONFIG_SERIAL5
+	enable_uart4_pin_mux();
+#endif /* CONFIG_SERIAL5 */
+#ifdef CONFIG_SERIAL6
+	enable_uart5_pin_mux();
+#endif /* CONFIG_SERIAL6 */
 
 	regVal = readl(&uart_base->uartsyscfg);
 	regVal |= UART_RESET;

arch/arm/include/asm/arch-am33xx/sys_proto.h +5 -1

index 819ea65..4852127 100644
@@ -53,11 +53,15 @@ void ddr_pll_config(unsigned int ddrpll_M);
 
 /*
  * We have three pin mux functions that must exist.  We must be able to enable
- * uart0, for initial output and i2c0 to read the main EEPROM.  We then have a
+ * a uart for initial output and i2c0 to read the main EEPROM.  We then have a
  * main pinmux function that can be overridden to enable all other pinmux that
  * is required on the board.
  */
 void enable_uart0_pin_mux(void);
+void enable_uart1_pin_mux(void);
+void enable_uart2_pin_mux(void);
+void enable_uart4_pin_mux(void);
+void enable_uart5_pin_mux(void);
 void enable_i2c0_pin_mux(void);
 void enable_board_pin_mux(struct am335x_baseboard_id *header);
 #endif

board/ti/am335x/mux.c +43 -0

index 80becd5..db47d0e 100644
@@ -259,6 +259,30 @@ static struct module_pin_mux uart0_pin_mux[] = {
 	{-1},
 };
 
+static struct module_pin_mux uart1_pin_mux[] = {
+	{OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* UART1_RXD */
+	{OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},		/* UART1_TXD */
+	{-1},
+};
+
+static struct module_pin_mux uart2_pin_mux[] = {
+	{OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)},	/* UART2_RXD */
+	{OFFSET(spi0_d0), (MODE(1) | PULLUDEN)},		/* UART2_TXD */
+	{-1},
+};
+
+static struct module_pin_mux uart4_pin_mux[] = {
+	{OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)},	/* UART4_RXD */
+	{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)},		/* UART4_TXD */
+	{-1},
+};
+
+static struct module_pin_mux uart5_pin_mux[] = {
+	{OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)},	/* UART5_RXD */
+	{OFFSET(lcd_data8), (MODE(4) | PULLUDEN)},		/* UART5_TXD */
+	{-1},
+};
+
 static struct module_pin_mux mmc0_pin_mux[] = {
 	{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT3 */
 	{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT2 */

@@ -381,6 +405,25 @@ void enable_uart0_pin_mux(void)
 	configure_module_pin_mux(uart0_pin_mux);
 }
 
+void enable_uart1_pin_mux(void)
+{
+	configure_module_pin_mux(uart1_pin_mux);
+}
+
+void enable_uart2_pin_mux(void)
+{
+	configure_module_pin_mux(uart2_pin_mux);
+}
+
+void enable_uart4_pin_mux(void)
+{
+	configure_module_pin_mux(uart4_pin_mux);
+}
+
+void enable_uart5_pin_mux(void)
+{
+	configure_module_pin_mux(uart5_pin_mux);
+}
 
 void enable_i2c0_pin_mux(void)
 {

Signature · 6 lines

1.7.10

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Enable use of eserial devices for common and omap-common/spl.

This probably isn't the right way to do this as the changes aren't needed for 'common' configurations, just for one case.

Signed-off-by Andrew Bradford <[email protected]>

---
 arch/arm/cpu/armv7/omap-common/spl.c |    7 ++++++-
 common/console.c                     |   24 ++++++++++++++++++++----
 include/common.h                     |    5 +++++
 3 files changed, 31 insertions(+), 5 deletions(-)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644

arch/arm/cpu/armv7/omap-common/spl.c +3 -0

+#else
+	serial_init();
+#endif /* CONFIG_SERIAL_MULTI */
 
 	gd->have_console = 1;
 

common/console.c +0 -0

index 1177f7d..5670ce1 100644

Dear Marek Vasut,

On Thu, 27 Sep 2012 18:34:18 +0200

Quoted 25 lines · Marek Vasut

Dear Andrew Bradford,

Quoted 23 lines

Enable use of eserial devices for common and omap-common/spl.

This probably isn't the right way to do this as the changes aren't needed for 'common' configurations, just for one case.

Signed-off-by Andrew Bradford <[email protected]>

---

 arch/arm/cpu/armv7/omap-common/spl.c |    7 ++++++-
 common/console.c                     |   24

++++++++++++++++++++---- include/common.h |
5 +++++ 3 files changed, 31 insertions(+), 5 deletions(-)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644

arch/arm/cpu/armv7/omap-common/spl.c +0 -0

@@ -210,7 +210,12 @@ void preloader_console_init(void)
 
 	gd->flags |= GD_FLG_RELOC;
 	gd->baudrate = CONFIG_BAUDRATE;
 

Quoted 10 lines

arch/arm/cpu/armv7/omap-common/spl.c void preloader_console_init(void) · line 215

Quoted 5 lines

arch/arm/cpu/armv7/omap-common/spl.c +0 -1

-	serial_init();		/* serial communications

setup */

arch/arm/cpu/armv7/omap-common/spl.c +3 -0

+	/* serial communications setup */
+#ifdef CONFIG_SERIAL_MULTI
+	ESERIAL_FUNC(CONFIG_CONS_INDEX, init)();

Uh, if you implement default_serial_console properly(), you won't need this. Actually, I'm in the process of rolling out V2 of my serial patchset, which will make your life much more easier. Can you rebase the patchset on my series? I'll poke you about it.

I see that your serial patches have made it into u-boot/next, should I rebase this patch set with the requested changes on top of u-boot/next and resubmit?

Sorry, I'm not entirely clear on the role /next plays.

Or is it recommended to rebase my changes on top of the tree I worked with before but with your serial patches applied? Or some other method?

Thanks,
Andrew

Dear Marek Vasut,

Quoted 22 lines · On Thu, 27 Sep 2012 18:34:18 +0200 Marek Vasut <[email protected]> wrote:

Dear Andrew Bradford,

Quoted 20 lines

Enable use of eserial devices for common and omap-common/spl.

This probably isn't the right way to do this as the changes aren't needed for 'common' configurations, just for one case.

Signed-off-by Andrew Bradford <[email protected]>

---
 arch/arm/cpu/armv7/omap-common/spl.c |    7 ++++++-
 common/console.c                     |   24

++++++++++++++++++++---- include/common.h |
5 +++++ 3 files changed, 31 insertions(+), 5 deletions(-)

(quoted diff) +0 -0

b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644

arch/arm/cpu/armv7/omap-common/spl.c +0 -0

@@ -210,7 +210,12 @@ void preloader_console_init(void)
 	gd->flags |= GD_FLG_RELOC;
 	gd->baudrate = CONFIG_BAUDRATE;
 

Quoted 10 lines

arch/arm/cpu/armv7/omap-common/spl.c void preloader_console_init(void) · line 215

Quoted 5 lines

arch/arm/cpu/armv7/omap-common/spl.c +0 -1

-	serial_init();		/* serial communications

setup */

arch/arm/cpu/armv7/omap-common/spl.c +3 -0

+	/* serial communications setup */
+#ifdef CONFIG_SERIAL_MULTI
+	ESERIAL_FUNC(CONFIG_CONS_INDEX, init)();

Uh, if you implement default_serial_console properly(), you won't need this. Actually, I'm in the process of rolling out V2 of my serial patchset, which will make your life much more easier. Can you rebase the patchset on my series? I'll poke you about it.

I see that your serial patches have made it into u-boot/next, should I rebase this patch set with the requested changes on top of u-boot/next and resubmit? Sorry, I'm not entirely clear on the role /next plays.

Add targets of am335x_evm_uart{1,2,4,5} to have serial input/output on UART{1,2,4,5} for use with the Beaglebone RS232 cape and other custom configurations.

Signed-off-by Andrew Bradford <[email protected]>

---
 boards.cfg                   |    4 ++++
 include/configs/am335x_evm.h |   28 +++++++++++++++++++++++++++-
 2 files changed, 31 insertions(+), 1 deletion(-)

boards.cfg +4 -0

index f789539..342de03 100644
@@ -220,6 +220,10 @@ integratorap_cm946es         arm         arm946es    integrator          armltd
 integratorcp_cm946es         arm         arm946es    integrator          armltd         -               integratorcp:CM946ES
 ca9x4_ct_vxp                 arm         armv7       vexpress            armltd
 am335x_evm                   arm         armv7       am335x              ti             am33xx
+am335x_evm_uart1             arm         armv7       am335x              ti             am33xx      am335x_evm:AM33XX_UART_SELECT=1
+am335x_evm_uart2             arm         armv7       am335x              ti             am33xx      am335x_evm:AM33XX_UART_SELECT=2
+am335x_evm_uart4             arm         armv7       am335x              ti             am33xx      am335x_evm:AM33XX_UART_SELECT=4
+am335x_evm_uart5             arm         armv7       am335x              ti             am33xx      am335x_evm:AM33XX_UART_SELECT=5
 highbank                     arm         armv7       highbank            -              highbank
 mx51_efikamx                 arm         armv7       mx51_efikamx        genesi         mx5		mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg
 mx51_efikasb                 arm         armv7       mx51_efikamx        genesi         mx5		mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg

include/configs/am335x_evm.h +27 -1

index a3752bc..efb11d8 100644
@@ -158,9 +158,14 @@
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SERIAL_MULTI
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		(48000000)
 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
+#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
+#define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
+#define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
+#define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */
 
 /* I2C Configuration */
 #define CONFIG_I2C

@@ -182,11 +187,32 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
 
+#define CONFIG_ENV_OVERWRITE		1
+
 /*
- * select serial console configuration
+ * select serial console configuration, uart0 always enabled
  */
 #define CONFIG_SERIAL1			1
+#ifndef CONFIG_AM33XX_UART_SELECT
 #define CONFIG_CONS_INDEX		1
+#endif /* CONFIG_AM33XX_UART_SELECT */
+
+#if CONFIG_AM33XX_UART_SELECT == 1
+#define CONFIG_SERIAL2			1
+#define CONFIG_CONS_INDEX		2
+#endif /* CONFIG_AM33XX_UART_SELECT == 1 */
+#if CONFIG_AM33XX_UART_SELECT == 2
+#define CONFIG_SERIAL3			1
+#define CONFIG_CONS_INDEX		3
+#endif /* CONFIG_AM33XX_UART_SELECT == 2 */
+#if CONFIG_AM33XX_UART_SELECT == 4
+#define CONFIG_SERIAL5			1
+#define CONFIG_CONS_INDEX		5
+#endif /* CONFIG_AM33XX_UART_SELECT == 4 */
+#if CONFIG_AM33XX_UART_SELECT == 5
+#define CONFIG_SERIAL6			1
+#define CONFIG_CONS_INDEX		6
+#endif /* CONFIG_AM33XX_UART_SELECT == 5 */
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 
 #define CONFIG_ENV_IS_NOWHERE

Signature · 6 lines

1.7.10

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot