ARM: Add support for Broadcom BCM476x SoCs
cover ARM: Add support for Broadcom BCM476x SoCs
Howdy,
this patchset adds (minimal) support for the Broadcom BCM476x ARM based
SoCs to the kernel, not to be confused with the already supported MIPS based BCM47xx SoC and other BCM47xx WiFi and GPS produced by Broadcom.
This BCM476x is a DT-only multi-platform ARM platform and, at this spin, minimal in the features (boots nicely into initrd/busybox only) but also in the new code required, thanks to the existing drivers (and sweet DT) easily hooked up with the rest.
Additional support is being worked on. Pinctrl, clocks and gpios are almost ready for review. DMA (PL080) and/or sdhci have issues. Regulators (BCM59040) are minimal and usb (DWC OTG) only attemped reusing s3c-hsotg. Other fancy stuff (not too much) later and not all.
All this is my code, originating by me. The reference code I used is published by TomTom (my employer, who is aware but not involved at all) as part of the GPL compliance program but I don't plan to re-publish or maintain any part of it.
It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined multi-platform support and Stephen's patch to add DEBUG_LL to it.
Special thanks go to Stephen Warren who, with the recently mainlined BCM2835, showed how to do things cleanly since the beginning and involuntarily spurred me to act.
Any feedback is welcome.
Thanks,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
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PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 90 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no
include/machdirectory!Signed-off-by Domenico Andreoli <[email protected]>--- Documentation/devicetree/bindings/arm/bcm476x.txt | 8 + MAINTAINERS | 9 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/bcm476x-catalina.dts | 11 + arch/arm/boot/dts/bcm476x.dtsi | 31 ++ arch/arm/configs/bcm476x_defconfig | 352 ++++++++++++++++++++++ arch/arm/include/debug/bcm476x-uncompress.h | 53 +++ arch/arm/include/debug/bcm476x.S | 35 ++ arch/arm/mach-bcm476x/Kconfig | 17 + arch/arm/mach-bcm476x/Makefile | 1 + arch/arm/mach-bcm476x/Makefile.boot | 5 + arch/arm/mach-bcm476x/bcm476x.c | 83 +++++ 13 files changed, 608 insertions(+)Index:
b/Documentation/devicetree/bindings/arm/bcm476x.txt
===================================================================Documentation/devicetree/bindings/arm/bcm476x.txt new file +8
-0@@ -0,0 +1,8 @@ +Broadcom BCM476x device tree bindings +------------------------------------------- + +Boards with the BCM476x SoC shall have the following properties: + +Required root node property: + +compatible = "brcm,bcm476x";Index: b/arch/arm/Kconfig
===================================================================arch/arm/Kconfig +2
-0@@ -1017,6 +1017,8 @@ source "arch/arm/mach-mvebu/Kconfig" source "arch/arm/mach-at91/Kconfig" +source "arch/arm/mach-bcm476x/Kconfig" + source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-cns3xxx/Kconfig"Index: b/arch/arm/Makefile
===================================================================arch/arm/Makefile +1
-0@@ -137,6 +137,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020 # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_BCM2835) += bcm2835 +machine-$(CONFIG_ARCH_BCM476X) := bcm476x machine-$(CONFIG_ARCH_CLPS711X) += clps711x machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx machine-$(CONFIG_ARCH_DAVINCI) += davinciIndex:
b/arch/arm/boot/dts/bcm476x-catalina.dts
===================================================================arch/arm/boot/dts/bcm476x-catalina.dts new file +11
-0@@ -0,0 +1,11 @@ +/dts-v1/; +/include/ "bcm476x.dtsi" + +/ { + compatible = "brcm,catalina", "brcm,bcm476x"; + model = "Broadcom Catalina"; + + memory { + reg = <0x30000000 0x4000000>; + }; +};Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +8
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi" + +/ { + compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + chosen { + bootargs = "earlyprintk";
arch/arm/boot/dts/bcm476x.dtsi line 18
Quoted 10 lines
arch/arm/boot/dts/bcm476x.dtsi new file +10
-0+ }; + + amba { + compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";
why brcm specific compatbile?
Quoted 297 lines
arch/arm/boot/dts/bcm476x.dtsi new file +13
-0+ reg = <0x80000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller at 81000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x81000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +};Index: b/arch/arm/configs/bcm476x_defconfig
===================================================================arch/arm/configs/bcm476x_defconfig new file +256
-0@@ -0,0 +1,352 @@ +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_NO_IOPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_HAVE_IRQ_WORK=y +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="" +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_HAVE_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_SPARSE_IRQ=y +CONFIG_KTIME_SCALAR=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_TINY_RCU=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_NAMESPACES=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_KALLSYMS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_BLOCK=y +CONFIG_MSDOS_PARTITION=y +CONFIG_IOSCHED_NOOP=y +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_MMU=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_BCM476X=y +CONFIG_CPU_V6=y +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_V6=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_USE_DOMAINS=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_ARM_NR_BANKS=8 +CONFIG_CPU_HAS_PMU=y +CONFIG_MULTI_IRQ_HANDLER=y +CONFIG_ARM_ERRATA_411920=y +CONFIG_ARM_ERRATA_364296=y +CONFIG_ARM_VIC=y +CONFIG_ARM_VIC_NR=2 +CONFIG_ARM_AMBA=y +CONFIG_VMSPLIT_3G=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_ARCH_NR_GPIO=0 +CONFIG_PREEMPT_NONE=y +CONFIG_PREEMPT_COUNT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MIGRATION=y +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ALIGNMENT_TRAP=y +CONFIG_DEPRECATED_PARAM_STRUCT=y +CONFIG_USE_OF=y +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y +CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash" +CONFIG_CMDLINE_FROM_BOOTLOADER=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_VFP=y +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_HAVE_AOUT=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_HAVE_BPF_JIT=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_CMA=y +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +CONFIG_DTC=y +CONFIG_OF=y +CONFIG_PROC_DEVICETREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_DEVICE=y +CONFIG_OF_I2C=y +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_SCSI_MOD=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_INPUT=y +CONFIG_INPUT_EVDEV=y +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_SERIAL_AMBA_PL010=y +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_ALGOBIT=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_PL022=y +CONFIG_PINCTRL=y +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_DEBUG_PINCTRL=y +CONFIG_PINCTRL_BCM476X=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=y +CONFIG_SSB_SDIOHOST_POSSIBLE=y +CONFIG_BCMA_POSSIBLE=y +} + +static void __init bcm476x_timer_init(void) +{ +} + +struct sys_timer bcm476x_timer = { + .init = bcm476x_timer_init +}; + +static const char * const bcm476x_compat[] = { + "brcm,bcm476x", + NULL +}; + +DT_MACHINE_START(BCM476X, "Broadcom BCM476x") + .map_io = bcm476x_map_io, + .init_irq = bcm476x_init_irq, + .handle_irq = vic_handle_irq, + .init_machine = bcm476x_init, + .timer = &bcm476x_timer, + .dt_compat = bcm476x_compat +MACHINE_ENDIndex:
b/arch/arm/include/debug/bcm476x.S
===================================================================arch/arm/include/debug/bcm476x.S new file +18
-0@@ -0,0 +1,35 @@ +/* + * Broadcom BCM476x SoCs DEBUG_LL support + * + * Copyright (C) 2012 Domenico Andreoli <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#if defined(CONFIG_DEBUG_BCM476X_UART0) +# define BCM476X_DEBUG_PHYS 0x000c0000
arch/arm/include/debug/bcm476x.S line 28
Quoted 10 lines
arch/arm/include/debug/bcm476x.S new file +10
-0+# define BCM476X_DEBUG_VIRT 0xd00c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1) +# define BCM476X_DEBUG_PHYS 0x000c1000 +# define BCM476X_DEBUG_VIRT 0xd00c1000 +#elif defined(CONFIG_DEBUG_BCM476X_UART2) +# define BCM476X_DEBUG_PHYS 0x000b2000 +# define BCM476X_DEBUG_VIRT 0xd00b2000 +#else +# error Unknown BCM476x debug port +#endif
can't you detect it?
Quoted 29 lines
arch/arm/include/debug/bcm476x.S new file +7
-0+ + .macro addruart, rp, rv, tmp + ldr \rp, =BCM476X_DEBUG_PHYS + ldr \rv, =BCM476X_DEBUG_VIRT + .endm + +#include <asm/hardware/debug-pl01x.S>Index:
b/arch/arm/include/debug/bcm476x-uncompress.h
===================================================================arch/arm/include/debug/bcm476x-uncompress.h new file +17
-0@@ -0,0 +1,53 @@ +/* +* Broadcom BCM476x SoCs decompressor output +* +* Copyright (C) 2012 Domenico Andreoli <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/io.h>
arch/arm/include/debug/bcm476x-uncompress.h line 27
Quoted 10 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +10
-0+#include <linux/amba/serial.h> + +#if defined(CONFIG_DEBUG_BCM476X_UART0 ) +# define BCM476X_DEBUG_PHYS 0x000c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1 ) +# define BCM476X_DEBUG_PHYS 0x000c1000 +#elif defined(CONFIG_DEBUG_BCM476X_UART2 ) +# define BCM476X_DEBUG_PHYS 0x000b2000 +#else +# error Unknown BCM476x debug port
ditto here by using the first one enable by the bootloader
Quoted 73 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +26
-0+#endif + +#define BCM476X_UART_DR IOMEM(BCM476X_DEBUG_PHYS + UART01x_DR) +#define BCM476X_UART_FR IOMEM(BCM476X_DEBUG_PHYS + UART01x_FR) +#define BCM476X_UART_CR IOMEM(BCM476X_DEBUG_PHYS + UART011_CR) + +static inline void putc (int c) +{ +while (__raw_readl (BCM476X_UART_FR ) & UART01x_FR_TXFF) +barrier (); + +__raw_writel (c,BCM476X_UART_DR ); +barrier (); +} + +static inline void flush (void ) +{ +int fr; + +do { + fr =__raw_readl (BCM476X_UART_FR ); +barrier (); + }while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) !=UART011_FR_TXFE ); +} + +#define arch_decomp_setup ()Index: b/arch/arm/mach-bcm476x/Kconfig
===================================================================arch/arm/mach-bcm476x/Kconfig new file +17
-0@@ -0,0 +1,17 @@ +config ARCH_BCM476X + bool "Broadcom BCM476X family" if ARCH_MULTI_V6 + select CPU_V6 + select ARM_VIC + select ARM_AMBA + select NO_IOPORT + select GENERIC_IRQ_CHIP + select SPARSE_IRQ + select MULTI_IRQ_HANDLER + select ARCH_WANT_OPTIONAL_GPIOLIB + select GENERIC_CLOCKEVENTS + select CLKSRC_MMIO + select COMMON_CLK + select CLKDEV_LOOKUP + select PINCTRL + select PINMUX + select USE_OFIndex: b/MAINTAINERS
===================================================================MAINTAINERS +9
-0@@ -1618,6 +1618,15 @@ F: arch/arm/boot/dts/bcm2835* F: arch/arm/configs/bcm2835_defconfig F: drivers/*/*bcm2835* +ARM/BCM476x ARM ARCHITECTURE +M: Domenico Andreoli <[email protected]> +L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-bcm476x +F: arch/arm/boot/dts/bcm476x* +F: arch/arm/configs/bcm476x_defconfig +F: drivers/*/*bcm476x* + BROADCOM TG3 GIGABIT ETHERNET DRIVER M: Matt Carlson <[email protected]> M: Michael Chan <[email protected]>_______________________________________________
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PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 40 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 39 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no
include/machdirectory!Signed-off-by Domenico Andreoli <[email protected]>--- Documentation/devicetree/bindings/arm/bcm476x.txt | 8 + MAINTAINERS | 9 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/bcm476x-catalina.dts | 11 + arch/arm/boot/dts/bcm476x.dtsi | 31 ++ arch/arm/configs/bcm476x_defconfig | 352 ++++++++++++++++++++++ arch/arm/include/debug/bcm476x-uncompress.h | 53 +++ arch/arm/include/debug/bcm476x.S | 35 ++ arch/arm/mach-bcm476x/Kconfig | 17 + arch/arm/mach-bcm476x/Makefile | 1 + arch/arm/mach-bcm476x/Makefile.boot | 5 + arch/arm/mach-bcm476x/bcm476x.c | 83 +++++ 13 files changed, 608 insertions(+)Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +11
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi" + +/ { + compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + chosen { + bootargs = "earlyprintk"; + }; + + amba {
Quoted 8 lines
arch/arm/boot/dts/bcm476x.dtsi line 18
Quoted 7 lines
arch/arm/boot/dts/bcm476x.dtsi new file +7
-0+ compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";why brcm specific compatbile?
Nothing breaks if I drop it. I think it's a future-proof clause, especially if you consider that the devicetree could be not easy to upgrade and you may need a way to differentiate the bcm476x's implementation from the common one. I'm not sure it's an actual requirement with use cases.
Quoted 40 lines
Quoted 40 lines
arch/arm/boot/dts/bcm476x.dtsi new file +13
-0+ reg = <0x80000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller at 81000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x81000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +};Index:
b/arch/arm/include/debug/bcm476x.S
===================================================================arch/arm/include/debug/bcm476x.S new file +22
-0@@ -0,0 +1,35 @@ +/* + * Broadcom BCM476x SoCs DEBUG_LL support + * + * Copyright (C) 2012 Domenico Andreoli <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#if defined(CONFIG_DEBUG_BCM476X_UART0) +# define BCM476X_DEBUG_PHYS 0x000c0000 +# define BCM476X_DEBUG_VIRT 0xd00c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1) +# define BCM476X_DEBUG_PHYS 0x000c1000 +# define BCM476X_DEBUG_VIRT 0xd00c1000
Quoted 8 lines
arch/arm/include/debug/bcm476x.S line 28
Quoted 6 lines
arch/arm/include/debug/bcm476x.S new file +6
-0+#elif defined(CONFIG_DEBUG_BCM476X_UART2) +# define BCM476X_DEBUG_PHYS 0x000b2000 +# define BCM476X_DEBUG_VIRT 0xd00b2000 +#else +# error Unknown BCM476x debug port +#endifcan't you detect it?
If I can assume that the boot loader will configure and enable only the console port, I could use the first one in such state.
Where could I place such detection, in the maco addruart itself?
Quoted 32 lines
Quoted 32 lines
arch/arm/include/debug/bcm476x.S new file +7
-0+ + .macro addruart, rp, rv, tmp + ldr \rp, =BCM476X_DEBUG_PHYS + ldr \rv, =BCM476X_DEBUG_VIRT + .endm + +#include <asm/hardware/debug-pl01x.S>Index:
b/arch/arm/include/debug/bcm476x-uncompress.h
===================================================================arch/arm/include/debug/bcm476x-uncompress.h new file +20
-0@@ -0,0 +1,53 @@ +/* +* Broadcom BCM476x SoCs decompressor output +* +* Copyright (C) 2012 Domenico Andreoli <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/io.h> +#include <linux/amba/serial.h> + +#if defined(CONFIG_DEBUG_BCM476X_UART0 )
Quoted 8 lines
arch/arm/include/debug/bcm476x-uncompress.h line 27
Quoted 7 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +7
-0+# define BCM476X_DEBUG_PHYS 0x000c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1 ) +# define BCM476X_DEBUG_PHYS 0x000c1000 +#elif defined(CONFIG_DEBUG_BCM476X_UART2 ) +# define BCM476X_DEBUG_PHYS 0x000b2000 +#else +# error Unknown BCM476x debug portditto here by using the first one enable by the bootloader
Are you saying that the detection should happen always or only in this last else branch, which actually should be impossible?
Quoted 17 lines
Quoted 17 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +17
-0+#endif + +#define BCM476X_UART_DR IOMEM(BCM476X_DEBUG_PHYS + UART01x_DR) +#define BCM476X_UART_FR IOMEM(BCM476X_DEBUG_PHYS + UART01x_FR) +#define BCM476X_UART_CR IOMEM(BCM476X_DEBUG_PHYS + UART011_CR) + +static inline void putc (int c) +{ +while (__raw_readl (BCM476X_UART_FR ) & UART01x_FR_TXFF) +barrier (); + +__raw_writel (c,BCM476X_UART_DR ); +barrier (); +} + +static inline void flush (void ) +{
Quoted 8 lines
arch/arm/include/debug/bcm476x-uncompress.h line 52
Quoted 8 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +8
-0+int fr; + +do { + fr =__raw_readl (BCM476X_UART_FR ); +barrier (); + }while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) !=UART011_FR_TXFE ); +} +
Thank you.
Regards,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 50 lines · Domenico Andreoli
Quoted 40 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 39 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no
include/machdirectory!Signed-off-by Domenico Andreoli <[email protected]>--- Documentation/devicetree/bindings/arm/bcm476x.txt | 8 + MAINTAINERS | 9 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/bcm476x-catalina.dts | 11 + arch/arm/boot/dts/bcm476x.dtsi | 31 ++ arch/arm/configs/bcm476x_defconfig | 352 ++++++++++++++++++++++ arch/arm/include/debug/bcm476x-uncompress.h | 53 +++ arch/arm/include/debug/bcm476x.S | 35 ++ arch/arm/mach-bcm476x/Kconfig | 17 + arch/arm/mach-bcm476x/Makefile | 1 + arch/arm/mach-bcm476x/Makefile.boot | 5 + arch/arm/mach-bcm476x/bcm476x.c | 83 +++++ 13 files changed, 608 insertions(+)Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +11
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi" + +/ { + compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + chosen { + bootargs = "earlyprintk"; + }; + + amba {Quoted 8 lines
arch/arm/boot/dts/bcm476x.dtsi line 18
Quoted 7 lines
arch/arm/boot/dts/bcm476x.dtsi new file +7
-0+ compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";why brcm specific compatbile?
Quoted 4 lines
Nothing breaks if I drop it. I think it's a future-proof clause, especially if you consider that the devicetree could be not easy to upgrade and you may need a way to differentiate the bcm476x's implementation from the common one. I'm not sure it's an actual requirement with use cases.
on amba we use periph id for differeniate IP implementation
Quoted 96 lines
Quoted 41 lines
Quoted 41 lines
arch/arm/boot/dts/bcm476x.dtsi new file +13
-0+ reg = <0x80000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller at 81000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x81000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +};Index:
b/arch/arm/include/debug/bcm476x.S
===================================================================arch/arm/include/debug/bcm476x.S new file +22
-0@@ -0,0 +1,35 @@ +/* + * Broadcom BCM476x SoCs DEBUG_LL support + * + * Copyright (C) 2012 Domenico Andreoli <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#if defined(CONFIG_DEBUG_BCM476X_UART0) +# define BCM476X_DEBUG_PHYS 0x000c0000 +# define BCM476X_DEBUG_VIRT 0xd00c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1) +# define BCM476X_DEBUG_PHYS 0x000c1000 +# define BCM476X_DEBUG_VIRT 0xd00c1000Quoted 8 lines
arch/arm/include/debug/bcm476x.S line 28
Quoted 6 lines
arch/arm/include/debug/bcm476x.S new file +6
-0+#elif defined(CONFIG_DEBUG_BCM476X_UART2) +# define BCM476X_DEBUG_PHYS 0x000b2000 +# define BCM476X_DEBUG_VIRT 0xd00b2000 +#else +# error Unknown BCM476x debug port +#endifcan't you detect it?
If I can assume that the boot loader will configure and enable only the console port, I could use the first one in such state.
Where could I place such detection, in the maco addruart itself?
Quoted 32 lines
Quoted 32 lines
arch/arm/include/debug/bcm476x.S new file +7
-0+ + .macro addruart, rp, rv, tmp + ldr \rp, =BCM476X_DEBUG_PHYS + ldr \rv, =BCM476X_DEBUG_VIRT + .endm + +#include <asm/hardware/debug-pl01x.S>Index:
b/arch/arm/include/debug/bcm476x-uncompress.h
===================================================================arch/arm/include/debug/bcm476x-uncompress.h new file +20
-0@@ -0,0 +1,53 @@ +/* +* Broadcom BCM476x SoCs decompressor output +* +* Copyright (C) 2012 Domenico Andreoli <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/io.h> +#include <linux/amba/serial.h> + +#if defined(CONFIG_DEBUG_BCM476X_UART0 )Quoted 8 lines
arch/arm/include/debug/bcm476x-uncompress.h line 27
Quoted 7 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +7
-0+# define BCM476X_DEBUG_PHYS 0x000c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1 ) +# define BCM476X_DEBUG_PHYS 0x000c1000 +#elif defined(CONFIG_DEBUG_BCM476X_UART2 ) +# define BCM476X_DEBUG_PHYS 0x000b2000 +#else +# error Unknown BCM476x debug portditto here by using the first one enable by the bootloader
Quoted 2 lines
Are you saying that the detection should happen always or only in this last else branch, which actually should be impossible?
if your bootloader do not enable a uart your kernel may not boot
Quoted 31 lines
Quoted 18 lines
Quoted 18 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +17
-0+#endif + +#define BCM476X_UART_DR IOMEM(BCM476X_DEBUG_PHYS + UART01x_DR) +#define BCM476X_UART_FR IOMEM(BCM476X_DEBUG_PHYS + UART01x_FR) +#define BCM476X_UART_CR IOMEM(BCM476X_DEBUG_PHYS + UART011_CR) + +static inline void putc (int c) +{ +while (__raw_readl (BCM476X_UART_FR ) & UART01x_FR_TXFF) +barrier (); + +__raw_writel (c,BCM476X_UART_DR ); +barrier (); +} + +static inline void flush (void ) +{Quoted 8 lines
arch/arm/include/debug/bcm476x-uncompress.h line 52
Quoted 8 lines
arch/arm/include/debug/bcm476x-uncompress.h new file +8
-0+int fr; + +do { + fr =__raw_readl (BCM476X_UART_FR ); +barrier (); + }while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) !=UART011_FR_TXFE ); +} +Thank you.
Regards,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico AndreoliQuoted 7 lines · Domenico Andreoli
Quoted 6 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 5 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no
include/machdirectory!
(sigh, Jean-Christophe, it's a really good idea when replying to patches to delete everything except what you're replying to so that others can actually find what they wrote in the email...)
Quoted 10 lines
Quoted 5 lines
Review
Quoted 4 lines
Index:
b/arch/arm/boot/dts/bcm476x.dtsi(quoted diff) +2
-0+ vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";why brcm specific compatbile?
Nothing breaks if I drop it. I think it's a future-proof clause, especially if you consider that the devicetree could be not easy to upgrade and you may need a way to differentiate the bcm476x's implementation from the common one. I'm not sure it's an actual requirement with use cases.
Indeed, everything works fine right now if you drop that. However, it is correct practice to include a compatible value for the particular SoC that incorporates the IP so that if in the future some SoC-specific workaround is required, the compatible value needed to trigger this is already in all historical .dts file.
Quoted 17 lines
Quoted 16 lines
Quoted 4 lines
Index:
b/arch/arm/include/debug/bcm476x.S(quoted diff) +2
-0+#if defined(CONFIG_DEBUG_BCM476X_UART0) +# define BCM476X_DEBUG_PHYS 0x000c0000Review
Quoted 10 lines
(quoted diff) +10
-0+# define BCM476X_DEBUG_VIRT 0xd00c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1) +# define BCM476X_DEBUG_PHYS 0x000c1000 +# define BCM476X_DEBUG_VIRT 0xd00c1000 +#elif defined(CONFIG_DEBUG_BCM476X_UART2) +# define BCM476X_DEBUG_PHYS 0x000b2000 +# define BCM476X_DEBUG_VIRT 0xd00b2000 +#else +# error Unknown BCM476x debug port +#endifcan't you detect it?
Quoted 4 lines
If I can assume that the boot loader will configure and enable only the console port, I could use the first one in such state.
Where could I place such detection, in the maco addruart itself?
Auto-detection is not necessarily a good idea; there's no reason in general to believe that no future board will ever use a UART for any purposes other than console/debug. Being explicit is probably good.
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 16 lines · Stephen Warren
Quoted 6 lines · Domenico Andreoli
Quoted 4 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 3 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
Index:
b/arch/arm/boot/dts/bcm476x.dtsiQuoted 8 lines
Quoted 3 lines
Review
Quoted 2 lines
(quoted diff) +2
-0+ vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell";why brcm specific compatbile?
Nothing breaks if I drop it. I think it's a future-proof clause, especially if you consider that the devicetree could be not easy to upgrade and you may need a way to differentiate the bcm476x's implementation from the common one. I'm not sure it's an actual requirement with use cases.
Quoted 5 lines
Indeed, everything works fine right now if you drop that. However, it is correct practice to include a compatible value for the particular SoC that incorporates the IP so that if in the future some SoC-specific workaround is required, the compatible value needed to trigger this is already in all historical .dts file.
This matches with what I know but it seems anyway that in the arm,primecell cases this is not a great concern, almost none of the dts currently in mainline go as far as specifying the machine specific name.
Quoted 17 lines
Quoted 17 lines
Quoted 16 lines
Quoted 4 lines
Index:
b/arch/arm/include/debug/bcm476x.S(quoted diff) +2
-0+#if defined(CONFIG_DEBUG_BCM476X_UART0) +# define BCM476X_DEBUG_PHYS 0x000c0000Review
Quoted 10 lines
(quoted diff) +10
-0+# define BCM476X_DEBUG_VIRT 0xd00c0000 +#elif defined(CONFIG_DEBUG_BCM476X_UART1) +# define BCM476X_DEBUG_PHYS 0x000c1000 +# define BCM476X_DEBUG_VIRT 0xd00c1000 +#elif defined(CONFIG_DEBUG_BCM476X_UART2) +# define BCM476X_DEBUG_PHYS 0x000b2000 +# define BCM476X_DEBUG_VIRT 0xd00b2000 +#else +# error Unknown BCM476x debug port +#endifcan't you detect it?
Quoted 8 lines
Quoted 4 lines
If I can assume that the boot loader will configure and enable only the console port, I could use the first one in such state.
Where could I place such detection, in the maco addruart itself?
Auto-detection is not necessarily a good idea; there's no reason in general to believe that no future board will ever use a UART for any purposes other than console/debug. Being explicit is probably good.
After thinking at it a bit, I also prefer to leave the guessing out. It can break things in non-obvious ways. I prefer a full consistent and testable behaviour.
Thanks,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico AndreoliHi Domenico,
Quoted 5 lines · On Sunday 07 October 2012 03:53:01 Domenico Andreoli wrote:
From: Domenico Andreoli <[email protected]>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no
include/machdirectory!
This is going to be in the commit, use something more sensible ;)
Quoted 3 lines
Signed-off-by Domenico Andreoli <[email protected]>---
[snip]
Quoted 6 lines
Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +1
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi"
arch/arm/boot/dts/bcm476x.dtsi line 11
Quoted 10 lines
arch/arm/boot/dts/bcm476x.dtsi new file +10
-0+ +/ { + compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + chosen { + bootargs = "earlyprintk"; + }; + + amba {
I would rather explicitely mention that the peripheral base address is at 0 so something like this:
amba at 0 {
to make it clear that the peripherals declared as leaf nodes of this one are at a relative address.
Quoted 25 lines
arch/arm/boot/dts/bcm476x.dtsi new file +20
-0+ compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x80000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + vic1: interrupt-controller at 81000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x81000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +};Index: b/arch/arm/configs/bcm476x_defconfig
===================================================================arch/arm/configs/bcm476x_defconfig new file +0
-0@@ -0,0 +1,352 @@
[snip]
arch/arm/configs/bcm476x_defconfig
Quoted 4 lines
arch/arm/configs/bcm476x_defconfig new file +4
-0+CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y +CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash"
remove the specific init=, let people use the defaults. --
Florian
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 31 lines · Florian Fainelli
Hi Domenico,
Quoted 12 lines · On Sunday 07 October 2012 03:53:01 Domenico Andreoli wrote:
From: Domenico Andreoli <[email protected]>
BCM476x's minimal infrastructure, Kernel's great reuse.
Look mom, no
include/machdirectory!Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +1
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi"arch/arm/boot/dts/bcm476x.dtsi line 11
Quoted 10 lines
arch/arm/boot/dts/bcm476x.dtsi new file +10
-0+ +/ { + compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + chosen { + bootargs = "earlyprintk"; + }; + + amba {I would rather explicitely mention that the peripheral base address is at 0 so something like this:
amba at 0 {
Quoted 7 lines
to make it clear that the peripherals declared as leaf nodes of this one are at a relative address.
arch/arm/boot/dts/bcm476x.dtsi line 15
Quoted 4 lines
arch/arm/boot/dts/bcm476x.dtsi new file +4
-0+ compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges;
You should only put a unit address ("@0") in the node name if there's a matching reg property and the unit address is needed to make the node name unique. Neither condition applies in this case.
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico Andreoliarch/arm/mach-bcm476x/Makefile.boot line 3
Quoted 8 lines · Domenico Andreoli
Index: b/arch/arm/mach-bcm476x/Makefile.boot
===================================================================arch/arm/mach-bcm476x/Makefile.boot new file +3
-0@@ -0,0 +1,5 @@ + zreladdr-y := 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000
Those params_phys-y and initrd_phys-y lines as useless as you're using the Device Tree.
arch/arm/mach-bcm476x/Makefile.boot line 5
Quoted 2 lines
arch/arm/mach-bcm476x/Makefile.boot new file +2
-0+#define BCM476X_PERIPH_PHYS 0x00080000 +#define BCM476X_PERIPH_VIRT 0xd0080000
This one should be defined with IOMEM(). Yes, you will have to add a cast to make it play nicely with map_desc.virtual.
Best regards,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 15 lines · Thomas Petazzoni
arch/arm/mach-bcm476x/Makefile.boot line 3
Quoted 8 lines · Domenico Andreoli
Index: b/arch/arm/mach-bcm476x/Makefile.boot
===================================================================arch/arm/mach-bcm476x/Makefile.boot new file +3
-0@@ -0,0 +1,5 @@ + zreladdr-y := 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000Those params_phys-y and initrd_phys-y lines as useless as you're using the Device Tree.
Quoted 5 lines
arch/arm/mach-bcm476x/Makefile.boot line 5
Quoted 2 lines
arch/arm/mach-bcm476x/Makefile.boot new file +2
-0+#define BCM476X_PERIPH_PHYS 0x00080000 +#define BCM476X_PERIPH_VIRT 0xd0080000This one should be defined with
IOMEM(). Yes, you will have to add a cast to make it play nicely with map_desc.virtual.
Will address both of them. Thank you Thomas.
Regards,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico AndreoliReview
Quoted 12 lines · Domenico Andreoli
BCM476x's minimal infrastructure, Kernel's great reuse.
Index:
b/arch/arm/boot/dts/bcm476x.dtsi(quoted diff) +3
-0+ chosen { + bootargs = "earlyprintk"; + };Index: b/arch/arm/configs/bcm476x_defconfig
(quoted diff) +2
-0+CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash" +CONFIG_CMDLINE_FROM_BOOTLOADER=y
I'm not sure you need to specify a default command-line in both those places. I would be inclined to leave out the root= option as well; it's pretty specific to however the user's SD card was partitioned, so there could be quite some variation there I think? Oh, especially since I think you said there was no SD driver yet anyway?
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 11 lines · Stephen Warren
Quoted 9 lines · Domenico Andreoli
BCM476x's minimal infrastructure, Kernel's great reuse.
Index:
b/arch/arm/boot/dts/bcm476x.dtsi(quoted diff) +3
-0+ chosen { + bootargs = "earlyprintk"; + };Index: b/arch/arm/configs/bcm476x_defconfig
Quoted 8 lines
Review
Quoted 2 lines
(quoted diff) +2
-0+CONFIG_CMDLINE="root=/dev/mmcblk0p2 ro console=ttyAMA1,115200 rootwait init=/bin/bash" +CONFIG_CMDLINE_FROM_BOOTLOADER=yI'm not sure you need to specify a default command-line in both those places. I would be inclined to leave out the root= option as well; it's pretty specific to however the user's SD card was partitioned, so there could be quite some variation there I think? Oh, especially since I think you said there was no SD driver yet anyway?
Right, I'll drop both. Thanks.
Dome
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico AndreoliReview
Quoted 7 lines · Domenico Andreoli
BCM476x's minimal infrastructure, Kernel's great reuse.
Index: b/arch/arm/configs/bcm476x_defconfig
(quoted diff) +3
-0+CONFIG_DEBUG_BCM476X_UART2=y +CONFIG_DEBUG_LL_INCLUDE="debug/bcm476x.S" +CONFIG_UNCOMPRESS_INCLUDE="debug/bcm476x-uncompress.h"
Was this defconfig file created by "make savedefconfig ; mv defconfig arch/arm/configs/bcm476x_defconfig"? If you do that, I think those last two lines I quoted above (and many more) will be removed, since those values are selected by CONFIG_DEBUG_BCM476X_UART2.
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 5 lines · Stephen Warren
Quoted 3 lines · Domenico Andreoli
BCM476x's minimal infrastructure, Kernel's great reuse.
Index: b/arch/arm/configs/bcm476x_defconfig
Quoted 8 lines
Review
Quoted 3 lines
(quoted diff) +3
-0+CONFIG_DEBUG_BCM476X_UART2=y +CONFIG_DEBUG_LL_INCLUDE="debug/bcm476x.S" +CONFIG_UNCOMPRESS_INCLUDE="debug/bcm476x-uncompress.h"Was this defconfig file created by "make savedefconfig ; mv defconfig
arch/arm/configs/bcm476x_defconfig"? If you do that, I think those last two lines I quoted above (and many more) will be removed, since those values are selected byCONFIG_DEBUG_BCM476X_UART2.
Yep, knew I was a 'make help' away from this. Will fix.
Dome
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico AndreoliHi Domenico,
Your series looks very nice, thanks for the contribution!
Stephen has already covered everything I would have commented and more, except for one thing that I found:
Quoted 8 lines · Domenico Andreoli
Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +3
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi" + +/ {
arch/arm/boot/dts/bcm476x.dtsi
Quoted 10 lines
arch/arm/boot/dts/bcm476x.dtsi new file +9
-0+ compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + vic0: interrupt-controller at 80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x80000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + };
I suppose that the name of the soc is not actually "bcm476x" but you are in fact referring to the family including bcm4760 and bcm4761.
The convention in the device tree is to always use specific product numbers, rather than wildcards. If one of the two has a superset of the hardware of the other, I would recommend you pick that number in the device tree and in the drivers, and for the other one, you just mark them as compatible to both of them.
Arnd
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 1 line · Arnd Bergmann
Hi Domenico,
Hello,
Quoted 1 line
Your series looks very nice, thanks for the contribution!
hehe.. thanks also to the hard work committed in the ARM sub-tree in these past (few!) months.
Quoted 17 lines
Stephen has already covered everything I would have commented and more, except for one thing that I found:
Quoted 13 lines · Domenico Andreoli
Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi new file +7
-0@@ -0,0 +1,31 @@ +/include/ "skeleton.dtsi" + +/ { + compatible = "brcm,bcm476x"; + model = "Broadcom BCM476x"; + + vic0: interrupt-controller at 80000 {
Quoted 8 lines
arch/arm/boot/dts/bcm476x.dtsi
Quoted 5 lines
arch/arm/boot/dts/bcm476x.dtsi new file +5
-0+ compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x80000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + };I suppose that the name of the soc is not actually "bcm476x" but you are in fact referring to the family including bcm4760 and bcm4761.
Yes, those two.
Quoted 5 lines
The convention in the device tree is to always use specific product numbers, rather than wildcards. If one of the two has a superset of the hardware of the other, I would recommend you pick that number in the device tree and in the drivers, and for the other one, you just mark them as compatible to both of them.
bcm4760 is the superset (bcm4761 hasn't the gpu) but there are also other differences (that I know, USB phy and clocks).
I can identify the SoC at runtime, does this change anything to your recommendation?
Thanks for the feedback.
Regards,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 5 lines · Domenico Andreoli
bcm4760 is the superset (bcm4761 hasn't the gpu) but there are also other differences (that I know, USB phy and clocks).
I can identify the SoC at runtime, does this change anything to your recommendation?
Not much. The rule not to have wildcards in the device tree strings is rather universal. For device drivers, the rule should be that the driver should only look at its own device and the information it can get about that from the bus (or from the device tree), but should generally not use interfaces to ask what soc the device is part of.
Otherwise you end up having to modify all device drivers every time you want to support a new SoC, which is something we want to avoid. If a new SoC contains some device that is identical to one on an older SoC, you should just be able to mark it as compatible with the original string in the device tree.
For the USB PHY and the clock setup, it should be very easy to use different compatible strings, although for the clock controller it may also be reasonable to call the initialization function from platform code and pass the type of controller into it. It may also be possible that all the differences between the clock implementations go away once you describe all clocks in the DT itself.
Arnd
PATCH 1/6 ARM: bcm476x: Add infrastructure
In reply to Domenico AndreoliThomas,
Quoted 5 lines · Domenico Andreoli
Index:
b/arch/arm/mach-bcm476x/bcm476x.c
===================================================================arch/arm/mach-bcm476x/bcm476x.c new file +0
-0
...
arch/arm/mach-bcm476x/bcm476x.c
Quoted 3 lines
arch/arm/mach-bcm476x/bcm476x.c new file +3
-0+ +#define BCM476X_PERIPH_PHYS 0x00080000 +#define BCM476X_PERIPH_VIRT 0xd0080000
Are you sure I should use IOMEM() here? The only place I use these macros is here below, for which I should add a cast to silent the compiler. All the other accesses go throught ioremap/readl/writel, if not I want to fix it.
arch/arm/mach-bcm476x/bcm476x.c
Quoted 7 lines
arch/arm/mach-bcm476x/bcm476x.c new file +7
-0+ +static struct map_desc io_map__initdata = { + .virtual =BCM476X_PERIPH_VIRT , + .pfn =__phys_to_pfn (BCM476X_PERIPH_PHYS ), + .length =BCM476X_PERIPH_SIZE , + .type =MT_DEVICE , +};
Regards,
Domenico
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 8 lines · Domenico Andreoli
Review
Quoted 2 lines
(quoted diff) +2
-0+#define BCM476X_PERIPH_PHYS 0x00080000 +#define BCM476X_PERIPH_VIRT 0xd0080000Are you sure I should use
IOMEM()here? The only place I use these macros is here below, for which I should add a cast to silent the compiler. All the other accesses go throught ioremap/readl/writel, if not I want to fix it.
Quoted 7 lines
Review
Quoted 7 lines
(quoted diff) +7
-0+ +static struct map_desc io_map __initdata = { + .virtual = BCM476X_PERIPH_VIRT, + .pfn = __phys_to_pfn(BCM476X_PERIPH_PHYS), + .length = BCM476X_PERIPH_SIZE, + .type = MT_DEVICE, +};
My understanding is that all virtual address constants should now be defined to have the void __iomem * type (i.e, using IOMEM). In the future, the idea is that map_desc.virtual might be switched to the void __iomem * type as well.
But others (Arnd?) will confirm (or not) this.
Best regards,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 6 lines · Thomas Petazzoni
My understanding is that all virtual address constants should now be defined to have the void
__iomem* type (i.e, using IOMEM). In the future, the idea is that map_desc.virtual might be switched to the void__iomem* type as well.But others (Arnd?) will confirm (or not) this.
I would certainly like to see this, yes. I had a patch for it ages ago, but would start over again if I did this now.
I don't have time to do the conversion at the moment, but I would certainly welcome a patch that does it. I can give some details about the problems with that and how I think they should be solved.
Arnd
PATCH 1/6 ARM: bcm476x: Add infrastructure
Arnd,
Quoted 6 lines · Arnd Bergmann
I would certainly like to see this, yes. I had a patch for it ages ago, but would start over again if I did this now.
I don't have time to do the conversion at the moment, but I would certainly welcome a patch that does it. I can give some details about the problems with that and how I think they should be solved.
I did start working on such a patch a few weeks ago, but converting all the platforms to use IOMEM() was really boring. But now you did that, I can try to revive my patch, see if it works, and post it if you're interested.
Best regards,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 5 lines · Thomas Petazzoni
Quoted 3 lines · Arnd Bergmann
I would certainly like to see this, yes. I had a patch for it ages ago, but would start over again if I did this now.
Quoted 8 lines
Quoted 3 lines
I don't have time to do the conversion at the moment, but I would certainly welcome a patch that does it. I can give some details about the problems with that and how I think they should be solved.
I did start working on such a patch a few weeks ago, but converting all the platforms to use
IOMEM()was really boring. But now you did that, I can try to revive my patch, see if it works, and post it if you're interested.
Ok, cool!
The main thing to watch out for are mappings that are not for MMIO, such as the call to create_mapping() in map_lowmem() or in devicemaps_init().
I would suggest making struct map_desc specific to callers of iotable_init() and changing the prototype for create_mapping() to
void __init create_mapping(unsigned long virtual, unsigned long pfn,
size_t length, unsigned int type);
That means we still need to add one type cast in iotable_init(), but everything else should become simpler. There are a few instances in platform code that use MT_MEMORY rather MT_DEVICE. At least the TCM one should not really be __iomem, but I'm not sure about the various TI SRAM locations. Probably doesn't matter all that much for those.
Arnd
PATCH 1/6 ARM: bcm476x: Add infrastructure
Dear Arnd Bergmann,
Quoted 9 lines · Arnd Bergmann
The main thing to watch out for are mappings that are not for MMIO, such as the call to
create_mapping()inmap_lowmem()or indevicemaps_init().I would suggest making struct
map_descspecific to callers ofiotable_init()and changing the prototype forcreate_mapping()tovoid
__initcreate_mapping(unsigned long virtual, unsigned long pfn,size_t length, unsigned int type);
Yes, this is exactly what I've done. I'll rebase my work, test and send it.
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 1/6 ARM: bcm476x: Add infrastructure
Quoted 6 lines · Thomas Petazzoni
Quoted 4 lines · Arnd Bergmann
The main thing to watch out for are mappings that are not for MMIO, such as the call to
create_mapping()inmap_lowmem()or indevicemaps_init().
Quoted 8 lines
Quoted 5 lines
I would suggest making struct
map_descspecific to callers ofiotable_init()and changing the prototype forcreate_mapping()tovoid
__initcreate_mapping(unsigned long virtual, unsigned long pfn,size_t length, unsigned int type);Yes, this is exactly what I've done. I'll rebase my work, test and send it.
Ok, looking forward to it. FWIW, I have a branch called testing/defconfig-warnings in the arm-soc tree that shuts up all known build warnings. If you pull that in for testing, you can see if any warnings were added by your patches.
Arnd
PATCH 2/6 ARM: bcm476x: Add system timer
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PATCH 2/6 ARM: bcm476x: Add system timer
Quoted 46 lines · On Sunday 07 October 2012 03:53:02 Domenico Andreoli wrote:
From: Domenico Andreoli <[email protected]>
System timer implementation for the BCM476x SoCs.
Signed-off-by Domenico Andreoli <[email protected]>--- Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt | 22 + arch/arm/boot/dts/bcm476x.dtsi | 8 + arch/arm/mach-bcm476x/bcm476x.c | 10 - drivers/clocksource/Makefile | 1 + drivers/clocksource/bcm476x_timer.c | 188 ++++++++++ include/linux/bcm476x_timer.h | 24 + 6 files changed, 244 insertions(+), 9 deletions(-)Index:
b/Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt
===================================================================Documentation/devicetree/bindings/timer/brcm,bcm476x-system-timer.txt new file +22
-0@@ -0,0 +1,22 @@ +BCM476x System Timer + +The System Timer peripheral provides either two or four 32-bit timer +channels. BCM476x has three timers at 0xba000, 0xbb000 and 0xd1000. The +first two provide four channels, the last (in the AON - Always ON power +domain) provides only two. + +Required properties: + +- compatible : should be "brcm,bcm476x-system-timer" +- reg : Specifies base physical address and size of the registers. +- interrupts : A list of 2 or 4 interrupt sinks; one per timer channel. +- clock-frequency : The frequency of the clock that drives the counter, in Hz. + +Example: + +timer { + compatible = "brcm,bcm476x-system-timer"; + reg = <0xba000 0x1000>; + interrupts = <4>, <11>; + clock-frequency = <24000000>; +};Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================
arch/arm/boot/dts/bcm476x.dtsi line 23
Quoted 10 lines
arch/arm/boot/dts/bcm476x.dtsi +7
-0@@ -14,6 +14,14 @@ #size-cells = <1>; ranges; + timer { + compatible = "brcm,bcm476x-system-timer"; + reg = <0xba000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <4>, <11>; + clock-frequency = <24000000>; + };
This should rather be timer: timer at ba0000 for this node to be uniquely named. --
Florian
PATCH 2/6 ARM: bcm476x: Add system timer
Quoted 7 lines · Florian Fainelli
Quoted 5 lines · On Sunday 07 October 2012 03:53:02 Domenico Andreoli wrote:
From: Domenico Andreoli <[email protected]>
System timer implementation for the BCM476x SoCs.
Index:
b/arch/arm/boot/dts/bcm476x.dtsi
Quoted 9 lines
Review
Quoted 7 lines
(quoted diff) +7
-0+ timer { + compatible = "brcm,bcm476x-system-timer"; + reg = <0xba000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <4>, <11>; + clock-frequency = <24000000>; + };This should rather be timer: timer at ba0000 for this node to be uniquely named.
I only see 1 timer node in this series, so "timer" is already unique, isn't it?
PATCH 2/6 ARM: bcm476x: Add system timer
Quoted 18 lines · Stephen Warren
Quoted 7 lines · Florian Fainelli
Quoted 5 lines · On Sunday 07 October 2012 03:53:02 Domenico Andreoli wrote:
From: Domenico Andreoli <[email protected]>
System timer implementation for the BCM476x SoCs.
Index:
b/arch/arm/boot/dts/bcm476x.dtsiQuoted 9 lines
Review
Quoted 7 lines
(quoted diff) +7
-0+ timer { + compatible = "brcm,bcm476x-system-timer"; + reg = <0xba000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <4>, <11>; + clock-frequency = <24000000>; + };This should rather be timer: timer at ba0000 for this node to be uniquely named.
Quoted 2 lines
I only see 1 timer node in this series, so "timer" is already unique, isn't it?
I don't mind to add the address, this SoC actually has three timer blocks.
Dome
PATCH 3/6 ARM: bcm476x: Add sched clock
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PATCH 3/6 ARM: bcm476x: Add sched clock
Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt line 4
Quoted 11 lines · Domenico Andreoli
Sched clock implementation based on the BCM476x's free runner counter.
Index:
b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt
===================================================================Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt new file +4
-0@@ -0,0 +1,18 @@ +BCM476x Sched clock + +The BCM476x provides a 63-bit free running counter driven by a separate +32KHz clock line.
Is "sched clock" really the name of the HW module in the Broadcom documentation (well, assuming you have any access to that). DT names should derived from HW manuals/... where possible.
PATCH 4/6 ARM: bcm476x: Add stub clock driver
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PATCH 4/6 ARM: bcm476x: Add stub clock driver
Quoted 17 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
This is the minimal clock support required for the boot, a more complete implementation will follow (shortly).
Index:
b/drivers/clk/clk-bcm476x.c(quoted diff) +10
-0+/* + * These are fixed clocks (and device tree doesn't support clk!). + * + * They're probably not all root clocks and it may be possible to + * turn them on and off but until this is mapped out better it's + * the only way they can be used. + */ +DEFINE_CLK_FIXED_RATE(sys_pclk, CLK_IS_ROOT, 312000000, 0); +DEFINE_CLK_FIXED_RATE(apb_pclk, CLK_IS_ROOT, 156000000, 0); +DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT, 78000000, 0);
Review
Quoted 10 lines
(quoted diff) +10
-0+DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 78000000, 0); +DEFINE_CLK_FIXED_RATE(uart2_pclk, CLK_IS_ROOT, 78000000, 0); + +static struct clk_lookup lookups[] = { + { .con_id = "sys_pclk", .clk = &sys_pclk }, + { .con_id = "apb_pclk", .clk = &apb_pclk }, + { .dev_id = "c0000.uart0", .clk = &uart0_pclk }, + { .dev_id = "c1000.uart1", .clk = &uart1_pclk }, + { .dev_id = "b2000.uart2", .clk = &uart2_pclk }, +};
Mike Turquette (common clk maintainer) objected to this form of static clock initialization when I originally posted the bcm2835 patches. Instead, please see how it got re-written dynamically:
(or, see linux-next or Linus Torvald's tree)
Also, please be aware of an error-handling bug there; see:
PATCH 4/6 ARM: bcm476x: Add stub clock driver
In reply to Domenico AndreoliQuoting Domenico Andreoli (2012-10-06 18:53:04)
Quoted 13 lines
Index:
b/drivers/clk/clk-bcm476x.c
===================================================================drivers/clk/clk-bcm476x.c new file +8
-0@@ -0,0 +1,52 @@ +/* +* Broadcom BCM476x SoCs clocks +* +* Copyright (C) 2011-2012 Domenico Andreoli <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or
drivers/clk/clk-bcm476x.c line 18
Quoted 10 lines
drivers/clk/clk-bcm476x.c new file +10
-0+* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/clk.h> +#include <linux/clk-private.h>
Why clk-private.h? That is deprecated and should not be used unless absolutely necessary. It will be removed once Tegra and OMAP stop using it.
Quoted 7 lines
drivers/clk/clk-bcm476x.c new file +7
-0+#include <linux/clk-provider.h> +#include <linux/clkdev.h> +#include <linux/clk/bcm476x.h> + +/* +* These are fixed clocks (and device tree doesn't support clk!). +*
drivers/clk/clk-bcm476x.c line 35
Quoted 10 lines
drivers/clk/clk-bcm476x.c new file +10
-0+* They're probably not all root clocks and it may be possible to +* turn them on and off but until this is mapped out better it's +* the only way they can be used. +*/ +DEFINE_CLK_FIXED_RATE (sys_pclk,CLK_IS_ROOT ,312000000 ,0 ); +DEFINE_CLK_FIXED_RATE (apb_pclk,CLK_IS_ROOT ,156000000 ,0 ); +DEFINE_CLK_FIXED_RATE (uart0_pclk,CLK_IS_ROOT ,78000000 ,0 ); +DEFINE_CLK_FIXED_RATE (uart1_pclk,CLK_IS_ROOT ,78000000 ,0 ); +DEFINE_CLK_FIXED_RATE (uart2_pclk,CLK_IS_ROOT ,78000000 ,0 ); +
Can you use clk_register_fixed_rate instead?
Regards,
Mike
PATCH 4/6 ARM: bcm476x: Add stub clock driver
Quoted 40 lines · Mike Turquette
Quoting Domenico Andreoli (2012-10-06 18:53:04)
Quoted 13 lines
Index:
b/drivers/clk/clk-bcm476x.c
===================================================================drivers/clk/clk-bcm476x.c new file +8
-0@@ -0,0 +1,52 @@ +/* +* Broadcom BCM476x SoCs clocks +* +* Copyright (C) 2011-2012 Domenico Andreoli <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or drivers/clk/clk-bcm476x.c line 18
Quoted 10 lines
drivers/clk/clk-bcm476x.c new file +10
-0+* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#include <linux/clk.h> +#include <linux/clk-private.h> Why
clk-private.h? That is deprecated and should not be used unless absolutely necessary. It will be removed once Tegra and OMAP stop using it.Quoted 11 lines
drivers/clk/clk-bcm476x.c new file +11
-0+#include <linux/clk-provider.h> +#include <linux/clkdev.h> +#include <linux/clk/bcm476x.h> + +/* +* These are fixed clocks (and device tree doesn't support clk!). +* +* They're probably not all root clocks and it may be possible to +* turn them on and off but until this is mapped out better it's +* the only way they can be used. +*/
Quoted 8 lines
drivers/clk/clk-bcm476x.c line 35
Quoted 6 lines
drivers/clk/clk-bcm476x.c new file +6
-0+DEFINE_CLK_FIXED_RATE (sys_pclk,CLK_IS_ROOT ,312000000 ,0 ); +DEFINE_CLK_FIXED_RATE (apb_pclk,CLK_IS_ROOT ,156000000 ,0 ); +DEFINE_CLK_FIXED_RATE (uart0_pclk,CLK_IS_ROOT ,78000000 ,0 ); +DEFINE_CLK_FIXED_RATE (uart1_pclk,CLK_IS_ROOT ,78000000 ,0 ); +DEFINE_CLK_FIXED_RATE (uart2_pclk,CLK_IS_ROOT ,78000000 ,0 ); +Can you use
clk_register_fixed_rateinstead?
Stephen already warned me, it'll be fixed in the next post. Thanks.
Regards,
Domenico
PATCH 5/6 ARM: bcm476x: Add restart hook
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PATCH 6/6 ARM: bcm476x: Instantiate console UART
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PATCH 6/6 ARM: bcm476x: Instantiate console UART
Quoted 25 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
The BCM476x sports standard PL011 UARTs which are fully described and put to use with these few changes.
Signed-off-by Domenico Andreoli <[email protected]>--- arch/arm/Kconfig.debug | 16 ++++++++++++++++ arch/arm/boot/dts/bcm476x.dtsi | 23 ++++++++++++++++++++++- 2 files changed, 38 insertions(+), 1 deletion(-)Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi +1
-1@@ -5,7 +5,7 @@ model = "Broadcom BCM476x"; chosen { - bootargs = "earlyprintk"; + bootargs = "console=ttyAMA1"; }; amba {
arch/arm/boot/dts/bcm476x.dtsi line 46
Quoted 6 lines
arch/arm/boot/dts/bcm476x.dtsi +3
-0@@ -41,5 +41,26 @@ interrupt-controller; #interrupt-cells = <1>; }; + + uart0 at c0000 { + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";
why brcm specific compatible did broadcom customised the IP?
arch/arm/Kconfig.debug
Quoted 24 lines
arch/arm/boot/dts/bcm476x.dtsi +18
-0+ reg = <0xc0000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <14>; + }; + + uart1 at c1000 { + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell"; + reg = <0xc1000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <15>; + }; + + uart2 at b2000 { + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell"; + reg = <0xb2000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <16>; + }; }; };Index: b/arch/arm/Kconfig.debug
===================================================================arch/arm/Kconfig.debug +0
-0
this should come with the debug patch
Quoted 29 lines
arch/arm/Kconfig.debug +14
-0@@ -89,6 +89,18 @@ choice bool "Kernel low-level debugging on 9263 and 9g45" depends on HAVE_AT91_DBGU1 + config DEBUG_BCM476X_UART0 + depends on ARCH_BCM476X + bool "Kernel low-level debugging on BCM476x UART 0" + + config DEBUG_BCM476X_UART1 + depends on ARCH_BCM476X + bool "Kernel low-level debugging on BCM476x UART 1" + + config DEBUG_BCM476X_UART2 + depends on ARCH_BCM476X + bool "Kernel low-level debugging on BCM476x UART 2" + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X@@ -404,6 +416,8 @@ endchoice config DEBUG_LL_INCLUDE string + default "debug/bcm476x.S" if DEBUG_BCM476X_UART0 || \ + DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2 default "debug/icedcc.S" if DEBUG_ICEDCC default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART
arch/arm/Kconfig.debug config DEBUG_LL_INCLUDE · line 437
Quoted 8 lines
arch/arm/Kconfig.debug +2
-0@@ -416,6 +430,8 @@ config DEBUG_LL_INCLUDE config UNCOMPRESS_INCLUDE string + default "debug/bcm476x-uncompress.h" if DEBUG_BCM476X_UART0 || \ + DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2 default "debug/icedcc-uncompress.h" if DEBUG_ICEDCC default "debug/mvebu-uncompress.h" if DEBUG_MVEBU_UART default "debug/tegra-uncompress.h" if DEBUG_TEGRA_UART
Best Regards,
J.
Quoted 5 lines
_______________________________________________
devicetree-discuss mailing list
devicetree-discuss at lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss
PATCH 6/6 ARM: bcm476x: Instantiate console UART
Quoted 24 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 23 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
The BCM476x sports standard PL011 UARTs which are fully described and put to use with these few changes.
Signed-off-by Domenico Andreoli <[email protected]>--- arch/arm/Kconfig.debug | 16 ++++++++++++++++ arch/arm/boot/dts/bcm476x.dtsi | 23 ++++++++++++++++++++++- 2 files changed, 38 insertions(+), 1 deletion(-)Index:
b/arch/arm/boot/dts/bcm476x.dtsi
===================================================================arch/arm/boot/dts/bcm476x.dtsi +1
-1@@ -5,7 +5,7 @@ model = "Broadcom BCM476x"; chosen { - bootargs = "earlyprintk"; + bootargs = "console=ttyAMA1"; };
Quoted 9 lines
arch/arm/boot/dts/bcm476x.dtsi line 46
Quoted 8 lines
arch/arm/boot/dts/bcm476x.dtsi +3
-0amba {@@ -41,5 +41,26 @@ interrupt-controller; #interrupt-cells = <1>; }; + + uart0 at c0000 { + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell";why brcm specific compatible did broadcom customised the IP?
yes, there are some peculiarities here but do not prevent the normal pl011 driver to work.
Quoted 17 lines
Quoted 17 lines
arch/arm/boot/dts/bcm476x.dtsi +17
-0+ reg = <0xc0000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <14>; + }; + + uart1 at c1000 { + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell"; + reg = <0xc1000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <15>; + }; + + uart2 at b2000 { + compatible = "brcm,bcm476x-pl011", "arm,pl011", "arm,primecell"; + reg = <0xb2000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <16>;
Quoted 8 lines
arch/arm/Kconfig.debug
Quoted 7 lines
arch/arm/boot/dts/bcm476x.dtsi +1
-0+ }; }; };Index: b/arch/arm/Kconfig.debug
===================================================================arch/arm/Kconfig.debug +0
-0this should come with the debug patch
ok
Quoted 30 lines
Quoted 30 lines
arch/arm/Kconfig.debug +14
-0@@ -89,6 +89,18 @@ choice bool "Kernel low-level debugging on 9263 and 9g45" depends on HAVE_AT91_DBGU1 + config DEBUG_BCM476X_UART0 + depends on ARCH_BCM476X + bool "Kernel low-level debugging on BCM476x UART 0" + + config DEBUG_BCM476X_UART1 + depends on ARCH_BCM476X + bool "Kernel low-level debugging on BCM476x UART 1" + + config DEBUG_BCM476X_UART2 + depends on ARCH_BCM476X + bool "Kernel low-level debugging on BCM476x UART 2" + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X@@ -404,6 +416,8 @@ endchoice config DEBUG_LL_INCLUDE string + default "debug/bcm476x.S" if DEBUG_BCM476X_UART0 || \ + DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2 default "debug/icedcc.S" if DEBUG_ICEDCC default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART@@ -416,6 +430,8 @@ config DEBUG_LL_INCLUDE
Quoted 9 lines
arch/arm/Kconfig.debug config DEBUG_LL_INCLUDE · line 437
Quoted 7 lines
arch/arm/Kconfig.debug +2
-0config UNCOMPRESS_INCLUDE string + default "debug/bcm476x-uncompress.h" if DEBUG_BCM476X_UART0 || \ + DEBUG_BCM476X_UART1 || DEBUG_BCM476X_UART2 default "debug/icedcc-uncompress.h" if DEBUG_ICEDCC default "debug/mvebu-uncompress.h" if DEBUG_MVEBU_UART default "debug/tegra-uncompress.h" if DEBUG_TEGRA_UARTBest Regards,
J.
Thank you.
Regards,
Domenico
PATCH 6/6 ARM: bcm476x: Instantiate console UART
In reply to Domenico AndreoliQuoted 4 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
The BCM476x sports standard PL011 UARTs which are fully described and put to use with these few changes.
Given that this SoC uses an interrupt controller for which there's already a driver (so there's no need to wait for a later patch before interrupts work), and that patch 1/6 adds debug/bcm476x.S anyway, I'd be inclined to just squash this patch into the very first one myself.
If not, this patch isn't really just instantiating the console UART, but also allowing the DEBUG_LL implementation to be selected.
PATCH 6/6 ARM: bcm476x: Instantiate console UART
Quoted 6 lines · Stephen Warren
Quoted 4 lines · Domenico Andreoli
From: Domenico Andreoli <[email protected]>
The BCM476x sports standard PL011 UARTs which are fully described and put to use with these few changes.
Quoted 7 lines
Given that this SoC uses an interrupt controller for which there's already a driver (so there's no need to wait for a later patch before interrupts work), and that patch 1/6 adds
debug/bcm476x.Sanyway, I'd be inclined to just squash this patch into the very first one myself.If not, this patch isn't really just instantiating the console UART, but also allowing the
DEBUG_LLimplementation to be selected.
I created a separate patch for the DEBUG_LL and the rest is squashed in the first infrastructure patch.
Regards,
Domenico
cover ARM: Add support for Broadcom BCM476x SoCs
In reply to Domenico AndreoliQuoted 7 lines · Domenico Andreoli
Howdy,
this patchset adds (minimal) support for the Broadcom BCM476x ARM based
SoCs to the kernel, not to be confused with the already supported MIPS based BCM47xx SoC and other BCM47xx WiFi and GPS produced by Broadcom.This BCM476x is a DT-only multi-platform ARM platform and, at this spin,
Nice. I was planning on converting bcm2835 to multi-platform in 3.8; I assume it'll be pretty simple.
...
Quoted 2 lines
Additional support is being worked on.... and usb (DWC OTG) only attemped reusing s3c-hsotg.
Hmmm. I believe the bcm2835 uses DWC OTG. I wonder if the same driver will work there; USB in particular is a major pain point on the bcm2835...
...
Quoted 2 lines
It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined multi-platform support and Stephen's patch to add
DEBUG_LLto it.
There are two chunks of code related to that; uncompress.h and debug-macro.S. Rob/Arnd's multi-platform patches already allowed debug-macro.S to exist after multi-platform conversion, and my patches were about adding back support for uncompress.h. Given that the only reason I cared about uncompress was that Tegra's uncompress.h and debug-macro.s were closely coupled, and Nicolas Pitre indicated he thought that was a hack, I've re-written the Tegra code so they aren't coupled any more (this will be included in 3.8) and so I care much less about uncompress.h now. Unless anyone really pipes up and says they'd still like me to pursue uncompress.h in multi-platform, I'm inclined to drop it.
Quoted 3 lines
Special thanks go to Stephen Warren who, with the recently mainlined BCM2835, showed how to do things cleanly since the beginning and involuntarily spurred me to act.
Thanks! Do note that much of the code I upstreamed was originally written by others, although I did make quite a few changes during upstream submission.
cover ARM: Add support for Broadcom BCM476x SoCs
Quoted 7 lines · Stephen Warren
Quoted 3 lines · Domenico Andreoli
Additional support is being worked on.... and usb (DWC OTG) only attemped reusing s3c-hsotg.
Hmmm. I believe the bcm2835 uses DWC OTG. I wonder if the same driver will work there; USB in particular is a major pain point on the bcm2835...
I don't know any more how many versions of this driver are circulating, we may have some options.
Quoted 7 lines
Quoted 2 lines
It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined multi-platform support and Stephen's patch to add
DEBUG_LLto it....
aboutuncompress.hnow. Unless anyone really pipes up and says they'd still like me to pursueuncompress.hin multi-platform, I'm inclined to drop it.
I think it is valuable, multi-platform doesn't have any DEBUG_LL or earlyprintk support and your patch solves the problem though it won't work transparently on multiple boards at the same time, which is not a requirement.
To my understanding Nico was complaining for the specific Tegra (and TI) abuse, not the general approach.
Quoted 7 lines
Quoted 3 lines
Special thanks go to Stephen Warren who, with the recently mainlined BCM2835, showed how to do things cleanly since the beginning and involuntarily spurred me to act.
Thanks! Do note that much of the code I upstreamed was originally written by others, although I did make quite a few changes during upstream submission.
Yes, of course :)
Regards,
Domenico
cover ARM: Add support for Broadcom BCM476x SoCs
Quoted 15 lines · Domenico Andreoli
Quoted 7 lines · Stephen Warren
Quoted 3 lines · Domenico Andreoli
Additional support is being worked on.... and usb (DWC OTG) only attemped reusing s3c-hsotg.
Hmmm. I believe the bcm2835 uses DWC OTG. I wonder if the same driver will work there; USB in particular is a major pain point on the bcm2835...
I don't know any more how many versions of this driver are circulating, we may have some options.
Quoted 3 lines
Quoted 2 lines
It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined multi-platform support and Stephen's patch to add
DEBUG_LLto it.
Quoted 7 lines
Quoted 4 lines
...
aboutuncompress.hnow. Unless anyone really pipes up and says they'd still like me to pursueuncompress.hin multi-platform, I'm inclined to drop it.I think it is valuable, multi-platform doesn't have any
DEBUG_LLor earlyprintk support
Why do you say that? Locally I have ported Tegra to multi-platform and I certainly have earlyprintk enabled, and I dropped the patches to support uncompress.h in multi-platform from my local work branch.
cover ARM: Add support for Broadcom BCM476x SoCs
Quoted 21 lines · Stephen Warren
Quoted 20 lines · Domenico Andreoli
Quoted 7 lines · Stephen Warren
Quoted 3 lines · Domenico Andreoli
Additional support is being worked on.... and usb (DWC OTG) only attemped reusing s3c-hsotg.
Hmmm. I believe the bcm2835 uses DWC OTG. I wonder if the same driver will work there; USB in particular is a major pain point on the bcm2835...
I don't know any more how many versions of this driver are circulating, we may have some options.
Quoted 7 lines
Quoted 2 lines
It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined multi-platform support and Stephen's patch to add
DEBUG_LLto it....
aboutuncompress.hnow. Unless anyone really pipes up and says they'd still like me to pursueuncompress.hin multi-platform, I'm inclined to drop it.
Quoted 6 lines
Quoted 2 lines
I think it is valuable, multi-platform doesn't have any
DEBUG_LLor earlyprintk supportWhy do you say that? Locally I have ported Tegra to multi-platform and I certainly have earlyprintk enabled, and I dropped the patches to support
uncompress.hin multi-platform from my local work branch.
Yes, sorry, it's me. I tend to mix DEBUG_LL/earlyprintk with the decompressor output. Only the latter is broken on multi-platform.
cheers,
Domenico
cover ARM: Add support for Broadcom BCM476x SoCs
In reply to Domenico AndreoliQuoted 21 lines · Domenico Andreoli
Howdy,
this patchset adds (minimal) support for the Broadcom BCM476x ARM based
SoCs to the kernel, not to be confused with the already supported MIPS based BCM47xx SoC and other BCM47xx WiFi and GPS produced by Broadcom.This BCM476x is a DT-only multi-platform ARM platform and, at this spin, minimal in the features (boots nicely into initrd/busybox only) but also in the new code required, thanks to the existing drivers (and sweet DT) easily hooked up with the rest.
Additional support is being worked on. Pinctrl, clocks and gpios are almost ready for review. DMA (PL080) and/or sdhci have issues. Regulators (BCM59040) are minimal and usb (DWC OTG) only attemped reusing s3c-hsotg. Other fancy stuff (not too much) later and not all.
All this is my code, originating by me. The reference code I used is published by TomTom (my employer, who is aware but not involved at all) as part of the GPL compliance program but I don't plan to re-publish or maintain any part of it.
Quoted 8 lines
It's based on a random pre v3.7-rc1 commit (eb0ad9c) with mainlined multi-platform support and Stephen's patch to add
DEBUG_LLto it.Special thanks go to Stephen Warren who, with the recently mainlined BCM2835, showed how to do things cleanly since the beginning and involuntarily spurred me to act.
Any feedback is welcome.
Nice and clean. I wonder if it even warrants its own mach directory at this point, or over time if more of them can share. But that's a restructuring that can happen later.
For the series:
It's up to you if you want to send the driver patches through the respective maintainers, or if you want to collect their Acked-by's and merge it in one set of patches through arm-soc, let us know.
Thanks!
-Olof