ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
Subsystems (2)
PATCH v2 1/5 ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
From: Stephen Warren <[email protected]>
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but __bss_end__ gets set to the same value as __bss_start.
---
v2: Removed changes from some entries where it wasn't needed.
--- arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/cpu/u-boot.lds +4 -4
@@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .; - CPUDIR/start.o (.text) - *(.text) + CPUDIR/start.o (.text*) + *(.text*) } . = ALIGN(4);
@@ -43,7 +43,7 @@ SECTIONS . = ALIGN(4); .data : { - *(.data) + *(.data*) } . = ALIGN(4);
@@ -81,7 +81,7 @@ SECTIONS .bss __rel_dyn_start (OVERLAY) : { __bss_start = .; - *(.bss) + *(.bss*) . = ALIGN(4); __bss_end__ = .; }
Signature · 1 line
1.7.0.4
PATCH v2 2/5 ARM: enhance u-boot.lds to detect over-sized SPL
From: Stephen Warren <[email protected]>
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways:
1) An ASSERT() like this
2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all linker output into that region. Since u-boot.lds is used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues.
---
v2: New patch; replaced checks in Makefile.
--- arch/arm/cpu/u-boot.lds | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/cpu/u-boot.lds +4 -0
@@ -92,3 +92,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } } + +#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big"); +#endif
Signature · 1 line
1.7.0.4
PATCH v2 2/5 ARM: enhance u-boot.lds to detect over-sized SPL
Quoted 13 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Add an
ASSERT()tou-boot.ldsto detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE.Different .lds files implement this check in two possible ways:
1) AnASSERT()like this
2) Defining a MEMORY region of sizeSPL_MAX_SIZE, and re-directing all linker output into that region. Sinceu-boot.ldsis used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented.
Quoted 5 lines
Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues.
Signed-off-by Stephen Warren <[email protected]>
Nice!
Quoted 21 lines
---
v2: New patch; replaced checks inMakefile.--- arch/arm/cpu/u-boot.lds | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)arch/arm/cpu/u-boot.lds +4
-1@@ -92,3 +92,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } } + +#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big"); +#endif --1.7.0.4
PATCH v2 2/5 ARM: enhance u-boot.lds to detect over-sized SPL
In reply to Stephen WarrenQuoted 13 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Add an
ASSERT()tou-boot.ldsto detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE.Different .lds files implement this check in two possible ways:
1) AnASSERT()like this
2) Defining a MEMORY region of sizeSPL_MAX_SIZE, and re-directing all linker output into that region. Sinceu-boot.ldsis used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented.
Quoted 4 lines
Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues.
Quoted 22 lines
Signed-off-by Stephen Warren <[email protected]>---
v2: New patch; replaced checks inMakefile.--- arch/arm/cpu/u-boot.lds | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)arch/arm/cpu/u-boot.lds +4
-0@@ -92,3 +92,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } } + +#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big"); +#endifSignature · 1 line
1.7.0.4
Signature · 1 line
nvpublic
PATCH v2 3/5 ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it
In reply to Stephen WarrenFrom: Stephen Warren <[email protected]>
For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in TEXT_BASE for SPL and main U-Boot. Instead of manually calculating SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform the calculation automatically.
---
v2: New patch.
--- include/configs/tegra20-common.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
include/configs/tegra20-common.h +2 -1
@@ -188,7 +188,8 @@#define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ + CONFIG_SPL_TEXT_BASE)#define CONFIG_SYS_SPL_MALLOC_START 0x00090000#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000#define CONFIG_SPL_STACK 0x000ffffc
Signature · 1 line
1.7.0.4
PATCH v2 3/5 ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it
Hi Stephen,
Quoted 5 lines · Stephen Warren
From: Stephen Warren <[email protected]>
For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in
TEXT_BASEfor SPL and main U-Boot. Instead of manually calculating
s/for/between/ ?
Quoted 5 lines
SPL_MAX_SIZEbased on those twoTEXT_BASE, which can lead to errors if oneTEXT_BASEis changed without updatingSPL_MAX_SIZE, simply perform the calculation automatically.Signed-off-by Stephen Warren <[email protected]>
Quoted 21 lines
---
v2: New patch.--- include/configs/tegra20-common.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)include/configs/tegra20-common.h +2
-2@@ -188,7 +188,8 @@#define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ + CONFIG_SPL_TEXT_BASE)#define CONFIG_SYS_SPL_MALLOC_START 0x00090000#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000#define CONFIG_SPL_STACK 0x000ffffc --
Quoted 2 lines
1.7.0.4
Regards,
Simon
PATCH v2 3/5 ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it
In reply to Stephen WarrenQuoted 9 lines · Stephen Warren
From: Stephen Warren <[email protected]>
For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in
TEXT_BASEfor SPL and main U-Boot. Instead of manually calculatingSPL_MAX_SIZEbased on those twoTEXT_BASE, which can lead to errors if oneTEXT_BASEis changed without updatingSPL_MAX_SIZE, simply perform the calculation automatically.
Quoted 24 lines
Signed-off-by Stephen Warren <[email protected]>---
v2: New patch.--- include/configs/tegra20-common.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)include/configs/tegra20-common.h +2
-1@@ -188,7 +188,8 @@#define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ + CONFIG_SPL_TEXT_BASE)#define CONFIG_SYS_SPL_MALLOC_START 0x00090000#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000#define CONFIG_SPL_STACK 0x000ffffcSignature · 1 line
1.7.0.4
Signature · 1 line
nvpublic
PATCH v2 4/5 ARM: tegra: select between Seaboard/Ventana at compile time
In reply to Stephen WarrenFrom: Stephen Warren <[email protected]>
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
---
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
--- board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
board/nvidia/seaboard/seaboard.c +2 -2
@@ -35,6 +35,7 @@/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA /* * Routine: gpio_config_uart_seaboard * Description: Force GPIO_PI3 low on Seaboard so UART4 works.
@@ -48,11 +49,10 @@ static void gpio_config_uart_seaboard(void)void gpio_early_init_uart (void ) { -if (machine_is_ventana ()) -return ;gpio_config_uart_seaboard (); }#endif +#endif #ifdef CONFIG_TEGRA_MMC /*
Signature · 1 line
1.7.0.4
PATCH v2 4/5 ARM: tegra: select between Seaboard/Ventana at compile time
Hi Stephen,
Quoted 21 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Seaboard and Ventana are very similar boards, and so share the
seaboard.cboard file. The one difference needed so far is detected at run-time by callingmachine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.Signed-off-by Stephen Warren <[email protected]>---
v2: New patch to replace modification ofCONFIG_SYS_TEXT_BASE.--- board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)board/nvidia/seaboard/seaboard.c +0
-0
board/nvidia/seaboard/seaboard.c line 38
Quoted 4 lines
board/nvidia/seaboard/seaboard.c +1
-0@@ -35,6 +35,7 @@/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA
I guess this forks the board type again, so that it is no longer defined by the fdt. Is that what you intend, or do I have it wrong?
Quoted 17 lines
board/nvidia/seaboard/seaboard.c +1
-3/* * Routine: gpio_config_uart_seaboard * Description: Force GPIO_PI3 low on Seaboard so UART4 works. @@ -48,11 +49,10 @@ static void gpio_config_uart_seaboard(void)void gpio_early_init_uart (void ) { -if (machine_is_ventana ()) -return ;gpio_config_uart_seaboard (); }#endif +#endif #ifdef CONFIG_TEGRA_MMC /* --
Quoted 2 lines
1.7.0.4
Regards,
Simon
PATCH v2 4/5 ARM: tegra: select between Seaboard/Ventana at compile time
Quoted 10 lines · Simon Glass
Hi Stephen,
Quoted 6 lines · Stephen Warren
Seaboard and Ventana are very similar boards, and so share the
seaboard.cboard file. The one difference needed so far is detected at run-time by callingmachine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
Quoted 8 lines
board/nvidia/seaboard/seaboard.c line 38
Quoted 5 lines
board/nvidia/seaboard/seaboard.c +1
-0/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA I guess this forks the board type again, so that it is no longer defined by the fdt. Is that what you intend, or do I have it wrong?
This particular conditional was never driven by DT anyway; the original code called machine_is_ventana() which I believe would have been evaluated at compile time (and if not, the run-time evaluation wouldn't have been DT-driven).
I imagine the code I modified here will be ripped out soon anyway; you'd agreed to removing all the SPI/UART switching logic on Seaboard once the LCD patches were in; we can all just set the jumper to "UART" mode instead of "GPIO-controlled" then:-)
PATCH v2 4/5 ARM: tegra: select between Seaboard/Ventana at compile time
In reply to Stephen WarrenQuoted 21 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Seaboard and Ventana are very similar boards, and so share the
seaboard.cboard file. The one difference needed so far is detected at run-time by callingmachine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.Signed-off-by Stephen Warren <[email protected]>---
v2: New patch to replace modification ofCONFIG_SYS_TEXT_BASE.--- board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)board/nvidia/seaboard/seaboard.c +0
-0
board/nvidia/seaboard/seaboard.c line 38
Quoted 4 lines
board/nvidia/seaboard/seaboard.c +1
-0@@ -35,6 +35,7 @@/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA
Why not roll this into the previous #ifdef intead of the back to back #ifdefs?
Quoted 19 lines
board/nvidia/seaboard/seaboard.c +1
-2/* * Routine: gpio_config_uart_seaboard * Description: Force GPIO_PI3 low on Seaboard so UART4 works. @@ -48,11 +49,10 @@ static void gpio_config_uart_seaboard(void)void gpio_early_init_uart (void ) { -if (machine_is_ventana ()) -return ;gpio_config_uart_seaboard (); }#endif +#endif #ifdef CONFIG_TEGRA_MMC /* Signature · 1 line
1.7.0.4
-Allen
Signature · 1 line
nvpublic
PATCH v2 4/5 ARM: tegra: select between Seaboard/Ventana at compile time
Quoted 23 lines · Allen Martin
Quoted 22 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Seaboard and Ventana are very similar boards, and so share the
seaboard.cboard file. The one difference needed so far is detected at run-time by callingmachine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.Signed-off-by Stephen Warren <[email protected]>---
v2: New patch to replace modification ofCONFIG_SYS_TEXT_BASE.--- board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)board/nvidia/seaboard/seaboard.c +0
-0@@ -35,6 +35,7 @@
Quoted 5 lines
board/nvidia/seaboard/seaboard.c line 38
Quoted 3 lines
board/nvidia/seaboard/seaboard.c +1
-0/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA Why not roll this into the previous #ifdef intead of the back to back #ifdefs?
I guess I could, although it's going to get line-wrapped anyway due to length...
PATCH v2 4/5 ARM: tegra: select between Seaboard/Ventana at compile time
Quoted 24 lines · Stephen Warren
Quoted 23 lines · Allen Martin
Quoted 22 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Seaboard and Ventana are very similar boards, and so share the
seaboard.cboard file. The one difference needed so far is detected at run-time by callingmachine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.Signed-off-by Stephen Warren <[email protected]>---
v2: New patch to replace modification ofCONFIG_SYS_TEXT_BASE.--- board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)board/nvidia/seaboard/seaboard.c +0
-0@@ -35,6 +35,7 @@
Quoted 8 lines
Quoted 5 lines
board/nvidia/seaboard/seaboard.c line 38
Quoted 3 lines
board/nvidia/seaboard/seaboard.c +1
-0/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA Why not roll this into the previous #ifdef intead of the back to back #ifdefs?
I guess I could, although it's going to get line-wrapped anyway due to length...
Just a nit, your call. Either way:
And the whole series:
Signature · 1 line
nvpublic
PATCH v2 5/5 ARM: tegra: don't request GPIO from Seaboard's SPL
In reply to Stephen WarrenFrom: Stephen Warren <[email protected]>
Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size.
---
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
--- board/nvidia/seaboard/seaboard.c | 14 ++++---------- 1 files changed, 4 insertions(+), 10 deletions(-)
board/nvidia/seaboard/seaboard.c +4 -10
@@ -26,6 +26,7 @@#include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h>
@@ -36,21 +37,14 @@/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH #if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA -/* -* Routine: gpio_config_uart_seaboard -* Description: Force GPIO_PI3 low on Seaboard so UART4 works. -*/ -static void gpio_config_uart_seaboard (void ) +void gpio_early_init_uart (void ) {/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request (GPIO_PI3 ,NULL ); +#endif gpio_direction_output (GPIO_PI3 ,0 ); } - -void gpio_early_init_uart (void ) -{ -gpio_config_uart_seaboard (); -}#endif #endif
Signature · 1 line
1.7.0.4
PATCH v2 5/5 ARM: tegra: don't request GPIO from Seaboard's SPL
Quoted 11 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size.
Signed-off-by Stephen Warren <[email protected]>
Quoted 46 lines
---
v2: New patch to replace modification ofCONFIG_SYS_TEXT_BASE.--- board/nvidia/seaboard/seaboard.c | 14 ++++---------- 1 files changed, 4 insertions(+), 10 deletions(-)board/nvidia/seaboard/seaboard.c +4
-11@@ -26,6 +26,7 @@#include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -36,21 +37,14 @@/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH #if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA -/* -* Routine: gpio_config_uart_seaboard -* Description: Force GPIO_PI3 low on Seaboard so UART4 works. -*/ -static void gpio_config_uart_seaboard (void ) +void gpio_early_init_uart (void ) {/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request (GPIO_PI3 ,NULL ); +#endif gpio_direction_output (GPIO_PI3 ,0 ); } - -void gpio_early_init_uart (void ) -{ -gpio_config_uart_seaboard (); -}#endif #endif --1.7.0.4
PATCH v2 5/5 ARM: tegra: don't request GPIO from Seaboard's SPL
In reply to Stephen WarrenQuoted 10 lines · Stephen Warren
From: Stephen Warren <[email protected]>
Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size.
Quoted 47 lines
Signed-off-by Stephen Warren <[email protected]>---
v2: New patch to replace modification ofCONFIG_SYS_TEXT_BASE.--- board/nvidia/seaboard/seaboard.c | 14 ++++---------- 1 files changed, 4 insertions(+), 10 deletions(-)board/nvidia/seaboard/seaboard.c +4
-10@@ -26,6 +26,7 @@#include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -36,21 +37,14 @@/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH #if CONFIG_MACH_TYPE !=MACH_TYPE_VENTANA -/* -* Routine: gpio_config_uart_seaboard -* Description: Force GPIO_PI3 low on Seaboard so UART4 works. -*/ -static void gpio_config_uart_seaboard (void ) +void gpio_early_init_uart (void ) {/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request (GPIO_PI3 ,NULL ); +#endif gpio_direction_output (GPIO_PI3 ,0 ); } - -void gpio_early_init_uart (void ) -{ -gpio_config_uart_seaboard (); -}#endif #endif Signature · 1 line
1.7.0.4
Signature · 1 line
nvpublic
PATCH v2 1/5 ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
In reply to Stephen WarrenQuoted 9 lines · Stephen Warren
From: Stephen Warren <[email protected]>
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but
__bss_end__gets set to the same value as__bss_start.
Quoted 43 lines
Signed-off-by Stephen Warren <[email protected]>---
v2: Removed changes from some entries where it wasn't needed.--- arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)arch/arm/cpu/u-boot.lds +4
-4@@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .; - CPUDIR/start.o (.text) - *(.text) + CPUDIR/start.o (.text*) + *(.text*) } . = ALIGN(4);@@ -43,7 +43,7 @@ SECTIONS . = ALIGN(4); .data : { - *(.data) + *(.data*) } . = ALIGN(4);@@ -81,7 +81,7 @@ SECTIONS .bss __rel_dyn_start (OVERLAY) : { __bss_start = .; - *(.bss) + *(.bss*) . = ALIGN(4); __bss_end__ = .; }Signature · 1 line
1.7.0.4
Signature · 1 line
nvpublic
PATCH v2 1/5 ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
In reply to Stephen WarrenHi Stephen,
Quoted 41 lines · Stephen Warren
From: Stephen Warren <[email protected]>
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but
__bss_end__gets set to the same value as__bss_start.Signed-off-by Stephen Warren <[email protected]>---
v2: Removed changes from some entries where it wasn't needed.--- arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)arch/arm/cpu/u-boot.lds +3
-3@@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .; - CPUDIR/start.o (.text) - *(.text) + CPUDIR/start.o (.text*) + *(.text*) } . = ALIGN(4);@@ -43,7 +43,7 @@ SECTIONS . = ALIGN(4); .data : { - *(.data) + *(.data*) } . = ALIGN(4);
arch/arm/cpu/u-boot.lds SECTIONS · line 87
Quoted 8 lines
arch/arm/cpu/u-boot.lds +1
-1@@ -81,7 +81,7 @@ SECTIONS .bss __rel_dyn_start (OVERLAY) : { __bss_start = .; - *(.bss) + *(.bss*) . = ALIGN(4); __bss_end__ = .; }
Applied (this patch only in the series) to u-boot-arm/master, thanks!
Amicalement,
Signature · 1 line
Albert.
PATCH v2 1/5 ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
Quoted 47 lines · Albert ARIBAUD
Hi Stephen,
Quoted 42 lines · Stephen Warren
From: Stephen Warren <[email protected]>
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but
__bss_end__gets set to the same value as__bss_start.Signed-off-by Stephen Warren <[email protected]>---
v2: Removed changes from some entries where it wasn't needed.--- arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)arch/arm/cpu/u-boot.lds +3
-3@@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .; - CPUDIR/start.o (.text) - *(.text) + CPUDIR/start.o (.text*) + *(.text*) } . = ALIGN(4);@@ -43,7 +43,7 @@ SECTIONS . = ALIGN(4); .data : { - *(.data) + *(.data*) } . = ALIGN(4);@@ -81,7 +81,7 @@ SECTIONS
Quoted 9 lines
arch/arm/cpu/u-boot.lds SECTIONS · line 87
Quoted 7 lines
arch/arm/cpu/u-boot.lds +1
-1.bss __rel_dyn_start (OVERLAY) : { __bss_start = .; - *(.bss) + *(.bss*) . = ALIGN(4); __bss_end__ = .; }Applied (this patch only in the series) to u-boot-arm/master, thanks!
Correction applied was V3, not V2, of the patch.
Amicalement,
Signature · 1 line
Albert.