cm4008: use common cfi_flash support

This change allows use of other flash chips than the two supported by the cm4008 flash.c. Tested with Micrel KSZ8695X demo board.

Signed-off-by Yann Vernier <[email protected]>

---
 board/cm4008/Makefile    |    2 +-
 include/configs/cm4008.h |    4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

board/cm4008/Makefile +0 -0

index 5b98824..22fd74e 100644

board/cm4008/Makefile +0 -0

 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

include/configs/cm4008.h +0 -0

index 7c2e113..6d1a1ae 100644

This change allows use of other flash chips than the two supported by the cm4008 flash.c. Tested with Micrel KSZ8695X demo board.
---
Changes for v2:
- Update cm41xx also
- Remove unused board specific flash code

Signed-off-by Yann Vernier <[email protected]>

---
 board/cm4008/Makefile    |    2 +-
 board/cm4008/flash.c     |  410 ----------------------------------------------
 board/cm41xx/Makefile    |    2 +-
 board/cm41xx/flash.c     |  410 ----------------------------------------------
 include/configs/cm4008.h |    4 +
 include/configs/cm41xx.h |    4 +
 6 files changed, 10 insertions(+), 822 deletions(-)
 delete mode 100644 board/cm4008/flash.c
 delete mode 100644 board/cm41xx/flash.c

include/configs/cm4008.h +2 -0

+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
+
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */

include/configs/cm41xx.h +0 -0

index d29040c..3f46b12 100644

This change allows use of other flash chips than the two supported by the cm4008 flash.c. Tested with Micrel KSZ8695X demo board.
---
Changes for v2:
- Update cm41xx also
- Remove unused board specific flash code
Changes for v3:
- Do not define to 1 where it is not required, just define

Signed-off-by Yann Vernier <[email protected]>

---
 board/cm4008/Makefile    |    2 +-
 board/cm4008/flash.c     |  410 ----------------------------------------------
 board/cm41xx/Makefile    |    2 +-
 board/cm41xx/flash.c     |  410 ----------------------------------------------
 include/configs/cm4008.h |    4 +
 include/configs/cm41xx.h |    4 +
 6 files changed, 10 insertions(+), 822 deletions(-)
 delete mode 100644 board/cm4008/flash.c
 delete mode 100644 board/cm41xx/flash.c

Quoted 9 lines · Yann Vernier

This change allows use of other flash chips than the two supported by the cm4008 flash.c. Tested with Micrel KSZ8695X demo board.
---
Changes for v2:
- Update cm41xx also
- Remove unused board specific flash code
Changes for v3:
- Do not define to 1 where it is not required, just define

Quoted 1 line

Signed-off-by Yann Vernier <[email protected]>

Acked-by Andreas Bie?mann <[email protected]>

(although I do not know who will pick it ...)

Always a problem, those board config patches... :)

I'll take this one in u-boot-arm/next, but later this week-end. if by Monday I haven't sent an 'applied' mail, ping me.

Quoted 4 lines · On Fri, 6 Jul 2012 13:33:42 +0200 Albert ARIBAUD <[email protected]>…

Always a problem, those board config patches... :)

I'll take this one in u-boot-arm/next, but later this week-end. if by Monday I haven't sent an 'applied' mail, ping me.

I haven't seen an applied mail, nor a commit in the git, so I figure this is still not merged. I've since made an attempt at cleaning up the magic constants. Since this is fairly intrusive I have a much larger patch affecting the same sections. I've attempted to split it up, though some combinations of these patches will likely not be very useful.

Yann Vernier (11):
arm: ks8695: use defined constants for UART
arm: ks8695: more macros for register values
arm: ks8695eth: Use MAC address from environment
arm: cm4008, cm41xx: use common cfi_flash support
arm: cm4008, cm41xx: set gd->ram_size in dram_init
arm: cm4008, cm41xx: Fix ROM relocation
arm: ks8695/cm4008/cm41xx: Parameterize SDRAM
arm: cm4008, cm41xx: don't define to 1
arm: ks8695/cm4xxx: don't reconfigure switch
arm: ks8695: document bus speed
arm: cm4008, cm41xx: read MAC address from flash

 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S  |   95 +++---
 arch/arm/include/asm/arch-ks8695/platform.h  |   55 ++--
 arch/arm/include/asm/arch-ks8695/regvalues.h |  112 +++++++
 board/cm4008/Makefile                        |    2 +-
 board/cm4008/cm4008.c                        |   17 +-
 board/cm4008/config.mk                       |    1 -
 board/cm4008/flash.c                         |  410
 --------------------------
 board/cm41xx/Makefile                        |    2 +-
 board/cm41xx/cm41xx.c                        |   17 +-
 board/cm41xx/config.mk                       |    1 -
 board/cm41xx/flash.c                         |  410
 --------------------------
 drivers/net/ks8695eth.c                      |   38 +--
 include/configs/cm4008.h                     |   38 ++-

include/configs/cm41xx.h | 32 +- 14 files
changed, 305 insertions(+), 925 deletions(-) create mode 100644 arch/arm/include/asm/arch-ks8695/regvalues.h delete mode 100644 board/cm4008/config.mk delete mode 100644 board/cm4008/flash.c delete mode 100644 board/cm41xx/config.mk delete mode 100644 board/cm41xx/flash.c

Sorry it took me so long to crawl my backlog... This series was posted with long lines folded apparently, which makes it impossible to process and explains why patchwork did not have all of it. Can you please repost it, this time using 'git send-email'?

CONFIG_BAUDRATE and KS8695_UART_LINEC_WLEN8 used for UART registers

---
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +0 -0

index e9f1227..1bba571 100644
@@ -72,10 +72,10 @@ lowlevel_init:
 	 * enable UART for early debug trace
 	 */
 	ldr	r1, =(KS8695_IO_BASE+KS8695_UART_DIVISOR)

Adding macros for more configurable lowlevel_init code. Also cleanup of some typos.

---
 arch/arm/include/asm/arch-ks8695/platform.h  |   55 ++++++++-----
 arch/arm/include/asm/arch-ks8695/regvalues.h |  112 ++++++++++++++++++++++++++
 2 files changed, 149 insertions(+), 18 deletions(-)

arch/arm/include/asm/arch-ks8695/platform.h +0 -0

index de20015..0ed0ecb 100644

arch/arm/include/asm/arch-ks8695/platform.h +0 -0

 #define KS8695_SDRAM_START	    0x00000000
 #define KS8695_SDRAM_SIZE	    0x01000000

@@ -27,19 +27,19 @@
 #define KS8695_IO_BASE		    0x03FF0000
 #define KS8695_IO_SIZE		    0x00010000
 

arch/arm/include/asm/arch-ks8695/platform.h +32 -13

 #define KS8695_IO_CTRL0		    0x4000
 #define KS8695_IO_CTRL1		    0x4004
 #define KS8695_IO_CTRL2		    0x4008
 #define KS8695_IO_CTRL3		    0x400C
 
-/*memory control registers offset difinitions*/
+/*memory control register offset definitions*/
 #define KS8695_MEM_CTRL0	    0x4010
 #define KS8695_MEM_CTRL1	    0x4014
 #define KS8695_MEM_CTRL2	    0x4018

@@ -51,7 +51,7 @@
 #define KS8695_SDRAM_BUFFER	    0x403C
 #define KS8695_SDRAM_REFRESH	    0x4040
 
-/*WAN control registers offset difinitions*/
+/*WAN control register offset definitions*/
 #define KS8695_WAN_DMA_TX	    0x6000
 #define KS8695_WAN_DMA_RX	    0x6004
 #define KS8695_WAN_DMA_TX_START	    0x6008

@@ -63,7 +63,7 @@
 #define KS8695_WAN_MAC_ELOW	    0x6080
 #define KS8695_WAN_MAC_EHIGH	    0x6084
 
-/*LAN control registers offset difinitions*/
+/*LAN control register offset definitions*/
 #define KS8695_LAN_DMA_TX	    0x8000
 #define KS8695_LAN_DMA_RX	    0x8004
 #define KS8695_LAN_DMA_TX_START	    0x8008

@@ -75,7 +75,7 @@
 #define KS8695_LAN_MAC_ELOW	    0X8080
 #define KS8695_LAN_MAC_EHIGH	    0X8084
 
-/*HPNA control registers offset difinitions*/
+/*HPNA control register offset definitions*/
 #define KS8695_HPNA_DMA_TX	    0xA000
 #define KS8695_HPNA_DMA_RX	    0xA004
 #define KS8695_HPNA_DMA_TX_START    0xA008

@@ -87,7 +87,7 @@
 #define KS8695_HPNA_MAC_ELOW	    0xA080
 #define KS8695_HPNA_MAC_EHIGH	    0xA084
 
-/*UART control registers offset difinitions*/
+/*UART control register offset definitions*/
 #define KS8695_UART_RX_BUFFER	    0xE000
 #define KS8695_UART_TX_HOLDING	    0xE004
 

@@ -133,7 +133,7 @@
 #define KS8695_UART_DIVISOR	    0xE01C
 #define KS8695_UART_STATUS	    0xE020
 
-/*Interrupt controlller registers offset difinitions*/
+/*Interrupt controller register offset definitions*/
 #define KS8695_INT_CONTL	    0xE200
 #define KS8695_INT_ENABLE	    0xE204
 #define KS8695_INT_ENABLE_MODEM	    0x0800

@@ -154,19 +154,19 @@
 #define KS8695_FIQ_PEND_PRIORITY    0xE230
 #define KS8695_IRQ_PEND_PRIORITY    0xE234
 
-/*timer registers offset difinitions*/
+/*timer register offset definitions*/
 #define KS8695_TIMER_CTRL	    0xE400
 #define KS8695_TIMER1		    0xE404
 #define KS8695_TIMER0		    0xE408
 #define KS8695_TIMER1_PCOUNT	    0xE40C
 #define KS8695_TIMER0_PCOUNT	    0xE410
 
-/*GPIO registers offset difinitions*/
+/*GPIO register offset definitions*/
 #define KS8695_GPIO_MODE	    0xE600
 #define KS8695_GPIO_CTRL	    0xE604
 #define KS8695_GPIO_DATA	    0xE608
 
-/*SWITCH registers offset difinitions*/
+/*SWITCH register offset definitions*/
 #define KS8695_SWITCH_CTRL0	    0xE800
 #define KS8695_SWITCH_CTRL1	    0xE804
 #define KS8695_SWITCH_PORT1	    0xE808

@@ -184,13 +184,13 @@
 #define KS8695_SWITCH_LPPM12	    0xE874
 #define KS8695_SWITCH_LPPM34	    0xE878
 
-/*host communication registers difinitions*/
+/*host communication register definitions*/
 #define KS8695_DSCP_HIGH	    0xE834
 #define KS8695_DSCP_LOW		    0xE838
 #define KS8695_SWITCH_MAC_HIGH	    0xE83C
 #define KS8695_SWITCH_MAC_LOW	    0xE840
 
-/*miscellaneours registers difinitions*/
+/*miscellaneous register definitions*/
 #define KS8695_MANAGE_COUNTER	    0xE844
 #define KS8695_MANAGE_DATA	    0xE848
 #define KS8695_LAN12_POWERMAGR	    0xE84C

@@ -205,7 +205,7 @@
 #define KS8695_WAN_PHY_CONTROL	    0xEA14
 #define KS8695_WAN_PHY_STATUS	    0xEA18
 
-/* bus clock definitions*/
+/* bus clock definitions for KS8695_SYSTEM_BUS_CLOCK */
 #define KS8695_BUS_CLOCK_125MHZ	    0x0
 #define KS8695_BUS_CLOCK_100MHZ	    0x1
 #define KS8695_BUS_CLOCK_62MHZ	    0x2

@@ -215,8 +215,27 @@
 #define KS8695_BUS_CLOCK_31MHZ	    0x6
 #define KS8695_BUS_CLOCK_25MHZ	    0x7
 
+/* bus width definitions for KS8695_MEM_GENERAL and SDRAM_CTRL */
+#define KS8695_BUS_WIDTH_OFF	0
+#define KS8695_BUS_WIDTH_8	1
+#define KS8695_BUS_WIDTH_16	2
+#define KS8695_BUS_WIDTH_32	3
+
+/* register value definitions for memory controller */
+#define KS8695_SDCON_D_OFF	(KS8695_BUS_WIDTH_OFF<<1)
+#define KS8695_SDCON_D_8	(KS8695_BUS_WIDTH_8<<1)
+#define KS8695_SDCON_D_16	(KS8695_BUS_WIDTH_16<<1)
+#define KS8695_SDCON_D_32	(KS8695_BUS_WIDTH_32<<1)
+#define KS8695_SDCON_2BANK	0x000
+#define KS8695_SDCON_4BANK	0x008
+#define KS8695_SDCON_CA_8BIT	0x000
+#define KS8695_SDCON_CA_9BIT	0x100
+#define KS8695_SDCON_CA_10BIT	0x200
+#define KS8695_SDCON_CA_11BIT	0x300
+#define KS8695_MEM_RANGE(BASE,SIZE) (((BASE)&0x03ff0000)>>(16-12) | (((BASE)+(SIZE)-1)&0x03ff0000)<<(22-16))
+
 /* -------------------------------------------------------------------------------
- *  definations for IRQ
+ *  definitions for IRQ
  * -------------------------------------------------------------------------------*/
 
 #define KS8695_INT_EXT_INT0		       2

arch/arm/include/asm/arch-ks8695/regvalues.h new file +7 -0

new file mode 100644
index 0000000..7d29bbf
@@ -0,0 +1,112 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,

arch/arm/include/asm/arch-ks8695/regvalues.h new file +84 -0

+/* This file calculates register values set by low level initialization code
+   from configuration macros */
+
+#define CONFIG_SYS_SDCS0_BASE	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_SDCS0_SIZE	CONFIG_SYS_SDRAM_SIZE
+
+#ifndef CONFIG_SYS_RCS0_SPEED
+/* access cycle time 5tmult+6, normal ROM (no pages) */
+# define CONFIG_SYS_RCS0_SPEED 0x040
+#endif
+#ifndef CONFIG_SYS_RCS0_WIDTH
+# define CONFIG_SYS_RCS0_WIDTH KS8695_BUS_WIDTH_8
+#endif
+
+#ifdef CONFIG_SYS_RCS1_BASE
+# ifndef CONFIG_SYS_RCS1_WIDTH
+#  define CONFIG_SYS_RCS1_WIDTH CONFIG_SYS_RCS0_WIDTH
+# endif
+# ifndef CONFIG_SYS_RCS1_SPEED
+#  define CONFIG_SYS_RCS1_SPEED CONFIG_SYS_RCS0_SPEED
+# endif
+#else
+# define CONFIG_SYS_RCS1_WIDTH KS8695_BUS_WIDTH_OFF
+#endif
+
+#ifndef CONFIG_SYS_ECS0_WIDTH
+# define CONFIG_SYS_ECS0_WIDTH KS8695_BUS_WIDTH_OFF
+#endif
+#ifndef CONFIG_SYS_ECS1_WIDTH
+# define CONFIG_SYS_ECS1_WIDTH KS8695_BUS_WIDTH_OFF
+#endif
+#ifndef CONFIG_SYS_ECS2_WIDTH
+# define CONFIG_SYS_ECS2_WIDTH KS8695_BUS_WIDTH_OFF
+#endif
+
+#ifndef CONFIG_KS8695_TMULT
+# define CONFIG_KS8695_TMULT 3
+#endif
+
+#if CONFIG_SYS_SDCS0_PARAMS
+# ifndef CONFIG_SYS_SDCS0_BASE
+#  define CONFIG_SYS_SDCS0_BASE CONFIG_SYS_SDRAM_BASE
+#  define CONFIG_SYS_SDCS0_SIZE CONFIG_SYS_SDRAM_SIZE
+# endif
+#endif
+
+#define CONFIG_KS8695_ROMCON0_VALUE					\
+	(CONFIG_SYS_RCS0_SPEED |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_RCS0_BASE,CONFIG_SYS_RCS0_SIZE))
+#define CONFIG_KS8695_ROMCON1_VALUE					\
+	(CONFIG_SYS_RCS1_SPEED |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_RCS1_BASE,CONFIG_SYS_RCS1_SIZE))
+#define CONFIG_KS8695_EXTACON0_VALUE					\
+	(CONFIG_SYS_ECS0_SPEED |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_ECS0_BASE,CONFIG_SYS_ECS0_SIZE))
+#define CONFIG_KS8695_EXTACON1_VALUE					\
+	(CONFIG_SYS_ECS1_SPEED |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_ECS1_BASE,CONFIG_SYS_ECS1_SIZE))
+#define CONFIG_KS8695_EXTACON2_VALUE					\
+	(CONFIG_SYS_ECS2_SPEED |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_ECS2_BASE,CONFIG_SYS_ECS2_SIZE))
+
+#define CONFIG_KS8695_SDCON0_VALUE					\
+	(CONFIG_SYS_SDCS0_PARAMS |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_SDCS0_BASE,CONFIG_SYS_SDCS0_SIZE))
+#define CONFIG_KS8695_SDCON1_VALUE					\
+	(CONFIG_SYS_SDCS1_PARAMS |					\
+	 KS8695_MEM_RANGE(CONFIG_SYS_SDCS1_BASE,CONFIG_SYS_SDCS1_SIZE))
+
+#if CONFIG_SYS_SDRAM_RAS_CAS_DELAY<1 || CONFIG_SYS_SDRAM_RAS_CAS_DELAY>4
+#error Unsupported SDRAM timing: RAS to CAS delay
+#endif
+#ifndef CONFIG_SYS_SDRAM_CAS_LATENCY
+#define CONFIG_SYS_SDRAM_CAS_LATENCY ((CONFIG_SYS_SDRAM_MODE>>4)&7)
+#endif
+#if CONFIG_SYS_SDRAM_CAS_LATENCY<1 || CONFIG_SYS_SDRAM_CAS_LATENCY>4
+#error Unsupported SDRAM timing: CAS latency
+#endif
+#define CONFIG_KS8695_SDGCON_VALUE			\
+	((CONFIG_SYS_SDRAM_RAS_CAS_DELAY-1)<<2 |	\
+	 (CONFIG_SYS_SDRAM_CAS_LATENCY-1))
+#ifndef CONFIG_SYS_SDRAM_REFRESH_RATE
+#define CONFIG_SYS_SDRAM_REFRESH_RATE	0x0190
+#endif

Sorry! I didn't remember this patch (regvalues.h) is where a poorly named macro (comment on patch 7/11, SDRAM parameters) was defined. I will fix it.

Removed board specific MAC reading code from driver. Should move the reading to the cm4008/cm41xx board code.

---
 drivers/net/ks8695eth.c |   38 +++++++++-----------------------------
 1 file changed, 9 insertions(+), 29 deletions(-)

drivers/net/ks8695eth.c +8 -29

index b4904b6..2dda7ab 100644
@@ -71,30 +71,13 @@ volatile uint8_t ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2
 
 /****************************************************************************/
 
-/*
- *	Ideally we want to use the MAC address stored in flash.
- *	But we do some sanity checks in case they are not present
- *	first.
- */
-unsigned char eth_mac[] = {
-	0x00, 0x13, 0xc6, 0x00, 0x00, 0x00
-};
-
-void ks8695_getmac(void)
+static int ks8695_set_mac_address(struct eth_device *dev)
 {
-	unsigned char *fp;
-	int i;
-
-	/* Check if flash MAC is valid */
-	fp = (unsigned char *) 0x0201c000;
-	for (i = 0; (i < 6); i++) {
-		if ((fp[i] != 0) && (fp[i] != 0xff))
-			break;
-	}
-
-	/* If we found a valid looking MAC address then use it */
-	if (i < 6)
-		memcpy(&eth_mac[0], fp, 6);
+	/* Set MAC address */
+	ks8695_write(KS8695_LAN_MAC_LOW, (dev->enetaddr[5] | (dev->enetaddr[4] << 8) |
+		(dev->enetaddr[3] << 16) | (dev->enetaddr[2] << 24)));
+	ks8695_write(KS8695_LAN_MAC_HIGH, (dev->enetaddr[1] | (dev->enetaddr[0] << 8)));
+	return 0;
 }
 
 /****************************************************************************/

@@ -109,12 +92,8 @@ static int ks8695_eth_init(struct eth_device *dev, bd_t *bd)
 	ks8695_write(KS8695_LAN_DMA_TX, 0x80000000);
 	ks8695_write(KS8695_LAN_DMA_RX, 0x80000000);
 
-	ks8695_getmac();
-
 	/* Set MAC address */
-	ks8695_write(KS8695_LAN_MAC_LOW, (eth_mac[5] | (eth_mac[4] << 8) |
-		(eth_mac[3] << 16) | (eth_mac[2] << 24)));
-	ks8695_write(KS8695_LAN_MAC_HIGH, (eth_mac[1] | (eth_mac[0] << 8)));
+	ks8695_set_mac_address(dev);
 
 	/* Turn the 4 port switch on */
 	i = ks8695_read(KS8695_SWITCH_CTRL0);

@@ -150,7 +129,7 @@ static int ks8695_eth_init(struct eth_device *dev, bd_t *bd)
 	ks8695_write(KS8695_LAN_DMA_RX, 0x71);
 	ks8695_write(KS8695_LAN_DMA_RX_START, 0x1);
 
-	printf("KS8695 ETHERNET: %pM\n", eth_mac);
+	printf("KS8695 ETHERNET: %pM\n", dev->enetaddr);
 	return 0;
 }
 

Removed board specific MAC reading code from driver. Should move the reading to the cm4008/cm41xx board code.

---
 drivers/net/ks8695eth.c |   38 +++++++++-----------------------------
 1 file changed, 9 insertions(+), 29 deletions(-)

drivers/net/ks8695eth.c +6 -23

index b4904b6..2dda7ab 100644
@@ -71,30 +71,13 @@ volatile uint8_t ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2
 
 /****************************************************************************/
 
-/*
- *     Ideally we want to use the MAC address stored in flash.
- *     But we do some sanity checks in case they are not present
- *     first.
- */
-unsigned char eth_mac[] = {
-       0x00, 0x13, 0xc6, 0x00, 0x00, 0x00
-};
-
-void ks8695_getmac(void)
+static int ks8695_set_mac_address(struct eth_device *dev)
 {
-       unsigned char *fp;
-       int i;
-
-       /* Check if flash MAC is valid */
-       fp = (unsigned char *) 0x0201c000;
-       for (i = 0; (i < 6); i++) {
-               if ((fp[i] != 0) && (fp[i] != 0xff))
-                       break;
-       }
-
-       /* If we found a valid looking MAC address then use it */
-       if (i < 6)
-               memcpy(&eth_mac[0], fp, 6);
+       /* Set MAC address */
+       ks8695_write(KS8695_LAN_MAC_LOW, (dev->enetaddr[5] | (dev->enetaddr[4] << 8) |
+               (dev->enetaddr[3] << 16) | (dev->enetaddr[2] << 24)));
+       ks8695_write(KS8695_LAN_MAC_HIGH, (dev->enetaddr[1] | (dev->enetaddr[0] << 8)));
+       return 0;
 }
 
 /****************************************************************************/

drivers/net/ks8695eth.c +2 -2

        /* Turn the 4 port switch on */
        i = ks8695_read(KS8695_SWITCH_CTRL0);

@@ -150,7 +129,7 @@ static int ks8695_eth_init(struct eth_device *dev, bd_t *bd)
        ks8695_write(KS8695_LAN_DMA_RX, 0x71);
        ks8695_write(KS8695_LAN_DMA_RX_START, 0x1);
 
-       printf("KS8695 ETHERNET: %pM\n", eth_mac);
+       printf("KS8695 ETHERNET: %pM\n", dev->enetaddr);
        return 0;
 }
 

@@ -234,6 +213,7 @@ int ks8695_eth_initialize(void)
        dev->halt = ks8695_eth_halt;
        dev->send = ks8695_eth_send;
        dev->recv = ks8695_eth_recv;
+       dev->write_hwaddr = ks8695_set_mac_address;
        strcpy(dev->name, "ks8695eth");
 
        eth_register(dev);
--

1.7.10.4

Hi Yann,

Quoted 56 lines · Yann Vernier

Removed board specific MAC reading code from driver. Should move the reading to the cm4008/cm41xx board code.

---
 drivers/net/ks8695eth.c |   38

+++++++++----------------------------- 1 file changed, 9 insertions(+), 29 deletions(-)

drivers/net/ks8695eth.c +0 -0

index b4904b6..2dda7ab 100644
@@ -71,30 +71,13 @@ volatile uint8_t

ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2

/****************************************************************************/

drivers/net/ks8695eth.c +3 -23

-/*
- *     Ideally we want to use the MAC address stored in flash.
- *     But we do some sanity checks in case they are not present
- *     first.
- */
-unsigned char eth_mac[] = {
-       0x00, 0x13, 0xc6, 0x00, 0x00, 0x00
-};
-
-void ks8695_getmac(void)
+static int ks8695_set_mac_address(struct eth_device *dev)
 {
-       unsigned char *fp;
-       int i;
-
-       /* Check if flash MAC is valid */
-       fp = (unsigned char *) 0x0201c000;
-       for (i = 0; (i < 6); i++) {
-               if ((fp[i] != 0) && (fp[i] != 0xff))
-                       break;
-       }
-
-       /* If we found a valid looking MAC address then use it */
-       if (i < 6)
-               memcpy(&eth_mac[0], fp, 6);
+       /* Set MAC address */
+       ks8695_write(KS8695_LAN_MAC_LOW, (dev->enetaddr[5] |

(dev->enetaddr[4] << 8) |
+ (dev->enetaddr[3] << 16) | (dev->enetaddr[2] <<
24)));
+ ks8695_write(KS8695_LAN_MAC_HIGH, (dev->enetaddr[1] |
(dev->enetaddr[0] << 8)));

drivers/net/ks8695eth.c +1 -0

+       return 0;
 }
 
 /****************************************************************************/

@@ -109,12 +92,8 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_TX, 0x80000000);
        ks8695_write(KS8695_LAN_DMA_RX, 0x80000000);
 

Quoted 9 lines

drivers/net/ks8695eth.c +0 -3

-       ks8695_getmac();
-
        /* Set MAC address */
-       ks8695_write(KS8695_LAN_MAC_LOW, (eth_mac[5] | (eth_mac[4]

<< 8) |

drivers/net/ks8695eth.c +0 -2

-               (eth_mac[3] << 16) | (eth_mac[2] << 24)));
-       ks8695_write(KS8695_LAN_MAC_HIGH, (eth_mac[1] | (eth_mac[0]

<< 8)));
+ ks8695_set_mac_address(dev);

Why do you set the MAC address here? It should be set for you by the network infrastructure without this call.

Quoted 20 lines

        /* Turn the 4 port switch on */
        i = ks8695_read(KS8695_SWITCH_CTRL0);

drivers/net/ks8695eth.c +2 -2

@@ -150,7 +129,7 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_RX, 0x71);
        ks8695_write(KS8695_LAN_DMA_RX_START, 0x1);
 
-       printf("KS8695 ETHERNET: %pM\n", eth_mac);
+       printf("KS8695 ETHERNET: %pM\n", dev->enetaddr);
        return 0;
 }
 

@@ -234,6 +213,7 @@ int ks8695_eth_initialize(void)
        dev->halt = ks8695_eth_halt;
        dev->send = ks8695_eth_send;
        dev->recv = ks8695_eth_recv;
+       dev->write_hwaddr = ks8695_set_mac_address;
        strcpy(dev->name, "ks8695eth");
 
        eth_register(dev);
--

Quoted 1 line

1.7.10.4

-Joe

Quoted 60 lines · On Thu, 18 Oct 2012 15:55:31 -0500 Joe Hershberger <[email protected]>…

Hi Yann,

Quoted 56 lines · Yann Vernier

Removed board specific MAC reading code from driver. Should move the reading to the cm4008/cm41xx board code.

---
 drivers/net/ks8695eth.c |   38

+++++++++----------------------------- 1 file changed, 9 insertions(+), 29 deletions(-)

drivers/net/ks8695eth.c +0 -0

index b4904b6..2dda7ab 100644
@@ -71,30 +71,13 @@ volatile uint8_t

ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2

/****************************************************************************/

drivers/net/ks8695eth.c +3 -23

-/*
- *     Ideally we want to use the MAC address stored in flash.
- *     But we do some sanity checks in case they are not present
- *     first.
- */
-unsigned char eth_mac[] = {
-       0x00, 0x13, 0xc6, 0x00, 0x00, 0x00
-};
-
-void ks8695_getmac(void)
+static int ks8695_set_mac_address(struct eth_device *dev)
 {
-       unsigned char *fp;
-       int i;
-
-       /* Check if flash MAC is valid */
-       fp = (unsigned char *) 0x0201c000;
-       for (i = 0; (i < 6); i++) {
-               if ((fp[i] != 0) && (fp[i] != 0xff))
-                       break;
-       }
-
-       /* If we found a valid looking MAC address then use it */
-       if (i < 6)
-               memcpy(&eth_mac[0], fp, 6);
+       /* Set MAC address */
+       ks8695_write(KS8695_LAN_MAC_LOW, (dev->enetaddr[5] |

(dev->enetaddr[4] << 8) |
+ (dev->enetaddr[3] << 16) | (dev->enetaddr[2] <<
24)));
+ ks8695_write(KS8695_LAN_MAC_HIGH, (dev->enetaddr[1] |
(dev->enetaddr[0] << 8)));

drivers/net/ks8695eth.c +1 -0

+       return 0;
 }
 
 /****************************************************************************/

@@ -109,12 +92,8 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_TX, 0x80000000);
        ks8695_write(KS8695_LAN_DMA_RX, 0x80000000);
 

Quoted 12 lines

Quoted 9 lines

drivers/net/ks8695eth.c +0 -3

-       ks8695_getmac();
-
        /* Set MAC address */
-       ks8695_write(KS8695_LAN_MAC_LOW, (eth_mac[5] | (eth_mac[4]

<< 8) |

drivers/net/ks8695eth.c +0 -2

-               (eth_mac[3] << 16) | (eth_mac[2] << 24)));
-       ks8695_write(KS8695_LAN_MAC_HIGH, (eth_mac[1] | (eth_mac[0]

<< 8)));
+ ks8695_set_mac_address(dev);

Why do you set the MAC address here? It should be set for you by the network infrastructure without this call.

Simply because I was not aware of this at the time. Before the changes here the generic infrastructure could not do it, as write_hwaddr was unimplemented, and I was just trying to preserve function. The main reason I started poking at the network driver was that it loaded the MAC from a hardcoded address in ROM, obviously board specific (this is the magic number in [PATCH 11/11] arm: cm4008, cm41xx: read MAC address from flash). It also has a bug where it stops working after one command (i.e. can't tftp twice), which I have not tracked down as yet.

Quoted 23 lines

Quoted 20 lines

        /* Turn the 4 port switch on */
        i = ks8695_read(KS8695_SWITCH_CTRL0);

drivers/net/ks8695eth.c +2 -2

@@ -150,7 +129,7 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_RX, 0x71);
        ks8695_write(KS8695_LAN_DMA_RX_START, 0x1);
 
-       printf("KS8695 ETHERNET: %pM\n", eth_mac);
+       printf("KS8695 ETHERNET: %pM\n", dev->enetaddr);
        return 0;
 }
 

@@ -234,6 +213,7 @@ int ks8695_eth_initialize(void)
        dev->halt = ks8695_eth_halt;
        dev->send = ks8695_eth_send;
        dev->recv = ks8695_eth_recv;
+       dev->write_hwaddr = ks8695_set_mac_address;
        strcpy(dev->name, "ks8695eth");
 
        eth_register(dev);
--

Quoted 1 line

1.7.10.4

-Joe

Hi Yann,

Quoted 78 lines · Yann Vernier

Quoted 62 lines · On Thu, 18 Oct 2012 15:55:31 -0500 Joe Hershberger <[email protected]>…

Hi Yann,

Quoted 58 lines · Yann Vernier

Removed board specific MAC reading code from driver. Should move the reading to the cm4008/cm41xx board code.

---
 drivers/net/ks8695eth.c |   38

+++++++++----------------------------- 1 file changed, 9 insertions(+), 29 deletions(-)

drivers/net/ks8695eth.c +0 -0

index b4904b6..2dda7ab 100644
@@ -71,30 +71,13 @@ volatile uint8_t

ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2

/****************************************************************************/

-/*
- * Ideally we want to use the MAC address stored in flash.
- * But we do some sanity checks in case they are not
present
- * first.
- */

drivers/net/ks8695eth.c +1 -16

-unsigned char eth_mac[] = {
-       0x00, 0x13, 0xc6, 0x00, 0x00, 0x00
-};
-
-void ks8695_getmac(void)
+static int ks8695_set_mac_address(struct eth_device *dev)
 {
-       unsigned char *fp;
-       int i;
-
-       /* Check if flash MAC is valid */
-       fp = (unsigned char *) 0x0201c000;
-       for (i = 0; (i < 6); i++) {
-               if ((fp[i] != 0) && (fp[i] != 0xff))
-                       break;
-       }
-
-       /* If we found a valid looking MAC address then use it

*/

drivers/net/ks8695eth.c +2 -2

-       if (i < 6)
-               memcpy(&eth_mac[0], fp, 6);
+       /* Set MAC address */
+       ks8695_write(KS8695_LAN_MAC_LOW, (dev->enetaddr[5] |

(dev->enetaddr[4] << 8) |
+ (dev->enetaddr[3] << 16) | (dev->enetaddr[2] <<
24)));
+ ks8695_write(KS8695_LAN_MAC_HIGH, (dev->enetaddr[1] |
(dev->enetaddr[0] << 8)));

drivers/net/ks8695eth.c +1 -0

+       return 0;
 }
 
 /****************************************************************************/

@@ -109,12 +92,8 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_TX, 0x80000000);
        ks8695_write(KS8695_LAN_DMA_RX, 0x80000000);
 

Quoted 12 lines

Quoted 9 lines

drivers/net/ks8695eth.c +0 -3

-       ks8695_getmac();
-
        /* Set MAC address */
-       ks8695_write(KS8695_LAN_MAC_LOW, (eth_mac[5] |

(eth_mac[4] << 8) |

drivers/net/ks8695eth.c +0 -2

-               (eth_mac[3] << 16) | (eth_mac[2] << 24)));
-       ks8695_write(KS8695_LAN_MAC_HIGH, (eth_mac[1] |

(eth_mac[0] << 8)));
+ ks8695_set_mac_address(dev);

Why do you set the MAC address here? It should be set for you by the network infrastructure without this call.

Quoted 33 lines

Simply because I was not aware of this at the time. Before the changes here the generic infrastructure could not do it, as write_hwaddr was unimplemented, and I was just trying to preserve function. The main reason I started poking at the network driver was that it loaded the MAC from a hardcoded address in ROM, obviously board specific (this is the magic number in [PATCH 11/11]
arm: cm4008, cm41xx: read MAC address from flash). It also has a bug where it stops working after one command (i.e. can't tftp twice), which I have not tracked down as yet.

Quoted 23 lines

Quoted 20 lines

        /* Turn the 4 port switch on */
        i = ks8695_read(KS8695_SWITCH_CTRL0);

drivers/net/ks8695eth.c +2 -2

@@ -150,7 +129,7 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_RX, 0x71);
        ks8695_write(KS8695_LAN_DMA_RX_START, 0x1);
 
-       printf("KS8695 ETHERNET: %pM\n", eth_mac);
+       printf("KS8695 ETHERNET: %pM\n", dev->enetaddr);
        return 0;
 }
 

@@ -234,6 +213,7 @@ int ks8695_eth_initialize(void)
        dev->halt = ks8695_eth_halt;
        dev->send = ks8695_eth_send;
        dev->recv = ks8695_eth_recv;
+       dev->write_hwaddr = ks8695_set_mac_address;
        strcpy(dev->name, "ks8695eth");
 
        eth_register(dev);
--

Quoted 1 line

1.7.10.4

-Joe

What is the status for this patch? Are you going to drop it or submit a new version?

Amicalement,

Quoted 117 lines · On Fri, 26 Oct 2012 23:37:28 +0200 Albert ARIBAUD <[email protected]>…

Hi Yann,

Quoted 78 lines · Yann Vernier

Quoted 62 lines · On Thu, 18 Oct 2012 15:55:31 -0500 Joe Hershberger <[email protected]>…

Hi Yann,

Quoted 58 lines · Yann Vernier

Removed board specific MAC reading code from driver. Should move the reading to the cm4008/cm41xx board code.

---
 drivers/net/ks8695eth.c |   38

+++++++++----------------------------- 1 file changed, 9 insertions(+), 29 deletions(-)

drivers/net/ks8695eth.c +0 -0

index b4904b6..2dda7ab 100644
@@ -71,30 +71,13 @@ volatile uint8_t

ks8695_bufs[BUFSIZE*(TXDESCS+RXDESCS)] __attribute__((aligned(2

/****************************************************************************/

-/*
- * Ideally we want to use the MAC address stored in flash.
- * But we do some sanity checks in case they are not
present
- * first.
- */

drivers/net/ks8695eth.c +1 -16

-unsigned char eth_mac[] = {
-       0x00, 0x13, 0xc6, 0x00, 0x00, 0x00
-};
-
-void ks8695_getmac(void)
+static int ks8695_set_mac_address(struct eth_device *dev)
 {
-       unsigned char *fp;
-       int i;
-
-       /* Check if flash MAC is valid */
-       fp = (unsigned char *) 0x0201c000;
-       for (i = 0; (i < 6); i++) {
-               if ((fp[i] != 0) && (fp[i] != 0xff))
-                       break;
-       }
-
-       /* If we found a valid looking MAC address then use it

*/

drivers/net/ks8695eth.c +2 -2

-       if (i < 6)
-               memcpy(&eth_mac[0], fp, 6);
+       /* Set MAC address */
+       ks8695_write(KS8695_LAN_MAC_LOW, (dev->enetaddr[5] |

(dev->enetaddr[4] << 8) |
+ (dev->enetaddr[3] << 16) | (dev->enetaddr[2] <<
24)));
+ ks8695_write(KS8695_LAN_MAC_HIGH, (dev->enetaddr[1] |
(dev->enetaddr[0] << 8)));

drivers/net/ks8695eth.c +1 -0

+       return 0;
 }
 
 /****************************************************************************/

@@ -109,12 +92,8 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_TX, 0x80000000);
        ks8695_write(KS8695_LAN_DMA_RX, 0x80000000);
 

Quoted 12 lines

Quoted 9 lines

drivers/net/ks8695eth.c +0 -3

-       ks8695_getmac();
-
        /* Set MAC address */
-       ks8695_write(KS8695_LAN_MAC_LOW, (eth_mac[5] |

(eth_mac[4] << 8) |

drivers/net/ks8695eth.c +0 -2

-               (eth_mac[3] << 16) | (eth_mac[2] << 24)));
-       ks8695_write(KS8695_LAN_MAC_HIGH, (eth_mac[1] |

(eth_mac[0] << 8)));
+ ks8695_set_mac_address(dev);

Why do you set the MAC address here? It should be set for you by the network infrastructure without this call.

Quoted 33 lines

Simply because I was not aware of this at the time. Before the changes here the generic infrastructure could not do it, as write_hwaddr was unimplemented, and I was just trying to preserve function. The main reason I started poking at the network driver was that it loaded the MAC from a hardcoded address in ROM, obviously board specific (this is the magic number in [PATCH 11/11]
arm: cm4008, cm41xx: read MAC address from flash). It also has a bug where it stops working after one command (i.e. can't tftp twice), which I have not tracked down as yet.

Quoted 23 lines

Quoted 20 lines

        /* Turn the 4 port switch on */
        i = ks8695_read(KS8695_SWITCH_CTRL0);

drivers/net/ks8695eth.c +2 -2

@@ -150,7 +129,7 @@ static int ks8695_eth_init(struct eth_device
 *dev, bd_t *bd) ks8695_write(KS8695_LAN_DMA_RX, 0x71);
        ks8695_write(KS8695_LAN_DMA_RX_START, 0x1);
 
-       printf("KS8695 ETHERNET: %pM\n", eth_mac);
+       printf("KS8695 ETHERNET: %pM\n", dev->enetaddr);
        return 0;
 }
 

@@ -234,6 +213,7 @@ int ks8695_eth_initialize(void)
        dev->halt = ks8695_eth_halt;
        dev->send = ks8695_eth_send;
        dev->recv = ks8695_eth_recv;
+       dev->write_hwaddr = ks8695_set_mac_address;
        strcpy(dev->name, "ks8695eth");
 
        eth_register(dev);
--

Quoted 1 line

1.7.10.4

-Joe

Quoted 4 lines

What is the status for this patch? Are you going to drop it or submit a new version?

Amicalement,

After some testing, I can conclude that removing the call to set_mac_address actually breaks this code. This is because the first section of ks8695_eth_init sets a reset bit, which resets all register values including the MAC address. The debug message shows that this has at some point been in an eth_reset() subroutine. The same reset bit is set in ks8695_eth_halt(), which is why Linux does not see the MAC address set by u-boot.

At this point, I do not know of a better approach than the patch as submitted. Advice is welcome.

Changed CONFIG_SYS_TEXT_BASE to actual address (required for board_init_f) and moved it into cm4{008,1xx}.h, along with a warning that it must match CONFIG_SYS_FLASH_BASE (since lowlevel_init relocates there).
lowlevel_init now uses CONFIG_SYS_RCS0_BASE to map ROM.
---
Changes for v2:
- Update to use CONFIG_SYS_FLASH_ constants only (no PHYS_FLASH)
- Use tabs where appropriate
- Update cm41xx also
- Explain the lowlevel_init change
Changes for v3:
- Use memory mappings per defined macros
- Change the final adjustment of lr and ip
- Verified mapping flash at 0x3000000 on KS8695X demo board

---
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |   63 +++++++++++++++++++--------
 board/cm4008/config.mk                      |    1 -
 board/cm41xx/config.mk                      |    1 -
 3 files changed, 45 insertions(+), 20 deletions(-)

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +45 -18

index 1bba571..74579ed 100644
@@ -25,6 +25,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/arch/platform.h>
+#include <asm/arch/regvalues.h>
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 

@@ -91,12 +92,31 @@ lowlevel_init:
 	 * remap the memory and flash regions. we want to end up with
 	 * ram from address 0, and flash at 32MB.
 	 */
+#if CONFIG_SYS_RCS0_BASE!=CONFIG_SYS_TEXT_BASE
+#error CONFIG_SYS_RCS0_BASE and CONFIG_SYS_TEXT_BASE must match for highflash address to work
+	/* Also needed for pointers in board_init_f() */
+#endif
+#if CONFIG_SYS_RCS0_BASE>=KS8695_IO_BASE
+#error Cannot relocate ROM past IO registers
+	/* Firstly, the IO registers are at the top supported address.
+	   Secondly, as we grow the ROM region it must not overlap the registers. */
+#endif
+#if CONFIG_SYS_RCS0_BASE&0xffff
+#error Cannot map memory to addresses not divisible by 64K
+#endif
 	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
-	ldr	r2, =0xbfc00040
+	/* The default ROM mapping is at 0x0 - 0x01ffffff.
+	   Remap it to 0x0 - 0x03feffff so that it covers 0x02000000,
+	   where CONFIG_SYS_FLASH_BASE maps it, as well as 0.
+	   Relies on the limited address lines to repeat ROM images
+	   on every multiple of the real ROM size. */
+	ldr	r2, =(KS8695_MEM_RANGE(0,0x03ff0000)|(CONFIG_KS8695_ROMCON0_VALUE&0xfff))
 	str	r2, [r1]		/* large flash map */
-	ldr	pc, =(highflash+0x02000000-0x00f00000)	/* jump to high flash address */
+	/* Relies on CONFIG_SYS_RCS0_BASE==CONFIG_SYS_TEXT_BASE */
+	ldr	pc, =(highflash)	/* jump to high flash address */
 highflash:
-	ldr	r2, =0x8fe00040
+	/* Move ROM to high address, and reconfigure to 4MiB size */
+	ldr	r2, =CONFIG_KS8695_ROMCON0_VALUE
 	str	r2, [r1]		/* remap flash range */
 
 	/*

@@ -105,28 +125,35 @@ highflash:
 	 * then you can have it all mapped nicely. Has no effect if you
 	 * only have a 4Mb or smaller flash.
 	 */
+#if CONFIG_SYS_RCS1_WIDTH
 	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL1)
-	ldr	r2, =0x9fe40040
+	ldr	r2, =CONFIG_KS8695_ROMCON1_VALUE
 	str	r2, [r1]		/* remap flash2 region, contiguous */
-	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
-	ldr	r2, =0x30000005
-	str	r2, [r1]		/* enable both flash selects */
+#endif
 
-#ifdef CONFIG_CM41xx
 	/*
-	 * map the second flash chip, using the external IO lines.
+	 * map additional flash chip, using the external IO lines.
 	 */
+#if CONFIG_SYS_ECS0_WIDTH
 	ldr	r1, =(KS8695_IO_BASE+KS8695_IO_CTRL0)
-	ldr	r2, =0xafe80b6d
-	str	r2, [r1]		/* remap io0 region, contiguous */
+	ldr	r2, =CONFIG_KS8695_EXTACON0_VALUE
+	str	r2, [r1]		/* map io0 region */
+#endif
+#if CONFIG_SYS_ECS1_WIDTH
 	ldr	r1, =(KS8695_IO_BASE+KS8695_IO_CTRL1)
-	ldr	r2, =0xbfec0b6d
-	str	r2, [r1]		/* remap io1 region, contiguous */
-	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
-	ldr	r2, =0x30050005
-	str	r2, [r1]		/* enable second flash */
+	ldr	r2, =CONFIG_KS8695_EXTACON1_VALUE
+	str	r2, [r1]		/* map io1 region */
+#endif
+#if CONFIG_SYS_ECS2_WIDTH
+	ldr	r1, =(KS8695_IO_BASE+KS8695_IO_CTRL2)
+	ldr	r2, =CONFIG_KS8695_EXTACON2_VALUE
+	str	r2, [r1]		/* map io2 region */
 #endif
 
+	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
+	ldr	r2, =CONFIG_KS8695_ERGCON_VALUE
+	str	r2, [r1]		/* enable relevant flash selects */
+
 	/*
 	 * before relocating, we have to setup RAM timing
 	 */

@@ -198,8 +225,8 @@ highflash:
 nobutton:
 #endif
 
-	add	lr, lr, #0x02000000	/* flash is now mapped high */
-	add	ip, ip, #0x02000000	/* this is a hack */
+	add	lr, lr, #CONFIG_SYS_TEXT_BASE	/* flash is now mapped high */
+	add	ip, ip, #CONFIG_SYS_TEXT_BASE	/* this is a hack */
 	mov	pc, lr			/* all done, return */
 
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */

board/cm4008/config.mk deleted +0 -1

deleted file mode 100644
index 0d5923b..0000000
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00f00000

board/cm41xx/config.mk deleted +0 -0

deleted file mode 100644
index 0d5923b..0000000

Hi Yann,

Quoted 157 lines · Yann Vernier

Changed CONFIG_SYS_TEXT_BASE to actual address (required for board_init_f) and moved it into cm4{008,1xx}.h, along with a warning that it must match CONFIG_SYS_FLASH_BASE (since lowlevel_init relocates there).
lowlevel_init now uses CONFIG_SYS_RCS0_BASE to map ROM.
---
Changes for v2:
- Update to use CONFIG_SYS_FLASH_ constants only (no PHYS_FLASH)
- Use tabs where appropriate
- Update cm41xx also
- Explain the lowlevel_init change
Changes for v3:
- Use memory mappings per defined macros
- Change the final adjustment of lr and ip
- Verified mapping flash at 0x3000000 on KS8695X demo board

---
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |   63
+++++++++++++++++++--------
board/cm4008/config.mk                      |    1 -
board/cm41xx/config.mk                      |    1 - 3 files

changed, 45 insertions(+), 20 deletions(-)

(quoted diff) +0 -0

b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S index 1bba571..74579ed 100644 --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S @@ -25,6 +25,7 @@
#include <config.h>
#include <version.h>
#include <asm/arch/platform.h>

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +1 -0

+#include <asm/arch/regvalues.h>
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT

@@ -91,12 +92,31 @@ lowlevel_init:
 	 * remap the memory and flash regions. we want to end up

with

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +2 -0

 	 * ram from address 0, and flash at 32MB.
 	 */
+#if CONFIG_SYS_RCS0_BASE!=CONFIG_SYS_TEXT_BASE
+#error CONFIG_SYS_RCS0_BASE and CONFIG_SYS_TEXT_BASE must match

for highflash address to work

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +5 -0

+	/* Also needed for pointers in board_init_f() */
+#endif
+#if CONFIG_SYS_RCS0_BASE>=KS8695_IO_BASE
+#error Cannot relocate ROM past IO registers
+	/* Firstly, the IO registers are at the top supported

address.

(quoted diff) +1 -0

+	   Secondly, as we grow the ROM region it must not overlap

the registers. */ +#endif

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +5 -1

+#if CONFIG_SYS_RCS0_BASE&0xffff
+#error Cannot map memory to addresses not divisible by 64K
+#endif
 	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
-	ldr	r2, =0xbfc00040
+	/* The default ROM mapping is at 0x0 - 0x01ffffff.
+	   Remap it to 0x0 - 0x03feffff so that it covers

0x02000000,

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +4 -0

+	   where CONFIG_SYS_FLASH_BASE maps it, as well as 0.
+	   Relies on the limited address lines to repeat ROM images
+	   on every multiple of the real ROM size. */
+	ldr	r2,

=(KS8695_MEM_RANGE(0,0x03ff0000)|(CONFIG_KS8695_ROMCON0_VALUE&0xfff))
str r2, [r1] /* large flash map */

(quoted diff) +0 -1

-	ldr	pc,

=(highflash+0x02000000-0x00f00000) /* jump to high flash
address */

(quoted diff) +2 -0

+	/* Relies on CONFIG_SYS_RCS0_BASE==CONFIG_SYS_TEXT_BASE */
+	ldr	pc, =(highflash)	/* jump to high flash

address */ highflash:

(quoted diff) +1 -1

-	ldr	r2, =0x8fe00040
+	/* Move ROM to high address, and reconfigure to 4MiB size

*/

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +1 -0

+	ldr	r2, =CONFIG_KS8695_ROMCON0_VALUE
 	str	r2, [r1]		/* remap flash range */
 
 	/*

@@ -105,28 +125,35 @@ highflash:
 	 * then you can have it all mapped nicely. Has no effect

if you

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +2 -1

 	 * only have a 4Mb or smaller flash.
 	 */
+#if CONFIG_SYS_RCS1_WIDTH
 	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL1)
-	ldr	r2, =0x9fe40040
+	ldr	r2, =CONFIG_KS8695_ROMCON1_VALUE
 	str	r2, [r1]		/* remap flash2 region,

contiguous */

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +0 -3

-	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
-	ldr	r2, =0x30000005
-	str	r2, [r1]		/* enable both flash

selects */ +#endif

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +2 -4

-#ifdef CONFIG_CM41xx
 	/*
-	 * map the second flash chip, using the external IO lines.
+	 * map additional flash chip, using the external IO lines.
 	 */
+#if CONFIG_SYS_ECS0_WIDTH
 	ldr	r1, =(KS8695_IO_BASE+KS8695_IO_CTRL0)
-	ldr	r2, =0xafe80b6d
-	str	r2, [r1]		/* remap io0 region,

contiguous */

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +4 -2

+	ldr	r2, =CONFIG_KS8695_EXTACON0_VALUE
+	str	r2, [r1]		/* map io0 region */
+#endif
+#if CONFIG_SYS_ECS1_WIDTH
 	ldr	r1, =(KS8695_IO_BASE+KS8695_IO_CTRL1)
-	ldr	r2, =0xbfec0b6d
-	str	r2, [r1]		/* remap io1 region,

contiguous */

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +0 -3

-	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
-	ldr	r2, =0x30050005
-	str	r2, [r1]		/* enable second flash

*/

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +10 -0

+	ldr	r2, =CONFIG_KS8695_EXTACON1_VALUE
+	str	r2, [r1]		/* map io1 region */
+#endif
+#if CONFIG_SYS_ECS2_WIDTH
+	ldr	r1, =(KS8695_IO_BASE+KS8695_IO_CTRL2)
+	ldr	r2, =CONFIG_KS8695_EXTACON2_VALUE
+	str	r2, [r1]		/* map io2 region */
 #endif
 
+	ldr	r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
+	ldr	r2, =CONFIG_KS8695_ERGCON_VALUE
+	str	r2, [r1]		/* enable relevant

flash selects */ +

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +0 -1

 	/*
 	 * before relocating, we have to setup RAM timing
 	 */

@@ -198,8 +225,8 @@ highflash:
 nobutton:
 #endif
 
-	add	lr, lr, #0x02000000	/* flash is now

mapped high */

(quoted diff) +1 -1

-	add	ip, ip, #0x02000000	/* this is a hack */
+	add	lr, lr, #CONFIG_SYS_TEXT_BASE	/* flash

is now mapped high */

(quoted diff) +1 -0

+	add	ip, ip, #CONFIG_SYS_TEXT_BASE	/* this is

a hack */ mov pc, lr /* all done,
return */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

board/cm4008/config.mk deleted +0 -1

deleted file mode 100644
index 0d5923b..0000000
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00f00000

board/cm41xx/config.mk deleted +0 -0

deleted file mode 100644
index 0d5923b..0000000

board/cm41xx/config.mk line 1

Quoted 1 line

board/cm41xx/config.mk deleted +0 -1

@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00f00000

This seems to remove CONFIG_SYS_TEXT_BASE from config.mk files but does not put it elsewhere. How do the corresponding boards build once this patch is applied?

Amicalement,

Allows configuration macros to set SDRAM parameters.

---
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |   20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +0 -0

index 74579ed..bec9738 100644

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +8 -8

 	ldr	r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL0)
-#if (PHYS_SDRAM_1_SIZE == 0x02000000)
-	ldr	r2, =0x7fc0000e		/* 32MB */
-#else
-	ldr	r2, =0x3fc0000e		/* 16MB */
-#endif
+	ldr	r2, =CONFIG_KS8695_SDCON0_VALUE
 	str	r2, [r1]		/* configure sdram bank0 setup */
+#endif
+#if CONFIG_SYS_SDCS1_PARAMS
 	ldr	r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL1)
-	mov	r2, #0
+	mov	r2, #CONFIG_KS8695_SDCON1_VALUE
 	str	r2, [r1]		/* configure sdram bank1 setup */
+#endif
 
+#if CONFIG_SYS_SDCS0_PARAMS || CONFIG_SYS_SDCS1_PARAMS
 	ldr	r1, =(KS8695_IO_BASE+KS8695_SDRAM_GENERAL)
-	ldr	r2, =0x0000000a
+	ldr	r2, =CONFIG_KS8695_SDGCON_VALUE
 	str	r2, [r1]		/* set RAS/CAS timing */
 
 	ldr	r1, =(KS8695_IO_BASE+KS8695_SDRAM_BUFFER)

@@ -184,15 +185,16 @@ highflash:
 	ldr	r2, =0x00000020
 	str	r2, [r1]		/* set for fast refresh */
 	DELAY_FOR 0x100, r0
-	ldr	r2, =0x00000190
+	ldr	r2, =CONFIG_SYS_SDRAM_REFRESH_RATE
 	str	r2, [r1]		/* set normal refresh timing */
 
 	ldr	r1, =(KS8695_IO_BASE+KS8695_SDRAM_BUFFER)

A small bug caused code to set up LEDs to instead disable lots of functionality in the Ethernet switch, including bounds checks.

---
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +0 -0

index bec9738..31b028b 100644

Previously code to do this was in the Ethernet driver itself. Since it is board specific, moved it here, and altered it to support preset MAC from environment.

---
 board/cm4008/cm4008.c |   12 ++++++++++++
 board/cm41xx/cm41xx.c |   12 ++++++++++++
 2 files changed, 24 insertions(+)

board/cm4008/cm4008.c +12 -0

index 6c0da9a..e14f8f4 100644
@@ -75,10 +75,22 @@ int board_late_init (void)
 	return 0;
 }
 
+#ifdef CONFIG_DRIVER_KS8695ETH
 int board_eth_init(bd_t *bis)
 {
+	uchar enetaddr[6];
+	const uchar * const fp=CONFIG_SYS_FLASH_BASE+0x1c000;
+
+	/* read MAC address from flash */
+	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+		memcpy(&enetaddr[0], fp, 6);
+		if (is_valid_ether_addr(enetaddr))
+			eth_setenv_enetaddr("ethaddr", enetaddr);
+	}
+
 	return ks8695_eth_initialize();
 }
+#endif
 
 int board_init (void)
 {

board/cm41xx/cm41xx.c +0 -0

index 6aef617..771701d 100644

board/cm41xx/cm41xx.c +4 -0

+
+	/* read MAC address from flash */
+	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+		memcpy(&enetaddr[0], fp, 6);

Quoted 4 lines · On Thu, 4 Oct 2012 11:15:06 +0200 Albert ARIBAUD <[email protected]>…

Sorry it took me so long to crawl my backlog... This series was posted with long lines folded apparently, which makes it impossible to process and explains why patchwork did not have all of it. Can you please repost it, this time using 'git send-email'?

Terribly sorry. This should fix that problem.
In the meantime, work on our board progresses nicely, and we plan to submit it after registering a machine ID. We have u-boot support for PCI, FPGA configuration, and I2C for power control working, the latter two via GPIO.

Hi Yann,

Quoted 7 lines · Yann Vernier

Quoted 4 lines · On Thu, 4 Oct 2012 11:15:06 +0200 Albert ARIBAUD <[email protected]>…

Sorry it took me so long to crawl my backlog... This series was posted with long lines folded apparently, which makes it impossible to process and explains why patchwork did not have all of it. Can you please repost it, this time using 'git send-email'?

Quoted 5 lines

Terribly sorry. This should fix that problem.
In the meantime, work on our board progresses nicely, and we plan to submit it after registering a machine ID. We have u-boot support for PCI, FPGA configuration, and I2C for power control working, the latter two via GPIO.

There were several comments on this series, but I haven't seen any V2 for it. Did I miss it?

Amicalement,