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Introduce minimal irqchip infrastructure

PATCH Superseded Thomas Petazzoni 4 participants 13 messages Oct 28, 2012 – Nov 7, 2012

Subsystems (6)

v3 of 4 Superseded Latest is v4 →

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#0 lore raw

PATCH v3 1/1 Introduce minimal irqchip infrastructure

Thomas, Rob, Arnd,

Here is a small set of patches that introduces a small irqchip infrastructure that allows the registration of irqchip drivers without having each of those drivers to expose a public API in include/linux/irqchip/ (patch 1/4), moves the only existing irqchip driver, irq-bcm2835 to this infrastructure (patch 2/4), moves the irqchip driver for the Armada 370 / Armada XP SoCs to the drivers/irqchip directory (patch 3/4) and finally adds the drivers/irqchip directory to the IRQ subsystem entry in the MAINTAINERS file (patch 4/4).

Changes since v2:

* Fixed the entry in the MAINTAINERS file. Noticed by Rob Herring.

* Simplified the Kconfig logic by making the IRQCHIP option enabled by default as soon as OF_IRQ is enabled. The individual ARCH_<foo> Kconfig options no longer have to select IRQCHIP. Also, the option was renamed from USE_IRQCHIP to just IRQCHIP. Suggested by Rob Herring.

* Added Reviewed-by tags given by Rob Herring.

Changes since v1:

* Add a new patch mentionning the drivers/irqchip in the list of directories part of the IRQ subsystem maintained by Thomas Gleixner in the MAINTAINERS file. Requested by Arnd Bergmann.

* Reduce the amount of code movement in the irq-bcm2835.c and irq-armada-370-xp.c files by using one forward declaration for the IRQ handling entry point. Requested by Stephen Warren.

* Rename the armctrl_of_init() function to bcm2835_irqchip_init() as requested by Stephen Warren.

* Added the formal Acked-by and Reviewed-by received from Stephen Warren.

Thanks,

Thomas

#1 lore raw

PATCH v3 1/4 irqchip: add basic infrastructure

With the recent creation of the drivers/irqchip/ directory, it is desirable to move irq controller drivers here. At the moment, the only driver here is irq-bcm2835, the driver for the irq controller found in the ARM BCM2835 SoC, present in Rasberry Pi systems. This irq controller driver was exporting its initialization function and its irq handling function through a header file in <linux/irqchip/bcm2835.h>.

When proposing to also move another irq controller driver in drivers/irqchip, Rob Herring raised the very valid point that moving things to drivers/irqchip was good in order to remove more stuff from arch/arm, but if it means adding gazillions of headers files in include/linux/irqchip/, it would not be very nice.

So, upon the suggestion of Rob Herring and Arnd Bergmann, this commit introduces a small infrastructure that defines a central irqchip_init() function in drivers/irqchip/irqchip.c, which is meant to be called as the ->init_irq() callback of ARM platforms. This function calls of_irq_init() with an array that will progressively contain the compatible strings of each irq controller driver, and also a reference to the initialization functions of such drivers. The drivers/irqchip/irqchip.h header file, currently empty, is added to allow irq controller drivers to expose their initialization function to the main irqchip.c file. Note that the irq controller driver initialization function is responsible for setting the global handle_arch_irq() variable, so that ARM platforms no longer have to define the ->handle_irq field in their DT_MACHINE structure.

A global header, <linux/irqchip.h> is also added to expose the single irqchip_init() function to the reset of the kernel.

A further commit moves the BCM2835 irq controller driver to this new small infrastructure, therefore removing the include/linux/irqchip/ directory.

---
 drivers/irqchip/Kconfig   |    4 +++-
 drivers/irqchip/Makefile  |    1 +
 drivers/irqchip/irqchip.c |   23 +++++++++++++++++++++++
 drivers/irqchip/irqchip.h |   14 ++++++++++++++
 include/linux/irqchip.h   |   16 ++++++++++++++++
 5 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 drivers/irqchip/irqchip.c
 create mode 100644 drivers/irqchip/irqchip.h
 create mode 100644 include/linux/irqchip.h
drivers/irqchip/Kconfig +3 -1
index 1bb8bf6..88b0929 100644
@@ -1 +1,3 @@
-# empty
+config IRQCHIP
+	def_bool y
+	depends on OF_IRQ
drivers/irqchip/Makefile +1 -0
index 054321d..6b5a6e0 100644
@@ -1 +1,2 @@
+obj-$(CONFIG_IRQCHIP) += irqchip.o
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
drivers/irqchip/irqchip.c new file +23 -0
new file mode 100644
index 0000000..410f99f
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2012 Thomas Petazzoni
+ *
+ * Thomas Petazzoni <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/of_irq.h>
+
+#include "irqchip.h"
+
+static const struct of_device_id irqchip_of_match[] __initconst = {
+	{},
+};
+
+void __init irqchip_init(void)
+{
+	of_irq_init(irqchip_of_match);
+}
drivers/irqchip/irqchip.h new file +14 -0
new file mode 100644
index 0000000..1e7a5c2
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2012 Thomas Petazzoni
+ *
+ * Thomas Petazzoni <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef _IRQCHIP_H
+#define _IRQCHIP_H
+
+#endif
include/linux/irqchip.h new file +16 -0
new file mode 100644
index 0000000..e0006f1
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2012 Thomas Petazzoni
+ *
+ * Thomas Petazzoni <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef _LINUX_IRQCHIP_H
+#define _LINUX_IRQCHIP_H
+
+void irqchip_init(void);
+
+#endif
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH v3 2/4 arm: bcm2835: convert to the irqchip infrastructure

In reply to Thomas Petazzoni

Register the irq controller driver in the main drivers/irqchip/irqchip.c file, and make sure that the initialization function of the driver sets handle_arch_irq() appropriately. This requires a bit of movement in the driver since the bcm2835_handle_irq() must move before the armctrl_of_init() function to avoid a forward declaration.

On the arch/arm side, use irqchip_init() as the ->init_irq() callback, and remove the definition of ->handle_irq() since this is now done by the irq controller driver.

---
 arch/arm/mach-bcm2835/bcm2835.c |    5 ++---
 drivers/irqchip/irq-bcm2835.c   |   24 +++++++++++-------------
 drivers/irqchip/irqchip.c       |    6 ++++++
 drivers/irqchip/irqchip.h       |    2 ++
 include/linux/irqchip/bcm2835.h |   29 -----------------------------
 5 files changed, 21 insertions(+), 45 deletions(-)
 delete mode 100644 include/linux/irqchip/bcm2835.h
arch/arm/mach-bcm2835/bcm2835.c +2 -3
index f6fea49..ab1bccd 100644
@@ -13,10 +13,10 @@
  */
 
 #include <linux/init.h>
-#include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
 #include <linux/clk/bcm2835.h>
+#include <linux/irqchip.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -56,8 +56,7 @@ static const char * const bcm2835_compat[] = {
 
 DT_MACHINE_START(BCM2835, "BCM2835")
 	.map_io = bcm2835_map_io,
-	.init_irq = bcm2835_init_irq,
-	.handle_irq = bcm2835_handle_irq,
+	.init_irq = irqchip_init,
 	.init_machine = bcm2835_init,
 	.timer = &bcm2835_timer,
 	.dt_compat = bcm2835_compat
drivers/irqchip/irq-bcm2835.c +11 -13
index dc670cc..62d1dad 100644
@@ -49,9 +49,11 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/irqdomain.h>
-#include <linux/irqchip/bcm2835.h>
 
 #include <asm/exception.h>
+#include <asm/mach/irq.h>
+
+#include "irqchip.h"
 
 /* Put the bank and irq (32 bits) into the hwirq */
 #define MAKE_HWIRQ(b, n)	((b << 5) | (n))
@@ -135,8 +137,10 @@ static struct irq_domain_ops armctrl_ops = {
 	.xlate = armctrl_xlate
 };
 
-static int __init armctrl_of_init(struct device_node *node,
-	struct device_node *parent)
+static asmlinkage void bcm2835_handle_irq(struct pt_regs *regs);
+
+int __init bcm2835_irqchip_init(struct device_node *node,
+				struct device_node *parent)
 {
 	void __iomem *base;
 	int irq, b, i;
@@ -164,16 +168,10 @@ static int __init armctrl_of_init(struct device_node *node,
 			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 		}
 	}
-	return 0;
-}
 
-static struct of_device_id irq_of_match[] __initconst = {
-	{ .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init }
-};
+	handle_arch_irq = bcm2835_handle_irq;
 
-void __init bcm2835_init_irq(void)
-{
-	of_irq_init(irq_of_match);
+	return 0;
 }
 
 /*
@@ -199,8 +197,8 @@ static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
 	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
 }
 
-asmlinkage void __exception_irq_entry bcm2835_handle_irq(
-	struct pt_regs *regs)
+static asmlinkage void __exception_irq_entry
+bcm2835_handle_irq(struct pt_regs *regs)
 {
 	u32 stat, irq;
 
drivers/irqchip/irqchip.c +6 -0
index 410f99f..e2496e4 100644
@@ -14,6 +14,12 @@
 #include "irqchip.h"
 
 static const struct of_device_id irqchip_of_match[] __initconst = {
+#ifdef CONFIG_ARCH_BCM2835
+	{
+		.compatible = "brcm,bcm2835-armctrl-ic",
+		.data = bcm2835_irqchip_init,
+	},
+#endif
 	{},
 };
 
drivers/irqchip/irqchip.h +2 -0
index 1e7a5c2..1075537 100644
@@ -11,4 +11,6 @@
 #ifndef _IRQCHIP_H
 #define _IRQCHIP_H
 
+int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
+
 #endif
include/linux/irqchip/bcm2835.h deleted +0 -29
deleted file mode 100644
index 48a859b..0000000
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2010 Broadcom
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __LINUX_IRQCHIP_BCM2835_H_
-#define __LINUX_IRQCHIP_BCM2835_H_
-
-#include <asm/exception.h>
-
-extern void bcm2835_init_irq(void);
-
-extern asmlinkage void __exception_irq_entry bcm2835_handle_irq(
-	struct pt_regs *regs);
-
-#endif
Signature · 1 line
1.7.9.5
#3 lore raw

PATCH v3 2/4 arm: bcm2835: convert to the irqchip infrastructure

Quoted 15 lines · Thomas Petazzoni

Register the irq controller driver in the main drivers/irqchip/irqchip.c file, and make sure that the initialization function of the driver sets handle_arch_irq() appropriately. This requires a bit of movement in the driver since the bcm2835_handle_irq() must move before the armctrl_of_init() function to avoid a forward declaration.

On the arch/arm side, use irqchip_init() as the ->init_irq() callback, and remove the definition of ->handle_irq() since this is now done by the irq controller driver.

---

[..]

Quoted 4 lines
drivers/irqchip/irq-bcm2835.c +0 -0
index dc670cc..62d1dad 100644

[..]

Quoted 33 lines
drivers/irqchip/irq-bcm2835.c +2 -2
@@ -199,8 +197,8 @@ static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
 	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
 }
 
-asmlinkage void __exception_irq_entry bcm2835_handle_irq(
-	struct pt_regs *regs)
+static asmlinkage void __exception_irq_entry
+bcm2835_handle_irq(struct pt_regs *regs)
 {
 	u32 stat, irq;
 
drivers/irqchip/irqchip.c +6 -0
index 410f99f..e2496e4 100644
@@ -14,6 +14,12 @@
 #include "irqchip.h"
 
 static const struct of_device_id irqchip_of_match[] __initconst = {
+#ifdef CONFIG_ARCH_BCM2835
+	{
+		.compatible = "brcm,bcm2835-armctrl-ic",
+		.data = bcm2835_irqchip_init,
+	},
+#endif
 	{},
 };
 
drivers/irqchip/irqchip.h +0 -0
index 1e7a5c2..1075537 100644

drivers/irqchip/irqchip.h line 16

Quoted 6 lines
drivers/irqchip/irqchip.h +2 -0
@@ -11,4 +11,6 @@
 #ifndef _IRQCHIP_H
 #define _IRQCHIP_H
 
+int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
+
 #endif

Could it make sense here to kill the irqchip.h private export, and instead rely on the linker to stitch together the builtin irqchip's of_device_id tables?

Something like:

drivers/irqchip/irq-bcm2835.c:

	static bcm2835_irqchip_init(struct device_node *node, struct device_node *parent)
	{
		/*...*/
	}

	static const struct of_device_id bcm2835_match[] __initconst = {
		{ .compatible = "brcm,bcm2835-armctrl-ic", .data = bcm2835_irqchip_init, },
		{},
	};
	DECLARE_IRQCHIP(bcm2835, bcm2835_match);

where include/linux/irqchip.h:

	#define DECLARE_IRQCHIP(name,ids) \
		static of_device_id * __irqchip_##name##_matches __used \
		__attribute__((__section__(".init.irqchip"))) = ids

drivers/irqchip/irqchip.c:

	void irqchip_init(void)
	{
		extern of_device_id *__irqchip_matches_start[], *__irqchip_matches_end[];
		struct of_device_id **matchesp;

		matchesp = __irqchip_matches_start;
		while (matchesp < __irqchip_matches_end)
			of_irq_init(*matchesp);
	}

And a suitable entry in vmlinux.lds.h.

(Hopefully?) This would eliminate the need for the 'private' irqchip.h declarations and the centrally maintained of_device_id table, which sounds like a win for maintainability.

Thoughts?

Thanks,
Josh

#4 lore raw

PATCH v3 2/4 arm: bcm2835: convert to the irqchip infrastructure

Quoted 89 lines · Josh Cartwright
Quoted 15 lines · Thomas Petazzoni

Register the irq controller driver in the main drivers/irqchip/irqchip.c file, and make sure that the initialization function of the driver sets handle_arch_irq() appropriately. This requires a bit of movement in the driver since the bcm2835_handle_irq() must move before the armctrl_of_init() function to avoid a forward declaration.

On the arch/arm side, use irqchip_init() as the ->init_irq() callback, and remove the definition of ->handle_irq() since this is now done by the irq controller driver.

---

[..]

Quoted 4 lines
drivers/irqchip/irq-bcm2835.c +0 -0
index dc670cc..62d1dad 100644

[..]

Quoted 33 lines
drivers/irqchip/irq-bcm2835.c +2 -2
@@ -199,8 +197,8 @@ static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
 	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
 }
 
-asmlinkage void __exception_irq_entry bcm2835_handle_irq(
-	struct pt_regs *regs)
+static asmlinkage void __exception_irq_entry
+bcm2835_handle_irq(struct pt_regs *regs)
 {
 	u32 stat, irq;
 
drivers/irqchip/irqchip.c +6 -0
index 410f99f..e2496e4 100644
@@ -14,6 +14,12 @@
 #include "irqchip.h"
 
 static const struct of_device_id irqchip_of_match[] __initconst = {
+#ifdef CONFIG_ARCH_BCM2835
+	{
+		.compatible = "brcm,bcm2835-armctrl-ic",
+		.data = bcm2835_irqchip_init,
+	},
+#endif
 	{},
 };
 
drivers/irqchip/irqchip.h +0 -0
index 1e7a5c2..1075537 100644

drivers/irqchip/irqchip.h line 16

Quoted 6 lines
drivers/irqchip/irqchip.h +2 -0
@@ -11,4 +11,6 @@
 #ifndef _IRQCHIP_H
 #define _IRQCHIP_H
 
+int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
+
 #endif

Could it make sense here to kill the irqchip.h private export, and instead rely on the linker to stitch together the builtin irqchip's of_device_id tables?

Something like:

drivers/irqchip/irq-bcm2835.c:

	static bcm2835_irqchip_init(struct device_node *node, struct device_node *parent)
	{
		/*...*/
	}

	static const struct of_device_id bcm2835_match[] __initconst = {
		{ .compatible = "brcm,bcm2835-armctrl-ic", .data = bcm2835_irqchip_init, },
		{},
	};
	DECLARE_IRQCHIP(bcm2835, bcm2835_match);

where include/linux/irqchip.h:

	#define DECLARE_IRQCHIP(name,ids) \
		static of_device_id * __irqchip_##name##_matches __used \
		__attribute__((__section__(".init.irqchip"))) = ids

drivers/irqchip/irqchip.c:

Quoted 8 lines
	void irqchip_init(void)
	{
		extern of_device_id *__irqchip_matches_start[], *__irqchip_matches_end[];
		struct of_device_id **matchesp;

		matchesp = __irqchip_matches_start;
		while (matchesp < __irqchip_matches_end)
			of_irq_init(*matchesp);

Hmm...more thinking leads me to believe that calling of_irq_init() multiple times with an incomplete set of irqchip descriptions isn't going to work.

Nevertheless, the idea could be extended such that a single of_device_id table is generated (instead of an array of pointers to incomplete an incomplete table).

Josh
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#5 lore raw

PATCH v3 2/4 arm: bcm2835: convert to the irqchip infrastructure

In reply to Josh Cartwright

Josh,

Quoted 3 lines · Josh Cartwright

Could it make sense here to kill the irqchip.h private export, and instead rely on the linker to stitch together the builtin irqchip's of_device_id tables?

Yes, using yet another ELF section is another option to do that. I just wasn't sure it was worth the effort for now, but if it is seen as necessary, I can certainly go ahead and implement this.

I am at ELCE at the moment, so quite busy with talks, discussions... and drinks. I'll get back to this when I get back from ELCE.

Thanks for your suggestion,

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#6 lore raw

PATCH v3 3/4 arm: mvebu: move irq controller driver to drivers/irqchip

In reply to Thomas Petazzoni

Now that the drivers/irqchip/ directory has a minimal infrastructure to support the addition of irq controller driver, we move the irq controller driver for Armada 370 and Armada XP ARM SoCs from the arch/arm/mach-mvebu/ directory to the drivers/irqchip/ directory and update the irqchip infrastructure to take into account this new driver.

---
 arch/arm/mach-mvebu/Makefile                       |    2 +-
 arch/arm/mach-mvebu/armada-370-xp.c                |    4 ++--
 arch/arm/mach-mvebu/common.h                       |    3 ---
 drivers/irqchip/Makefile                           |    1 +
 .../irqchip}/irq-armada-370-xp.c                   |   25 +++++++++-----------
 drivers/irqchip/irqchip.c                          |    6 +++++
 drivers/irqchip/irqchip.h                          |    2 ++
 7 files changed, 23 insertions(+), 20 deletions(-)
 rename {arch/arm/mach-mvebu => drivers/irqchip}/irq-armada-370-xp.c (87%)
arch/arm/mach-mvebu/Makefile +1 -1
index 57f996b..7f4e9f4 100644
@@ -2,4 +2,4 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
 	-I$(srctree)/arch/arm/plat-orion/include
 
 obj-y += system-controller.o
-obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o
+obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o addr-map.o
arch/arm/mach-mvebu/armada-370-xp.c +2 -2
index 3d6c540..8e94888 100644
@@ -16,6 +16,7 @@
 #include <linux/init.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>
+#include <linux/irqchip.h>
 #include <linux/time-armada-370-xp.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -57,8 +58,7 @@ static const char * const armada_370_xp_dt_board_dt_compat[] = {
 DT_MACHINE_START(ARMADA_XP_DT, "Marvell Aramada 370/XP (Device Tree)")
 	.init_machine	= armada_370_xp_dt_init,
 	.map_io		= armada_370_xp_map_io,
-	.init_irq	= armada_370_xp_init_irq,
-	.handle_irq     = armada_370_xp_handle_irq,
+	.init_irq	= irqchip_init,
 	.timer		= &armada_370_xp_timer,
 	.restart	= mvebu_restart,
 	.dt_compat	= armada_370_xp_dt_board_dt_compat,
arch/arm/mach-mvebu/common.h +0 -3
index 02f89ea..f0eaa21 100644
@@ -17,7 +17,4 @@
 
 void mvebu_restart(char mode, const char *cmd);
 
-void armada_370_xp_init_irq(void);
-void armada_370_xp_handle_irq(struct pt_regs *regs);
-
 #endif
drivers/irqchip/Makefile +1 -0
index 6b5a6e0..5148ffd 100644
@@ -1,2 +1,3 @@
 obj-$(CONFIG_IRQCHIP) += irqchip.o
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
+obj-$(CONFIG_ARCH_MVEBU)   += irq-armada-370-xp.o
drivers/irqchip/irq-armada-370-xp.c renamed from arch/arm/mach-mvebu/irq-armada-370-xp.c +11 -14
similarity index 87%
rename from arch/arm/mach-mvebu/irq-armada-370-xp.c
rename to drivers/irqchip/irq-armada-370-xp.c
index 5f5f939..140c6b3 100644
@@ -23,6 +23,7 @@
 #include <linux/of_irq.h>
 #include <linux/irqdomain.h>
 #include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
 #include <asm/exception.h>
 
 /* Interrupt Controller Registers Map */
@@ -77,8 +78,11 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
 	.xlate = irq_domain_xlate_onecell,
 };
 
-static int __init armada_370_xp_mpic_of_init(struct device_node *node,
-					     struct device_node *parent)
+static asmlinkage void
+armada_370_xp_handle_irq(struct pt_regs *regs);
+
+int __init armada_370_xp_mpic_of_init(struct device_node *node,
+				      struct device_node *parent)
 {
 	u32 control;
 
@@ -98,11 +102,14 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
 		panic("Unable to add Armada_370_Xp MPIC irq domain (DT)\n");
 
 	irq_set_default_host(armada_370_xp_mpic_domain);
+
+	handle_arch_irq = armada_370_xp_handle_irq;
+
 	return 0;
 }
 
-asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs
-							       *regs)
+static asmlinkage void __exception_irq_entry
+armada_370_xp_handle_irq(struct pt_regs *regs)
 {
 	u32 irqstat, irqnr;
 
@@ -121,13 +128,3 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs
 		break;
 	} while (1);
 }
-
-static const struct of_device_id mpic_of_match[] __initconst = {
-	{.compatible = "marvell,mpic", .data = armada_370_xp_mpic_of_init},
-	{},
-};
-
-void __init armada_370_xp_init_irq(void)
-{
-	of_irq_init(mpic_of_match);
-}
drivers/irqchip/irqchip.c +6 -0
index e2496e4..f36d423 100644
@@ -20,6 +20,12 @@ static const struct of_device_id irqchip_of_match[] __initconst = {
 		.data = bcm2835_irqchip_init,
 	},
 #endif
+#ifdef CONFIG_ARCH_MVEBU
+	{
+		.compatible = "marvell,mpic",
+		.data = armada_370_xp_mpic_of_init,
+	},
+#endif
 	{},
 };
 
drivers/irqchip/irqchip.h +2 -0
index 1075537..0a0d7af 100644
@@ -12,5 +12,7 @@
 #define _IRQCHIP_H
 
 int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
+int armada_370_xp_mpic_of_init(struct device_node *node,
+			       struct device_node *parent);
 
 #endif
Signature · 1 line
1.7.9.5
#7 lore raw

PATCH v3 3/4 arm: mvebu: move irq controller driver to drivers/irqchip

Quoted 13 lines · Thomas Petazzoni

Now that the drivers/irqchip/ directory has a minimal infrastructure to support the addition of irq controller driver, we move the irq controller driver for Armada 370 and Armada XP ARM SoCs from the arch/arm/mach-mvebu/ directory to the drivers/irqchip/ directory and update the irqchip infrastructure to take into account this new driver.

[...]

drivers/irqchip/Makefile +0 -0
index 6b5a6e0..5148ffd 100644

drivers/irqchip/Makefile line 3

Quoted 3 lines
drivers/irqchip/Makefile +1 -0
@@ -1,2 +1,3 @@
  obj-$(CONFIG_IRQCHIP) += irqchip.o
  obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
+obj-$(CONFIG_ARCH_MVEBU)   += irq-armada-370-xp.o

Thomas,

using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to incompatibilities with Orion SoCs when they move over to ARCH_MVEBU. Although, it is ok for the moment please choose either a CONFIG_ common for both Armada 370 and XP.

With a Kconfig within drivers/irqchip you could define a ARMADA_370_XP_IRQ and select that in MACH_ARMADA_370 and MACH_ARMADA_XP or MACH_ARMADA_370_XP, which all already exist.

As soon as the patch is through, I can provide (and use) a irq-orion based on irqchip. I can provide it earlier but to actually use it there are still some other patches required on Dove. Other Orions could switch now, I guess.

Sebastian

#8 lore raw

PATCH v3 3/4 arm: mvebu: move irq controller driver to drivers/irqchip

Sebastian,

Quoted 2 lines · Sebastian Hesselbarth

using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to incompatibilities with Orion SoCs when they move over to ARCH_MVEBU.

Not really: the driver is probed depending on the DT compatible string. So we can perfectly have two irqchip drivers being enabled on ARCH_MVEBU.

Quoted 6 lines

Although, it is ok for the moment please choose either a CONFIG_ common for both Armada 370 and XP.

With a Kconfig within drivers/irqchip you could define a ARMADA_370_XP_IRQ and select that in MACH_ARMADA_370 and MACH_ARMADA_XP or MACH_ARMADA_370_XP, which all already exist.

But agreed, I could use MACH_ARMADA_370_XP. I don't know if we want to add Kconfig options for each irqchip driver.

Quoted 4 lines

As soon as the patch is through, I can provide (and use) a irq-orion based on irqchip. I can provide it earlier but to actually use it there are still some other patches required on Dove. Other Orions could switch now, I guess.

Are you sure? The irqchip drivers only work for sub-architecture that are fully converted to the Device Tree. And I don't think all of mach-orion5x, mach-dove, mach-kirkwood and mach-mv78xx0 are converted to the DT.

Best regards,

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#9 lore raw

PATCH v3 3/4 arm: mvebu: move irq controller driver to drivers/irqchip

Quoted 6 lines · Thomas Petazzoni
Quoted 2 lines

using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to incompatibilities with Orion SoCs when they move over to ARCH_MVEBU.

Not really: the driver is probed depending on the DT compatible string. So we can perfectly have two irqchip drivers being enabled on ARCH_MVEBU.

I agreed but this will always build irq-armada-370-xp into the kernel although I maybe want a orion-only kernel. Although multi-platform will be great for ARM, I doubt that every kernel will be multi-platform?

Quoted 6 lines
Quoted 3 lines

With a Kconfig within drivers/irqchip you could define a ARMADA_370_XP_IRQ and select that in MACH_ARMADA_370 and MACH_ARMADA_XP or MACH_ARMADA_370_XP, which all already exist.

But agreed, I could use MACH_ARMADA_370_XP. I don't know if we want to add Kconfig options for each irqchip driver.

Ok.

Quoted 9 lines
Quoted 4 lines

As soon as the patch is through, I can provide (and use) a irq-orion based on irqchip. I can provide it earlier but to actually use it there are still some other patches required on Dove. Other Orions could switch now, I guess.

Are you sure? The irqchip drivers only work for sub-architecture that are fully converted to the Device Tree. And I don't think all of mach-orion5x, mach-dove, mach-kirkwood and mach-mv78xx0 are converted to the DT.

Hmm, I do have an experimental branch of Dove with irqchip enabled that works perfectly fine even with non-DT code in it. Actually, it is based on 3.7-rc3 which means it is before your patches.

But the irq controller itself is referenced from DT, of course.

Sebastian

#10 lore raw

PATCH v3 3/4 arm: mvebu: move irq controller driver to drivers/irqchip

Hello,

Quoted 7 lines · Sebastian Hesselbarth
Quoted 3 lines

Not really: the driver is probed depending on the DT compatible string. So we can perfectly have two irqchip drivers being enabled on ARCH_MVEBU.

I agreed but this will always build irq-armada-370-xp into the kernel although I maybe want a orion-only kernel. Although multi-platform will be great for ARM, I doubt that every kernel will be multi-platform?

Agreed.

Quoted 10 lines
Quoted 9 lines
Quoted 4 lines

As soon as the patch is through, I can provide (and use) a irq-orion based on irqchip. I can provide it earlier but to actually use it there are still some other patches required on Dove. Other Orions could switch now, I guess.

Are you sure? The irqchip drivers only work for sub-architecture that are fully converted to the Device Tree. And I don't think all of mach-orion5x, mach-dove, mach-kirkwood and mach-mv78xx0 are converted to the DT.

Quoted 5 lines

Hmm, I do have an experimental branch of Dove with irqchip enabled that works perfectly fine even with non-DT code in it. Actually, it is based on 3.7-rc3 which means it is before your patches.

But the irq controller itself is referenced from DT, of course.

Yes, you need at least to probe the irq controller from DT. But neither mach-orion5x nor mach-mv78xx0 have DT at all, and they need irq-orion.

I am currently in contact with an engineer from LaCie, who has put his hands on a mach-orion5x platform, I hope to work with him to get DT support in mach-orion5x.

Best regards,

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
maintainer
#11 lore raw

PATCH v3 3/4 arm: mvebu: move irq controller driver to drivers/irqchip

In reply to Sebastian Hesselbarth
Quoted 11 lines · Sebastian Hesselbarth
Quoted 6 lines · Thomas Petazzoni
Quoted 2 lines

using ARCH_MVEBU for enabling irq-armada-370-xp here will lead to incompatibilities with Orion SoCs when they move over to ARCH_MVEBU.

Not really: the driver is probed depending on the DT compatible string. So we can perfectly have two irqchip drivers being enabled on ARCH_MVEBU.

I agreed but this will always build irq-armada-370-xp into the kernel although I maybe want a orion-only kernel. Although multi-platform will be great for ARM, I doubt that every kernel will be multi-platform?

Actually, there are multiple multi-platform kernels, kirkwood is v5 where as 370/XP is v6. So a kirkwood build will not need irq-armada-370-xp.

Andrew

#12 lore raw

PATCH v3 4/4 irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS

In reply to Thomas Petazzoni

Now that the drivers/irqchip/ directory is getting more code, it needs a maintainer. The obvious maintainer for it is Thomas Gleixner, who is maintaining the overall IRQ subsystem. So we add drivers/irqchip/ in the list of directories that are part of the IRQ subsystem.

---
 MAINTAINERS |    1 +
 1 file changed, 1 insertion(+)
MAINTAINERS +1 -0
index 027ec2b..70bd390 100644
@@ -4034,6 +4034,7 @@ M:	Thomas Gleixner <[email protected]>
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
 F:	kernel/irq/
+F:	drivers/irqchip/
 
 IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
 M:	Benjamin Herrenschmidt <[email protected]>
Signature · 1 line
1.7.9.5