ARM: bcm2835: add mailbox driver

The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") and the ARM CPU. The ARM CPU is often thought of as the main CPU. However, the VideoCore actually controls the initial SoC boot, and hides much of the hardware behind a protocol. This protocol is transported using the SoC's mailbox hardware module.

Here, we add a very simplistic driver for the mailbox module, and define a few structures for the property messages.

---
v3: Re-license to GPL-v2 or later.
v2:
* Added documentation to mbox.h.
* Implemented macros to set up headers and tags.
* Implemented error-checking of response bits in bcm2835_mbox_call_prop().
* Reworked tag structs based on experience writing LCD driver.
* Added a lot more video-related tag structs.
* Added debug spew and error messages to mbox.c; useful when debugging LCD.
* Removed __packed attributes from message structs.
* Removed stale FIXME comments.

---
 arch/arm/cpu/arm1176/bcm2835/Makefile    |    2 +-
 arch/arm/cpu/arm1176/bcm2835/mbox.c      |  164 ++++++++++++
 arch/arm/include/asm/arch-bcm2835/mbox.h |  407 ++++++++++++++++++++++++++++++
 3 files changed, 572 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/mbox.c
 create mode 100644 arch/arm/include/asm/arch-bcm2835/mbox.h

index 95da6a8..135de42 100644
@@ -17,7 +17,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(SOC).o
 
 SOBJS	:= lowlevel_init.o
-COBJS	:= init.o reset.o timer.o
+COBJS	:= init.o reset.o timer.o mbox.o
 
 SRCS	:= $(SOBJS:.o=.c) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))

1.7.9.5

The firmware running on the bcm2835 SoC's VideoCore CPU determines how much of the system RAM is available for use by the ARM CPU. Previously, U-Boot assumed that only 128MB was available, since this was the smallest value configured by any public firmware. However, we can now query the actual value at run-time from the firmware using the mbox property protocol.

---
v3: No change.
v2: Updated to use macros etc. added in v2 of mbox driver patch.

---
 board/raspberrypi/rpi_b/rpi_b.c |   21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

index 688b0aa..3c654a1 100644
@@ -15,13 +15,32 @@
  */
 
 #include <common.h>
+#include <asm/arch/mbox.h>
 #include <asm/global_data.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct msg_get_arm_mem {
+	struct bcm2835_mbox_hdr hdr;
+	struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
+	u32 end_tag;
+};
+
 int dram_init(void)
 {
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16);
+	int ret;
+
+	BCM2835_MBOX_INIT_HDR(msg);
+	BCM2835_MBOX_INIT_TAG(&msg->get_arm_mem, GET_ARM_MEMORY);
+
+	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
+	if (ret) {
+		printf("bcm2835: Could not query ARM memory size\n");
+		return -1;
+	}
+
+	gd->ram_size = msg->get_arm_mem.body.resp.mem_size;
 
 	return 0;
 }

1.7.9.5

When an LCD driver is actually driving a regular external display, e.g. an HDMI monitor, the display resolution might not be known until the display controller has initialized, i.e. during lcd_ctrl_init(). However, lcd.c calculates lcd_line_length before calling this function, thus relying on a hard-coded resolution in struct panel_info.

Instead, defer this calculation until after lcd_ctrl_init() has had the chance to dynamically determine the resolution. This needs to happen before lcd_clear(), since the value is used there.

grep indicates that no code outside lcd.c uses this lcd_line_length; in particular, no lcd_ctrl_init() implementations read it.

--
v3: No change.

---
 common/lcd.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

index b6be800..1a20f85 100644
@@ -333,8 +333,6 @@ int drv_lcd_init (void)
 
 	lcd_base = (void *)(gd->fb_base);
 
-	lcd_line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
-
 	lcd_init(lcd_base);		/* LCD initialization */
 
 	/* Device initialization */

@@ -416,6 +414,7 @@ static int lcd_init(void *lcdbase)
 	debug("[LCD] Initializing LCD frambuffer at %p\n", lcdbase);
 
 	lcd_ctrl_init(lcdbase);
+	lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
 	lcd_is_enabled = 1;
 	lcd_clear();
 	lcd_enable ();

1.7.9.5

Hi Stephen,

Sorry, but this one does not apply cleanly any more. Can you fix it, and make sure 4/4 also applies on u-boot-arm/master? I'll apply all four patches then.

Amicalement,

Albert.

The firmware running on the bcm2835 SoC's VideoCore CPU manages the display controller. Add a simple "LCD" driver that communicates with the firmware using the property mailbox protocol. This configures the display and frame-buffer to match whatever physical resolution the firmware chosen when booting, which is typically the native resolution of the attached display device, presumably unless otherwise specified in config.txt on the boot media.

Enable this driver in the Raspberry Pi board configuration.

---
v3: Re-license to GPL-v2 or later. Fix typo in commit description.
v2: New patch.

---
 drivers/video/Makefile  |    1 +
 drivers/video/bcm2835.c |  127 +++++++++++++++++++++++++++++++++++++++++++++++
 include/configs/rpi_b.h |   16 ++++++
 3 files changed, 144 insertions(+)
 create mode 100644 drivers/video/bcm2835.c

index ebb6da8..e6efda6 100644
@@ -39,6 +39,7 @@ COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
 COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
 COBJS-$(CONFIG_SED156X) += sed156x.o
 COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
+COBJS-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
 COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
 COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o

index cf62e45..a709feb 100644
@@ -57,6 +57,17 @@
 /* Devices */
 /* GPIO */
 #define CONFIG_BCM2835_GPIO
+/* LCD */
+#define CONFIG_LCD
+#define LCD_BPP				LCD_COLOR16
+/*
+ * Prevent allocation of RAM for FB; the real FB address is queried
+ * dynamically from the VideoCore co-processor, and comes from RAM
+ * not owned by the ARM CPU.
+ */
+#define CONFIG_FB_ADDR			0
+#define CONFIG_VIDEO_BCM2835
+#define CONFIG_SYS_WHITE_ON_BLACK
 
 /* Console UART */
 #define CONFIG_PL011_SERIAL

@@ -74,6 +85,11 @@
 #define CONFIG_ENV_SIZE			SZ_16K
 #define CONFIG_ENV_IS_NOWHERE
 #define CONFIG_SYS_LOAD_ADDR		0x1000000
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_EXTRA_ENV_SETTINGS	"stdin=serial\0" \
+					"stderr=serial,lcd\0" \
+					"stdout=serial,lcd\0"
 
 /* Shell */
 #define CONFIG_SYS_HUSH_PARSER

1.7.9.5