clk: ux500: Add some more clk lookups for u8500

From: Ulf Hansson <[email protected]>

Some more clock lookups added for rng clocks and for the nomadik ske keypad clocks.

Ulf Hansson (2):
clk: ux500: Register rng clock lookups for u8500
clk: ux500: Register nomadik keypad clock lookups for u8500

 drivers/clk/ux500/u8500_clk.c |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

1.7.10

From: Ulf Hansson <[email protected]>

---
 drivers/clk/ux500/u8500_clk.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

index afdf738..6390486 100644
@@ -371,6 +371,7 @@ void u8500_clk_init(void)
 
 	clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", U8500_CLKRST6_BASE,
 				BIT(0), 0);
+	clk_register_clkdev(clk, "apb_pclk", "rng");
 
 	clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", U8500_CLKRST6_BASE,
 				BIT(1), 0);

@@ -514,5 +515,5 @@ void u8500_clk_init(void)
 	/* Periph6 */
 	clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk",
 			U8500_CLKRST6_BASE, BIT(0), CLK_SET_RATE_GATE);
-
+	clk_register_clkdev(clk, NULL, "rng");
 }

1.7.10

From: Ulf Hansson <[email protected]>

---
 drivers/clk/ux500/u8500_clk.c |    4 ++++
 1 file changed, 4 insertions(+)

index 6390486..8575096 100644
@@ -343,6 +343,8 @@ void u8500_clk_init(void)
 
 	clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", U8500_CLKRST3_BASE,
 				BIT(5), 0);
+	clk_register_clkdev(clk, "apb_pclk", "ske");
+	clk_register_clkdev(clk, "apb_pclk", "nmk-ske-keypad");
 
 	clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", U8500_CLKRST3_BASE,
 				BIT(6), 0);

@@ -503,6 +505,8 @@ void u8500_clk_init(void)
 
 	clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k",
 			U8500_CLKRST3_BASE, BIT(5), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "ske");
+	clk_register_clkdev(clk, NULL, "nmk-ske-keypad");
 
 	clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk",
 			U8500_CLKRST3_BASE, BIT(6), CLK_SET_RATE_GATE);

1.7.10

for these.

They have the right name and all, apb_pclk is
"AMBA peripheral bus, peripheral block clock"
so a clock for the silicon, right.

... then how it's supposed to be used, that's another issue...

Yours,
Linus Walleij

Well, the apb pclk is the APB bus clock which times all transfers on the APB bus. Without the APB bus clock running, you can't talk to any peripherals attached to that bus.

If your SoC controls the APB bus clock to each peripheral individually (like, I seem to remember your Ux500 stuff does) and the peripheral is not being clocked, then although the bus master may be seeing a clock, and will manipulate the bus signals, the target will remain unresponsive due to lack of clock.

So, the general principle is that the APB PCLK needs to be 'enabled' whenever the peripheral in question is expecting any kind of access via the APB bus.

All rather simple really.

Yes .. for the PrimeCell derivates we are using the bus code in drivers/amba/bus.c now, so pclk is taken care of at the bus level. And I'm trying to move things that have PrimeCell ID registers to that bus.

For platform devices we're not handling the pclk in the bus layer, and when I talked to Kevin Hilman about it it turns out that OMAP is doing all that in the PM domains, as is SH (-mobile) and have the platform bus not intervene.

Both the above rely on drivers simply doing pm_runtime_get() and friends so for drivers it looks the same.

And then some drivers have been grabbing the pclk directly. This is probably not to be encouraged.

That's what I was referring to when saying I wasn't clear on where it was to be handled. But I think I'm more on the clear now.

Yours,
Linus Walleij

Quoting Ulf Hansson (2012-10-31 06:40:51)

Taken into clk-next.

Thanks,
Mike