KVM/ARM Implementation

KVM uses the stage-2 page tables and the Hyp page table format, so we define the fields and page protection flags needed by KVM.

The nomenclature is this:
- page_hyp: PL2 code/data mappings
- page_hyp_device: PL2 device mappings (vgic access)
- page_s2: Stage-2 code/data page mappings
- page_s2_device: Stage-2 device mappings (vgic access)

Reviewed-by Marcelo Tosatti <[email protected]>

Christoffer Dall <[email protected]>

arch/arm/mm/mmu.c +0 -0

index 941dfb9..087d949 100644
@@ -57,43 +57,61 @@ static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK;
 static unsigned int ecc_mask __initdata = 0;
 pgprot_t pgprot_user;

Quoted 11 lines · Christoffer Dall

KVM uses the stage-2 page tables and the Hyp page table format, so we define the fields and page protection flags needed by KVM.

The nomenclature is this:
- page_hyp: PL2 code/data mappings
- page_hyp_device: PL2 device mappings (vgic access)
- page_s2: Stage-2 code/data page mappings
- page_s2_device: Stage-2 device mappings (vgic access)

Reviewed-by Marcelo Tosatti <[email protected]>

Christoffer Dall <[email protected]>

[...]

Quoted 12 lines

arch/arm/mm/mmu.c +3 -0

index 941dfb9..087d949 100644
@@ -57,43 +57,61 @@ static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK;
 static unsigned int ecc_mask __initdata = 0;
 pgprot_t pgprot_user;
 pgprot_t pgprot_kernel;
+pgprot_t pgprot_hyp_device;
+pgprot_t pgprot_s2;
+pgprot_t pgprot_s2_device;
 

arch/arm/mm/mmu.c static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK; · line 68

Quoted 5 lines

arch/arm/mm/mmu.c +3 -0

 EXPORT_SYMBOL(pgprot_user);
 EXPORT_SYMBOL(pgprot_kernel);
+EXPORT_SYMBOL(pgprot_hyp_device);
+EXPORT_SYMBOL(pgprot_s2);
+EXPORT_SYMBOL(pgprot_s2_device);

Do we still need these?

Quoted 8 lines

arch/arm/mm/mmu.c +1 -0

 struct cachepolicy {
      const char      policy[16];
      unsigned int    cr_mask;
      pmdval_t        pmd;
      pteval_t        pte;
+     pteval_t        pte_s2;
 };
 

arch/arm/mm/mmu.c static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK; · line 81

Quoted 5 lines

arch/arm/mm/mmu.c +5 -0

+#ifdef CONFIG_ARM_LPAE
+#define s2_policy(policy)    policy
+#else
+#define s2_policy(policy)    0
+#endif

Put the macro in pgtable-{2,3}level.h?

Quoted 10 lines · Will Deacon

Review

Quoted 6 lines · Christoffer Dall

(quoted diff) +5 -0

+#ifdef CONFIG_ARM_LPAE
+#define s2_policy(policy)    policy
+#else
+#define s2_policy(policy)    0
+#endif

Put the macro in pgtable-{2,3}level.h?

I think that's weird, defining something far away from where it's used will only make it harder to read, pgtable.h is not included in this file, and there are other #ifdef CONFIG_ARM_LPAE in that file.

Quoted 12 lines · Christoffer Dall

Quoted 10 lines · Will Deacon

Review

Quoted 6 lines · Christoffer Dall

(quoted diff) +5 -0

+#ifdef CONFIG_ARM_LPAE
+#define s2_policy(policy)    policy
+#else
+#define s2_policy(policy)    0
+#endif

Put the macro in pgtable-{2,3}level.h?

Quoted 3 lines

I think that's weird, defining something far away from where it's used will only make it harder to read, pgtable.h is not included in this file, and there are other #ifdef CONFIG_ARM_LPAE in that file.

Of course pgtable.h is included in this file -- we have direct references to L_PTE_MT_UNCACHED, for example, so by your logic we should inline all of that too!

Yes, there are other CONFIG_ARM_LPAE checks in this file, but only where there's a piece of code that is not applicable one way or the other. For data definitions, it's really easy to fix in the headers so please do it there instead.

Add a method (hyp_idmap_setup) to populate a hyp pgd with an identity mapping of the code contained in the .hyp.idmap.text section.

Offer a method to drop this identity mapping through hyp_idmap_teardown.

Make all the above depend on CONFIG_ARM_VIRT_EXT and CONFIG_ARM_LPAE.

Cc Will Deacon <[email protected]>

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Marc Zyngier <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

---
 arch/arm/include/asm/idmap.h                |    5 ++
 arch/arm/include/asm/pgtable-3level-hwdef.h |    1 
 arch/arm/kernel/vmlinux.lds.S               |    6 ++
 arch/arm/mm/idmap.c                         |   74 +++++++++++++++++++++++----
 4 files changed, 73 insertions(+), 13 deletions(-)

arch/arm/include/asm/idmap.h +0 -0

index bf863ed..36708ba 100644

arch/arm/include/asm/idmap.h +19 -0

+/*
+ * This version actually frees the underlying pmds for all pgds in range and
+ * clear the pgds themselves afterwards.
+ */
+void hyp_idmap_teardown(pgd_t *hyp_pgd)
+{
+	unsigned long addr, end;
+	unsigned long next;
+	pgd_t *pgd = hyp_pgd;
+
+	addr = virt_to_phys(__hyp_idmap_text_start);
+	end = virt_to_phys(__hyp_idmap_text_end);
+
+	pgd += pgd_index(addr);
+	do {
+		next = pgd_addr_end(addr, end);
+		if (!pgd_none_or_clear_bad(pgd))
+			hyp_idmap_del_pmd(pgd, addr);
+	} while (pgd++, addr = next, addr < end);

Quoted 28 lines · Christoffer Dall

Add a method (hyp_idmap_setup) to populate a hyp pgd with an identity mapping of the code contained in the .hyp.idmap.text section.

Offer a method to drop this identity mapping through hyp_idmap_teardown.

Make all the above depend on CONFIG_ARM_VIRT_EXT and CONFIG_ARM_LPAE.

Cc Will Deacon <[email protected]>

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Marc Zyngier <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

---
 arch/arm/include/asm/idmap.h                |    5 ++
 arch/arm/include/asm/pgtable-3level-hwdef.h |    1
 arch/arm/kernel/vmlinux.lds.S               |    6 ++
 arch/arm/mm/idmap.c                         |   74 +++++++++++++++++++++++----
 4 files changed, 73 insertions(+), 13 deletions(-)

arch/arm/include/asm/idmap.h +0 -0

index bf863ed..36708ba 100644
@@ -11,4 +11,9 @@ extern pgd_t *idmap_pgd;
 
 void setup_mm_for_reboot(void);
 

arch/arm/include/asm/idmap.h extern pgd_t *idmap_pgd; · line 17

Quoted 4 lines

arch/arm/include/asm/idmap.h +4 -0

+#ifdef CONFIG_ARM_VIRT_EXT
+void hyp_idmap_teardown(pgd_t *hyp_pgd);
+void hyp_idmap_setup(pgd_t *hyp_pgd);
+#endif

I wonder whether the dependency is quite right here. Functionally, we're only dependent on LPAE but it doesn't make sense if !ARM_VIRT_EXT. In fact, I start to question whether CONFIG_ARM_VIRT_EXT is worthwhile at all as it stands. Maybe it would be better to add the LPAE dependency there and make the hyp_stub stuff that's currently in mainline unconditional?

Quoted 23 lines

arch/arm/include/asm/idmap.h +23 -0

+/*
+ * This version actually frees the underlying pmds for all pgds in range and
+ * clear the pgds themselves afterwards.
+ */
+void hyp_idmap_teardown(pgd_t *hyp_pgd)
+{
+     unsigned long addr, end;
+     unsigned long next;
+     pgd_t *pgd = hyp_pgd;
+
+     addr = virt_to_phys(__hyp_idmap_text_start);
+     end = virt_to_phys(__hyp_idmap_text_end);
+
+     pgd += pgd_index(addr);
+     do {
+             next = pgd_addr_end(addr, end);
+             if (!pgd_none_or_clear_bad(pgd))
+                     hyp_idmap_del_pmd(pgd, addr);
+     } while (pgd++, addr = next, addr < end);
+}
+EXPORT_SYMBOL_GPL(hyp_idmap_teardown);
+
+void hyp_idmap_setup(pgd_t *hyp_pgd)

arch/arm/include/asm/idmap.h

Quoted 6 lines

arch/arm/include/asm/idmap.h +6 -0

+{
+     identity_mapping_add(hyp_pgd, __hyp_idmap_text_start,
+                          __hyp_idmap_text_end, PMD_SECT_AP1);
+}
+EXPORT_SYMBOL_GPL(hyp_idmap_setup);
+#endif

Again, do we need these exports?

I also think it might be cleaner to declare the hyp_pgd next to the idmap_pgd then add the hyp_idmap_setup code to init_static_idmap, so that we don't add new entry points to this file. The teardown can all be moved into the kvm/ code as it doesn't need any of the existing idmap functions.

From 9cbe2830b74072b4d7167254562fc06c08f724e1 Mon Sep 17 00:00:00 2001

Quoted 7 lines · Will Deacon

I also think it might be cleaner to declare the hyp_pgd next to the idmap_pgd then add the hyp_idmap_setup code to init_static_idmap, so that we don't add new entry points to this file. The teardown can all be moved into the kvm/ code as it doesn't need any of the existing idmap functions.

hmm, we had some attempts at this earlier, but it wasn't all that nice. Allocating the hyp_pgd inside idmap.c requires some more logic, and the #ifdefs inside init_static_idmap are also not pretty.

I see how you would like to clean this up, but it's not really hard to read or understand, imho:

Quoted 12 lines · Christoffer Dall

Quoted 7 lines · Will Deacon

I also think it might be cleaner to declare the hyp_pgd next to the idmap_pgd then add the hyp_idmap_setup code to init_static_idmap, so that we don't add new entry points to this file. The teardown can all be moved into the kvm/ code as it doesn't need any of the existing idmap functions.

hmm, we had some attempts at this earlier, but it wasn't all that nice. Allocating the hyp_pgd inside idmap.c requires some more logic, and the #ifdefs inside init_static_idmap are also not pretty.

[...]

Quoted 2 lines

I see how you would like to clean this up, but it's not really hard to read or understand, imho:

I have to disagree. As it stands, idmap.c has *no* entry points for manipulating the page tables, which is a good thing because it puts all the mapping code in one place and makes it both easy to use and easy to reason about. Your patch starts exposing a load of this stuff to the rest of the kernel, which is actively going against the design that we currently have.

Here is a quick, untested patch to fix that (modulo the ARM_VIRT_EXT implies ARM_LPAE change I suggested).

Add a method (hyp_idmap_setup) to populate a hyp pgd with an identity mapping of the code contained in the .hyp.idmap.text section.

Offer a method to drop this identity mapping through hyp_idmap_teardown.

Make all the above depend on CONFIG_ARM_VIRT_EXT and CONFIG_ARM_LPAE.

Cc Will Deacon <[email protected]>

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Marc Zyngier <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

---
 arch/arm/include/asm/idmap.h                |    5 ++
 arch/arm/include/asm/pgtable-3level-hwdef.h |    1 
 arch/arm/kernel/vmlinux.lds.S               |    6 ++
 arch/arm/mm/idmap.c                         |   74 +++++++++++++++++++++++----
 4 files changed, 73 insertions(+), 13 deletions(-)

arch/arm/include/asm/idmap.h +0 -0

index bf863ed..36708ba 100644

Decoding the implementor and part number of the CPU id in the CPU ID register is needed by KVM, so we factor it out to share the code.

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

arch/arm/include/asm/cputype.h +5 -0

index cb47d28..306fb2c 100644
@@ -51,6 +51,22 @@ extern unsigned int processor_id;
 #define read_cpuid_ext(reg) 0
 #endif
 
+#define IMPLEMENTOR_ARM		0x41
+#define IMPLEMENTOR_INTEL	0x69
+
+#define PART_NUMBER_ARM1136	0xB360
+#define PART_NUMBER_ARM1156	0xB560

arch/arm/include/asm/cputype.h +0 -0

 /*
  * The CPU ID never changes at run time, so we might as well tell the
  * compiler that it's constant.  Use this function to read the CPU ID

@@ -61,6 +77,16 @@ static inline unsigned int __attribute_const__ read_cpuid_id(void)
 	return read_cpuid(CPUID_ID);
 }

arch/arm/include/asm/cputype.h +0 -0

 static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
 {
 	return read_cpuid(CPUID_CACHETYPE);

arch/arm/kernel/perf_event_cpu.c +13 -13

index 8d7d8d4..ff18566 100644
@@ -200,46 +200,46 @@ static struct arm_pmu *__devinit probe_current_pmu(void)
 	struct arm_pmu *pmu = NULL;
 	int cpu = get_cpu();
 	unsigned long cpuid = read_cpuid_id();
-	unsigned long implementor = (cpuid & 0xFF000000) >> 24;
-	unsigned long part_number = (cpuid & 0xFFF0);
+	unsigned long implementor = read_cpuid_implementor();
+	unsigned long part_number = read_cpuid_part_number();
 
 	pr_info("probing PMU on CPU %d\n", cpu);
 
 	/* ARM Ltd CPUs. */
-	if (0x41 == implementor) {
+	if (implementor == IMPLEMENTOR_ARM) {
 		switch (part_number) {
-		case 0xB360:	/* ARM1136 */
-		case 0xB560:	/* ARM1156 */
-		case 0xB760:	/* ARM1176 */
+		case PART_NUMBER_ARM1136:
+		case PART_NUMBER_ARM1156:
+		case PART_NUMBER_ARM1176:
 			pmu = armv6pmu_init();
 			break;
-		case 0xB020:	/* ARM11mpcore */
+		case PART_NUMBER_ARM11MPCORE:
 			pmu = armv6mpcore_pmu_init();
 			break;
-		case 0xC080:	/* Cortex-A8 */
+		case PART_NUMBER_CORTEX_A8:
 			pmu = armv7_a8_pmu_init();
 			break;
-		case 0xC090:	/* Cortex-A9 */
+		case PART_NUMBER_CORTEX_A9:
 			pmu = armv7_a9_pmu_init();
 			break;
-		case 0xC050:	/* Cortex-A5 */
+		case PART_NUMBER_CORTEX_A5:
 			pmu = armv7_a5_pmu_init();
 			break;
-		case 0xC0F0:	/* Cortex-A15 */
+		case PART_NUMBER_CORTEX_A15:
 			pmu = armv7_a15_pmu_init();
 			break;
-		case 0xC070:	/* Cortex-A7 */
+		case PART_NUMBER_CORTEX_A7:
 			pmu = armv7_a7_pmu_init();
 			break;
 		}
 	/* Intel CPUs [xscale]. */
-	} else if (0x69 == implementor) {
+	} else if (implementor == IMPLEMENTOR_INTEL) {
 		part_number = (cpuid >> 13) & 0x7;

Quoted 5 lines · Christoffer Dall

Decoding the implementor and part number of the CPU id in the CPU ID register is needed by KVM, so we factor it out to share the code.

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

[...]

Quoted 13 lines

arch/arm/include/asm/cputype.h +5 -0

index cb47d28..306fb2c 100644
@@ -51,6 +51,22 @@ extern unsigned int processor_id;
 #define read_cpuid_ext(reg) 0
 #endif
 
+#define IMPLEMENTOR_ARM              0x41
+#define IMPLEMENTOR_INTEL    0x69
+
+#define PART_NUMBER_ARM1136  0xB360
+#define PART_NUMBER_ARM1156  0xB560

arch/arm/include/asm/cputype.h extern unsigned int processor_id; · line 68

Quoted 10 lines

arch/arm/include/asm/cputype.h +10 -0

+#define PART_NUMBER_ARM1176  0xB760
+#define PART_NUMBER_ARM11MPCORE      0xB020
+#define PART_NUMBER_CORTEX_A8        0xC080
+#define PART_NUMBER_CORTEX_A9        0xC090
+#define PART_NUMBER_CORTEX_A5        0xC050
+#define PART_NUMBER_CORTEX_A15       0xC0F0
+#define PART_NUMBER_CORTEX_A7        0xC070
+
+#define PART_NUMBER_XSCALE1  0x1
+#define PART_NUMBER_XSCALE2  0x2

We should probably prefix these with ARM_CPU_ and make the current names shorter to compensate. e.g. ARM_CPU_PART_1136, ARM_CPU_IMP_ARM ?

Quoted 6 lines

arch/arm/include/asm/cputype.h +0 -0

 /*
  * The CPU ID never changes at run time, so we might as well tell the
  * compiler that it's constant.  Use this function to read the CPU ID

@@ -61,6 +77,16 @@ static inline unsigned int __attribute_const__ read_cpuid_id(void)
      return read_cpuid(CPUID_ID);
 }

arch/arm/include/asm/cputype.h static inline unsigned int __attribute_const__ read_cpuid_id(void) · line 88

Quoted 10 lines

arch/arm/include/asm/cputype.h +9 -0

 
+static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
+{
+     return (read_cpuid_id() & 0xFF000000) >> 24;
+}
+
+static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
+{
+     return (read_cpuid_id() & 0xFFF0);
+}

Perhaps this should take the implementor as an argument, given that the part number is described differently between implementors. The xscale stuff can then move in here (we'll need to check the xscale docs in case perf is using a subfield -- I can't remember off-hand).

Quoted 64 lines

arch/arm/include/asm/cputype.h +0 -0

 static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
 {
      return read_cpuid(CPUID_CACHETYPE);

arch/arm/kernel/perf_event_cpu.c +14 -14

index 8d7d8d4..ff18566 100644
@@ -200,46 +200,46 @@ static struct arm_pmu *__devinit probe_current_pmu(void)
      struct arm_pmu *pmu = NULL;
      int cpu = get_cpu();
      unsigned long cpuid = read_cpuid_id();
-     unsigned long implementor = (cpuid & 0xFF000000) >> 24;
-     unsigned long part_number = (cpuid & 0xFFF0);
+     unsigned long implementor = read_cpuid_implementor();
+     unsigned long part_number = read_cpuid_part_number();
 
      pr_info("probing PMU on CPU %d\n", cpu);
 
      /* ARM Ltd CPUs. */
-     if (0x41 == implementor) {
+     if (implementor == IMPLEMENTOR_ARM) {
              switch (part_number) {
-             case 0xB360:    /* ARM1136 */
-             case 0xB560:    /* ARM1156 */
-             case 0xB760:    /* ARM1176 */
+             case PART_NUMBER_ARM1136:
+             case PART_NUMBER_ARM1156:
+             case PART_NUMBER_ARM1176:
                      pmu = armv6pmu_init();
                      break;
-             case 0xB020:    /* ARM11mpcore */
+             case PART_NUMBER_ARM11MPCORE:
                      pmu = armv6mpcore_pmu_init();
                      break;
-             case 0xC080:    /* Cortex-A8 */
+             case PART_NUMBER_CORTEX_A8:
                      pmu = armv7_a8_pmu_init();
                      break;
-             case 0xC090:    /* Cortex-A9 */
+             case PART_NUMBER_CORTEX_A9:
                      pmu = armv7_a9_pmu_init();
                      break;
-             case 0xC050:    /* Cortex-A5 */
+             case PART_NUMBER_CORTEX_A5:
                      pmu = armv7_a5_pmu_init();
                      break;
-             case 0xC0F0:    /* Cortex-A15 */
+             case PART_NUMBER_CORTEX_A15:
                      pmu = armv7_a15_pmu_init();
                      break;
-             case 0xC070:    /* Cortex-A7 */
+             case PART_NUMBER_CORTEX_A7:
                      pmu = armv7_a7_pmu_init();
                      break;
              }
      /* Intel CPUs [xscale]. */
-     } else if (0x69 == implementor) {
+     } else if (implementor == IMPLEMENTOR_INTEL) {
              part_number = (cpuid >> 13) & 0x7;
              switch (part_number) {
-             case 1:
+             case PART_NUMBER_XSCALE1:
                      pmu = xscale1pmu_init();
                      break;

arch/arm/kernel/perf_event_cpu.c static struct arm_pmu *__devinit probe_current_pmu(void) · line 245

Quoted 5 lines

arch/arm/kernel/perf_event_cpu.c +1 -1

-             case 2:
+             case PART_NUMBER_XSCALE2:
                      pmu = xscale2pmu_init();
                      break;
              }

If you stick this one in a separate patch, I can take it via the perf tree (along with the CPUID rework above).

Quoted 6 lines · Will Deacon

Quoted 5 lines · Christoffer Dall

Decoding the implementor and part number of the CPU id in the CPU ID register is needed by KVM, so we factor it out to share the code.

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

Quoted 14 lines

arch/arm/include/asm/cputype.h static inline unsigned int __attribute_const__ read_cpuid_id(void) · line 88

Quoted 9 lines

arch/arm/include/asm/cputype.h +9 -0

+static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
+{
+     return (read_cpuid_id() & 0xFF000000) >> 24;
+}
+
+static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
+{
+     return (read_cpuid_id() & 0xFFF0);
+}

Perhaps this should take the implementor as an argument, given that the part number is described differently between implementors. The xscale stuff can then move in here (we'll need to check the xscale docs in case perf is using a subfield -- I can't remember off-hand).

Quoted 3 lines

If you stick this one in a separate patch, I can take it via the perf tree (along with the CPUID rework above).

thanks,
I sent a separate patch.

Quoted 7 lines · Christoffer Dall

Quoted 6 lines · Will Deacon

Quoted 5 lines · Christoffer Dall

Decoding the implementor and part number of the CPU id in the CPU ID register is needed by KVM, so we factor it out to share the code.

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

[...]

Quoted 14 lines

Quoted 14 lines

arch/arm/include/asm/cputype.h static inline unsigned int __attribute_const__ read_cpuid_id(void) · line 88

Quoted 9 lines

arch/arm/include/asm/cputype.h +9 -0

+static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
+{
+     return (read_cpuid_id() & 0xFF000000) >> 24;
+}
+
+static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
+{
+     return (read_cpuid_id() & 0xFFF0);
+}

Perhaps this should take the implementor as an argument, given that the part number is described differently between implementors. The xscale stuff can then move in here (we'll need to check the xscale docs in case perf is using a subfield -- I can't remember off-hand).

[...]

Quoted 5 lines

Quoted 3 lines

If you stick this one in a separate patch, I can take it via the perf tree (along with the CPUID rework above).

thanks,
I sent a separate patch.

Looks like we still have the ugly xscale cpuid parsing inline. Could you move it as I suggested, please?

Targets KVM support for Cortex A-15 processors.

Contains all the framework components, make files, header files, some tracing functionality, and basic user space API.

Only supported core is Cortex-A15 for now.

Most functionality is in arch/arm/kvm/* or arch/arm/include/asm/kvm_*.h.

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Rusty Russell <[email protected]>

Signed-off-by Marc Zyngier <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

Documentation/virtual/kvm/api.txt +40 -0

 4.70 KVM_KVMCLOCK_CTRL
 
 Capability: KVM_CAP_KVMCLOCK_CTRL

@@ -2072,6 +2082,46 @@ KVM_S390_INT_EXTERNAL_CALL (vcpu) - sigp external call; source cpu in parm
 Note that the vcpu ioctl is asynchronous to vcpu execution.
 
 
+4.77 KVM_ARM_VCPU_INIT
+
+Capability: basic
+Architectures: arm
+Type: vcpu ioctl
+Parameters: struct struct kvm_vcpu_init (in)
+Returns: 0 on success; -1 on error
+Errors:
+  EINVAL:    the target is unknown, or the combination of features is invalid.
+  ENOENT:    a features bit specified is unknown.
+
+This tells KVM what type of CPU to present to the guest, and what
+optional features it should have.  This will cause a reset of the cpu
+registers to their initial values.  If this is not called, KVM_RUN will
+return ENOEXEC for that vcpu.
+
+Note that because some registers reflect machine topology, all vcpus
+should be created before this ioctl is invoked.
+
+
+4.78 KVM_GET_REG_LIST
+
+Capability: basic
+Architectures: arm
+Type: vcpu ioctl
+Parameters: struct kvm_reg_list (in/out)
+Returns: 0 on success; -1 on error
+Errors:
+  E2BIG:     the reg index list is too big to fit in the array specified by
+             the user (the number required will be written into n).
+
+struct kvm_reg_list {
+       __u64 n; /* number of registers in reg[] */
+       __u64 reg[0];
+};
+
+This ioctl returns the guest registers that are supported for the
+KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.
+
+
 5. The kvm_run structure
 ------------------------
 

arch/arm/Kconfig +2 -0

index ade7e92..43a997a 100644
@@ -2311,3 +2311,5 @@ source "security/Kconfig"
 source "crypto/Kconfig"
 
 source "lib/Kconfig"
+
+source "arch/arm/kvm/Kconfig"

arch/arm/Makefile +0 -0

index 5f914fc..433becd 100644

arch/arm/Makefile +0 -0

 core-y                         += $(machdirs) $(platdirs)
 
 drivers-$(CONFIG_OPROFILE)      += arch/arm/oprofile/

arch/arm/include/asm/kvm_host.h new file +15 -0

new file mode 100644
index 0000000..67826b2
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2012 - Virtual Open Systems and Columbia University
+ * Author: Christoffer Dall <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software

arch/arm/include/asm/kvm_host.h new file +49 -0

+#define KVM_MEMORY_SLOTS 32
+#define KVM_PRIVATE_MEM_SLOTS 4
+#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
+
+#define KVM_VCPU_MAX_FEATURES 0
+
+/* We don't currently support large pages. */
+#define KVM_HPAGE_GFN_SHIFT(x) 0
+#define KVM_NR_PAGE_SIZES      1
+#define KVM_PAGES_PER_HPAGE(x) (1UL<<31)
+
+struct kvm_vcpu;
+u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
+int kvm_target_cpu(void);
+int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
+void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
+
+struct kvm_arch {
+       /* VTTBR value associated with below pgd and vmid */
+       u64    vttbr;
+
+       /*
+        * Anything that is not used directly from assembly code goes
+        * here.
+        */
+
+       /* The VMID generation used for the virt. memory system */
+       u64    vmid_gen;
+       u32    vmid;
+
+       /* Stage-2 page table */
+       pgd_t *pgd;
+};
+
+#define KVM_NR_MEM_OBJS     40
+
+/*
+ * We don't want allocation failures within the mmu code, so we preallocate
+ * enough memory for a single page fault in a cache.
+ */
+struct kvm_mmu_memory_cache {
+       int nobjs;
+       void *objects[KVM_NR_MEM_OBJS];
+};
+
+struct kvm_vcpu_arch {
+       struct kvm_regs regs;
+
+       int target; /* Processor target */

arch/arm/include/uapi/asm/kvm.h new file +31 -0

new file mode 100644
index 0000000..00d61a6
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2012 - Virtual Open Systems and Columbia University
+ * Author: Christoffer Dall <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef __ARM_KVM_H__
+#define __ARM_KVM_H__
+
+#include <asm/types.h>
+#include <asm/ptrace.h>
+
+#define __KVM_HAVE_GUEST_DEBUG
+
+#define KVM_REG_SIZE(id)                                               \
+       (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
+
+struct kvm_regs {
+       struct pt_regs usr_regs;/* R0_usr - R14_usr, PC, CPSR */

arch/arm/kvm/Kconfig new file +28 -0

new file mode 100644
index 0000000..c7eb178
@@ -0,0 +1,55 @@
+#
+# KVM configuration
+#
+
+source "virt/kvm/Kconfig"
+
+menuconfig VIRTUALIZATION
+       bool "Virtualization"
+       ---help---
+         Say Y here to get to see options for using your Linux host to run
+         other operating systems inside virtual machines (guests).
+         This option alone does not add any kernel code.
+
+         If you say N, all options in this submenu will be skipped and
+         disabled.
+
+if VIRTUALIZATION
+
+config KVM
+       bool "Kernel-based Virtual Machine (KVM) support"
+       select PREEMPT_NOTIFIERS
+       select ANON_INODES
+       select KVM_MMIO
+       depends on ARM_VIRT_EXT && ARM_LPAE
+       ---help---
+         Support hosting virtualized guest machines. You will also
+         need to select one or more of the processor modules below.
+

arch/arm/kvm/Kconfig new file +7 -0

+       ---help---
+         Provides host support for ARM processors.
+
+config KVM_ARM_MAX_VCPUS
+       int "Number maximum supported virtual CPUs per VM"
+       depends on KVM_ARM_HOST
+       default 4

arch/arm/kvm/arm.c new file +0 -0

new file mode 100644
index 0000000..ead5a4e

arch/arm/kvm/arm.c new file +35 -0

+long kvm_arch_vcpu_ioctl(struct file *filp,
+                        unsigned int ioctl, unsigned long arg)
+{
+       struct kvm_vcpu *vcpu = filp->private_data;
+       void __user *argp = (void __user *)arg;
+
+       switch (ioctl) {
+       case KVM_ARM_VCPU_INIT: {
+               struct kvm_vcpu_init init;
+
+               if (copy_from_user(&init, argp, sizeof init))
+                       return -EFAULT;
+
+               return kvm_vcpu_set_target(vcpu, &init);
+
+       }
+       case KVM_SET_ONE_REG:
+       case KVM_GET_ONE_REG: {
+               struct kvm_one_reg reg;
+               if (copy_from_user(&reg, argp, sizeof(reg)))
+                       return -EFAULT;
+               if (ioctl == KVM_SET_ONE_REG)
+                       return kvm_arm_set_reg(vcpu, &reg);
+               else
+                       return kvm_arm_get_reg(vcpu, &reg);
+       }
+       case KVM_GET_REG_LIST: {
+               struct kvm_reg_list __user *user_list = argp;
+               struct kvm_reg_list reg_list;
+               unsigned n;
+
+               if (copy_from_user(&reg_list, user_list, sizeof reg_list))
+                       return -EFAULT;
+               n = reg_list.n;
+               reg_list.n = kvm_arm_num_regs(vcpu);

arch/arm/kvm/emulate.c new file +117 -0

new file mode 100644
index 0000000..32e1172
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2012 - Virtual Open Systems and Columbia University
+ * Author: Christoffer Dall <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include <asm/kvm_emulate.h>
+
+#define VCPU_NR_MODES 6
+#define REG_OFFSET(_reg) \
+       (offsetof(struct kvm_regs, _reg) / sizeof(u32))
+
+#define USR_REG_OFFSET(_num) REG_OFFSET(usr_regs.uregs[_num])
+
+static const unsigned long vcpu_reg_offsets[VCPU_NR_MODES][15] = {
+       /* USR/SYS Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12), USR_REG_OFFSET(13), USR_REG_OFFSET(14),
+       },
+
+       /* FIQ Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7),
+               REG_OFFSET(fiq_regs[0]), /* r8 */
+               REG_OFFSET(fiq_regs[1]), /* r9 */
+               REG_OFFSET(fiq_regs[2]), /* r10 */
+               REG_OFFSET(fiq_regs[3]), /* r11 */
+               REG_OFFSET(fiq_regs[4]), /* r12 */
+               REG_OFFSET(fiq_regs[5]), /* r13 */
+               REG_OFFSET(fiq_regs[6]), /* r14 */
+       },
+
+       /* IRQ Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(irq_regs[0]), /* r13 */
+               REG_OFFSET(irq_regs[1]), /* r14 */
+       },
+
+       /* SVC Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(svc_regs[0]), /* r13 */
+               REG_OFFSET(svc_regs[1]), /* r14 */
+       },
+
+       /* ABT Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(abt_regs[0]), /* r13 */
+               REG_OFFSET(abt_regs[1]), /* r14 */
+       },
+
+       /* UND Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(und_regs[0]), /* r13 */
+               REG_OFFSET(und_regs[1]), /* r14 */
+       },
+};
+
+/*
+ * Return a pointer to the register number valid in the current mode of
+ * the virtual CPU.
+ */
+u32 *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num)
+{
+       u32 *reg_array = (u32 *)&vcpu->arch.regs;
+       u32 mode = *vcpu_cpsr(vcpu) & MODE_MASK;
+
+       switch (mode) {
+       case USR_MODE...SVC_MODE:
+               mode &= ~MODE32_BIT; /* 0 ... 3 */
+               break;
+
+       case ABT_MODE:
+               mode = 4;
+               break;
+
+       case UND_MODE:
+               mode = 5;
+               break;
+

arch/arm/kvm/emulate.c new file +12 -0

+
+/*
+ * Return the SPSR for the current mode of the virtual CPU.
+ */
+u32 *vcpu_spsr(struct kvm_vcpu *vcpu)
+{
+       u32 mode = *vcpu_cpsr(vcpu) & MODE_MASK;
+       switch (mode) {
+       case SVC_MODE:
+               return &vcpu->arch.regs.svc_regs[2];
+       case ABT_MODE:
+               return &vcpu->arch.regs.abt_regs[2];

Quoted 13 lines · Christoffer Dall

Targets KVM support for Cortex A-15 processors.

Contains all the framework components, make files, header files, some tracing functionality, and basic user space API.

Only supported core is Cortex-A15 for now.

Most functionality is in arch/arm/kvm/* or arch/arm/include/asm/kvm_*.h.

Reviewed-by Marcelo Tosatti <[email protected]>

Signed-off-by Rusty Russell <[email protected]>

Signed-off-by Marc Zyngier <[email protected]>

Signed-off-by Christoffer Dall <[email protected]>

[...]

Review The list of registers accessible using this interface is identical to the · line 1803

Quoted 8 lines

4.69 KVM_GET_ONE_REG

Capability: KVM_CAP_ONE_REG

(quoted diff) +1 -0

@@ -1791,6 +1800,7 @@ The list of registers accessible using this interface is identical to the
 list in 4.68.
 
 
+

Whitespace.

Quoted 65 lines

(quoted diff) +40 -0

 4.70 KVM_KVMCLOCK_CTRL
 
 Capability: KVM_CAP_KVMCLOCK_CTRL

@@ -2072,6 +2082,46 @@ KVM_S390_INT_EXTERNAL_CALL (vcpu) - sigp external call; source cpu in parm
 Note that the vcpu ioctl is asynchronous to vcpu execution.
 
 
+4.77 KVM_ARM_VCPU_INIT
+
+Capability: basic
+Architectures: arm
+Type: vcpu ioctl
+Parameters: struct struct kvm_vcpu_init (in)
+Returns: 0 on success; -1 on error
+Errors:
+  EINVAL:    the target is unknown, or the combination of features is invalid.
+  ENOENT:    a features bit specified is unknown.
+
+This tells KVM what type of CPU to present to the guest, and what
+optional features it should have.  This will cause a reset of the cpu
+registers to their initial values.  If this is not called, KVM_RUN will
+return ENOEXEC for that vcpu.
+
+Note that because some registers reflect machine topology, all vcpus
+should be created before this ioctl is invoked.
+
+
+4.78 KVM_GET_REG_LIST
+
+Capability: basic
+Architectures: arm
+Type: vcpu ioctl
+Parameters: struct kvm_reg_list (in/out)
+Returns: 0 on success; -1 on error
+Errors:
+  E2BIG:     the reg index list is too big to fit in the array specified by
+             the user (the number required will be written into n).
+
+struct kvm_reg_list {
+       __u64 n; /* number of registers in reg[] */
+       __u64 reg[0];
+};
+
+This ioctl returns the guest registers that are supported for the
+KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.
+
+
 5. The kvm_run structure
 ------------------------
 

arch/arm/Kconfig +2 -0

index ade7e92..43a997a 100644
@@ -2311,3 +2311,5 @@ source "security/Kconfig"
 source "crypto/Kconfig"
 
 source "lib/Kconfig"
+
+source "arch/arm/kvm/Kconfig"

arch/arm/Makefile +0 -0

index 5f914fc..433becd 100644

arch/arm/Makefile core-$(CONFIG_XEN) += arch/arm/xen/ · line 260

Quoted 4 lines

arch/arm/Makefile +1 -0

@@ -257,6 +257,7 @@ core-$(CONFIG_XEN)          += arch/arm/xen/
 core-y                         += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
 core-y                         += arch/arm/net/
 core-y                         += arch/arm/crypto/
+core-y                                 += arch/arm/kvm/

Predicate this on CONFIG_KVM_ARM_HOST, then add some obj-y to the kvm/Makefile.

Quoted 31 lines

arch/arm/Makefile +0 -0

 core-y                         += $(machdirs) $(platdirs)
 
 drivers-$(CONFIG_OPROFILE)      += arch/arm/oprofile/

arch/arm/include/asm/kvm_host.h new file +22 -0

new file mode 100644
index 0000000..67826b2
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2012 - Virtual Open Systems and Columbia University
+ * Author: Christoffer Dall <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef __ARM_KVM_HOST_H__
+#define __ARM_KVM_HOST_H__
+
+#include <asm/kvm.h>

arch/arm/include/asm/kvm_host.h line 25

Quoted 3 lines

arch/arm/include/asm/kvm_host.h new file +3 -0

+#include <asm/kvm_asm.h>
+
+#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS

One thing I noticed when hacking kvmtool is that we don't support the KVM_CAP_{MAX,NR}_VCPUS capabilities. Why is this? Since we have a maximum of 8 due to limitations of the GIC, it might be nice to put that somewhere visible to userspace.

Quoted 49 lines

arch/arm/include/asm/kvm_host.h new file +49 -0

+#define KVM_MEMORY_SLOTS 32
+#define KVM_PRIVATE_MEM_SLOTS 4
+#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
+
+#define KVM_VCPU_MAX_FEATURES 0
+
+/* We don't currently support large pages. */
+#define KVM_HPAGE_GFN_SHIFT(x) 0
+#define KVM_NR_PAGE_SIZES      1
+#define KVM_PAGES_PER_HPAGE(x) (1UL<<31)
+
+struct kvm_vcpu;
+u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
+int kvm_target_cpu(void);
+int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
+void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
+
+struct kvm_arch {
+       /* VTTBR value associated with below pgd and vmid */
+       u64    vttbr;
+
+       /*
+        * Anything that is not used directly from assembly code goes
+        * here.
+        */
+
+       /* The VMID generation used for the virt. memory system */
+       u64    vmid_gen;
+       u32    vmid;
+
+       /* Stage-2 page table */
+       pgd_t *pgd;
+};
+
+#define KVM_NR_MEM_OBJS     40
+
+/*
+ * We don't want allocation failures within the mmu code, so we preallocate
+ * enough memory for a single page fault in a cache.
+ */
+struct kvm_mmu_memory_cache {
+       int nobjs;
+       void *objects[KVM_NR_MEM_OBJS];
+};
+
+struct kvm_vcpu_arch {
+       struct kvm_regs regs;
+
+       int target; /* Processor target */

arch/arm/include/asm/kvm_host.h line 84

Quoted 10 lines

arch/arm/include/asm/kvm_host.h new file +10 -0

+       DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
+
+       /* System control coprocessor (cp15) */
+       u32 cp15[NR_CP15_REGS];
+
+       /* The CPU type we expose to the VM */
+       u32 midr;
+
+       /* Exception Information */
+       u32 hsr;                /* Hyp Syndrom Register */

pedantic: syndrome

Quoted 37 lines

arch/arm/include/uapi/asm/kvm.h new file +31 -0

new file mode 100644
index 0000000..00d61a6
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2012 - Virtual Open Systems and Columbia University
+ * Author: Christoffer Dall <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef __ARM_KVM_H__
+#define __ARM_KVM_H__
+
+#include <asm/types.h>
+#include <asm/ptrace.h>
+
+#define __KVM_HAVE_GUEST_DEBUG
+
+#define KVM_REG_SIZE(id)                                               \
+       (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
+
+struct kvm_regs {
+       struct pt_regs usr_regs;/* R0_usr - R14_usr, PC, CPSR */

arch/arm/include/uapi/asm/kvm.h line 41

Quoted 10 lines

arch/arm/include/uapi/asm/kvm.h new file +10 -0

+       __u32 svc_regs[3];      /* SP_svc, LR_svc, SPSR_svc */
+       __u32 abt_regs[3];      /* SP_abt, LR_abt, SPSR_abt */
+       __u32 und_regs[3];      /* SP_und, LR_und, SPSR_und */
+       __u32 irq_regs[3];      /* SP_irq, LR_irq, SPSR_irq */
+       __u32 fiq_regs[8];      /* R8_fiq - R14_fiq, SPSR_fiq */
+};
+
+/* Supported Processor Types */
+#define KVM_ARM_TARGET_CORTEX_A15      0
+#define KVM_ARM_NUM_TARGETS            1

In future, it would be nice to have a way of probing the supported targets, rather than trying a bunch of them and seeing which ioctl finally succeeds.

Quoted 39 lines

arch/arm/kvm/Kconfig new file +33 -0

new file mode 100644
index 0000000..c7eb178
@@ -0,0 +1,55 @@
+#
+# KVM configuration
+#
+
+source "virt/kvm/Kconfig"
+
+menuconfig VIRTUALIZATION
+       bool "Virtualization"
+       ---help---
+         Say Y here to get to see options for using your Linux host to run
+         other operating systems inside virtual machines (guests).
+         This option alone does not add any kernel code.
+
+         If you say N, all options in this submenu will be skipped and
+         disabled.
+
+if VIRTUALIZATION
+
+config KVM
+       bool "Kernel-based Virtual Machine (KVM) support"
+       select PREEMPT_NOTIFIERS
+       select ANON_INODES
+       select KVM_MMIO
+       depends on ARM_VIRT_EXT && ARM_LPAE
+       ---help---
+         Support hosting virtualized guest machines. You will also
+         need to select one or more of the processor modules below.
+
+         This module provides access to the hardware capabilities through
+         a character device node named /dev/kvm.
+
+         If unsure, say N.
+

arch/arm/kvm/Kconfig line 38

Quoted 5 lines

arch/arm/kvm/Kconfig new file +5 -0

+config KVM_ARM_HOST
+       bool "KVM host support for ARM cpus."
+       depends on KVM
+       depends on MMU
+       depends on CPU_V7 && ARM_VIRT_EXT

ARM_VIRT_EXT already implies CPU_V7 but, as I suggested earlier, it should probably imply ARM_LPAE which would make much of this simpler.

Quoted 11 lines

arch/arm/kvm/Kconfig new file +11 -0

+       ---help---
+         Provides host support for ARM processors.
+
+config KVM_ARM_MAX_VCPUS
+       int "Number maximum supported virtual CPUs per VM"
+       depends on KVM_ARM_HOST
+       default 4
+       help
+         Static number of max supported virtual CPUs per VM.
+
+         If you choose a high number, the vcpu structures will be quite

arch/arm/kvm/Kconfig line 55

Quoted 6 lines

arch/arm/kvm/Kconfig new file +6 -0

+         large, so only choose a reasonable number that you expect to
+         actually use.
+
+source drivers/virtio/Kconfig
+
+endif # VIRTUALIZATION

I guess the XEN config options should also be moved under here?

Quoted 5 lines

arch/arm/kvm/arm.c new file +0 -0

new file mode 100644
index 0000000..ead5a4e

[...]

Quoted 35 lines

arch/arm/kvm/arm.c new file +35 -0

+long kvm_arch_vcpu_ioctl(struct file *filp,
+                        unsigned int ioctl, unsigned long arg)
+{
+       struct kvm_vcpu *vcpu = filp->private_data;
+       void __user *argp = (void __user *)arg;
+
+       switch (ioctl) {
+       case KVM_ARM_VCPU_INIT: {
+               struct kvm_vcpu_init init;
+
+               if (copy_from_user(&init, argp, sizeof init))
+                       return -EFAULT;
+
+               return kvm_vcpu_set_target(vcpu, &init);
+
+       }
+       case KVM_SET_ONE_REG:
+       case KVM_GET_ONE_REG: {
+               struct kvm_one_reg reg;
+               if (copy_from_user(&reg, argp, sizeof(reg)))
+                       return -EFAULT;
+               if (ioctl == KVM_SET_ONE_REG)
+                       return kvm_arm_set_reg(vcpu, &reg);
+               else
+                       return kvm_arm_get_reg(vcpu, &reg);
+       }
+       case KVM_GET_REG_LIST: {
+               struct kvm_reg_list __user *user_list = argp;
+               struct kvm_reg_list reg_list;
+               unsigned n;
+
+               if (copy_from_user(&reg_list, user_list, sizeof reg_list))
+                       return -EFAULT;
+               n = reg_list.n;
+               reg_list.n = kvm_arm_num_regs(vcpu);

arch/arm/kvm/arm.c

Quoted 10 lines

arch/arm/kvm/arm.c new file +10 -0

+               if (copy_to_user(user_list, &reg_list, sizeof reg_list))
+                       return -EFAULT;
+               if (n < reg_list.n)
+                       return -E2BIG;
+               return kvm_arm_copy_reg_indices(vcpu, user_list->reg);
+       }
+       default:
+               return -EINVAL;
+       }
+}

Your use of brackets with sizeof is inconsistent -- just always make it look like a function call.

Quoted 123 lines

arch/arm/kvm/emulate.c new file +117 -0

new file mode 100644
index 0000000..32e1172
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2012 - Virtual Open Systems and Columbia University
+ * Author: Christoffer Dall <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include <asm/kvm_emulate.h>
+
+#define VCPU_NR_MODES 6
+#define REG_OFFSET(_reg) \
+       (offsetof(struct kvm_regs, _reg) / sizeof(u32))
+
+#define USR_REG_OFFSET(_num) REG_OFFSET(usr_regs.uregs[_num])
+
+static const unsigned long vcpu_reg_offsets[VCPU_NR_MODES][15] = {
+       /* USR/SYS Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12), USR_REG_OFFSET(13), USR_REG_OFFSET(14),
+       },
+
+       /* FIQ Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7),
+               REG_OFFSET(fiq_regs[0]), /* r8 */
+               REG_OFFSET(fiq_regs[1]), /* r9 */
+               REG_OFFSET(fiq_regs[2]), /* r10 */
+               REG_OFFSET(fiq_regs[3]), /* r11 */
+               REG_OFFSET(fiq_regs[4]), /* r12 */
+               REG_OFFSET(fiq_regs[5]), /* r13 */
+               REG_OFFSET(fiq_regs[6]), /* r14 */
+       },
+
+       /* IRQ Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(irq_regs[0]), /* r13 */
+               REG_OFFSET(irq_regs[1]), /* r14 */
+       },
+
+       /* SVC Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(svc_regs[0]), /* r13 */
+               REG_OFFSET(svc_regs[1]), /* r14 */
+       },
+
+       /* ABT Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(abt_regs[0]), /* r13 */
+               REG_OFFSET(abt_regs[1]), /* r14 */
+       },
+
+       /* UND Registers */
+       {
+               USR_REG_OFFSET(0), USR_REG_OFFSET(1), USR_REG_OFFSET(2),
+               USR_REG_OFFSET(3), USR_REG_OFFSET(4), USR_REG_OFFSET(5),
+               USR_REG_OFFSET(6), USR_REG_OFFSET(7), USR_REG_OFFSET(8),
+               USR_REG_OFFSET(9), USR_REG_OFFSET(10), USR_REG_OFFSET(11),
+               USR_REG_OFFSET(12),
+               REG_OFFSET(und_regs[0]), /* r13 */
+               REG_OFFSET(und_regs[1]), /* r14 */
+       },
+};
+
+/*
+ * Return a pointer to the register number valid in the current mode of
+ * the virtual CPU.
+ */
+u32 *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num)
+{
+       u32 *reg_array = (u32 *)&vcpu->arch.regs;
+       u32 mode = *vcpu_cpsr(vcpu) & MODE_MASK;
+
+       switch (mode) {
+       case USR_MODE...SVC_MODE:
+               mode &= ~MODE32_BIT; /* 0 ... 3 */
+               break;
+
+       case ABT_MODE:
+               mode = 4;
+               break;
+
+       case UND_MODE:
+               mode = 5;
+               break;
+

arch/arm/kvm/emulate.c line 127

Quoted 10 lines

arch/arm/kvm/emulate.c new file +10 -0

+       case SYSTEM_MODE:
+               mode = 0;
+               break;
+
+       default:
+               BUG();
+       }
+
+       return reg_array + vcpu_reg_offsets[mode][reg_num];
+}

]
Have some file-local #defines for those magic mode numbers.

Quoted 18 lines

arch/arm/kvm/emulate.c new file +18 -0

+
+/*
+ * Return the SPSR for the current mode of the virtual CPU.
+ */
+u32 *vcpu_spsr(struct kvm_vcpu *vcpu)
+{
+       u32 mode = *vcpu_cpsr(vcpu) & MODE_MASK;
+       switch (mode) {
+       case SVC_MODE:
+               return &vcpu->arch.regs.svc_regs[2];
+       case ABT_MODE:
+               return &vcpu->arch.regs.abt_regs[2];
+       case UND_MODE:
+               return &vcpu->arch.regs.und_regs[2];
+       case IRQ_MODE:
+               return &vcpu->arch.regs.irq_regs[2];
+       case FIQ_MODE:
+               return &vcpu->arch.regs.fiq_regs[7];

arch/arm/kvm/emulate.c line 149

Quoted 4 lines

arch/arm/kvm/emulate.c new file +4 -0

+       default:
+               BUG();
+       }
+}

Same here: have some #defines for the reg indices. They would also be useful to userspace when manipulating the vcpu state (currently there is just a comment in the header).

From cee1c41ab2022eab5df46ae43a95e32ad01020e7 Mon Sep 17 00:00:00 2001