target-mips: Clean up microMIPS32 major opcode

PATCH Superseded 陳韋任 (Wei-Ren Chen) 3 participants 8 messages Nov 15, 2012

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陳韋任 (Wei-Ren Chen)

author

2012-11-15 02:15 UTC #0 lore raw

PATCH 1/1 target-mips: Clean up microMIPS32 major opcode

Hi all,

I check MIPS microMIPS manual [1], and found the major opcode might be
wrong. I add a comment to explicitly indicate what manual I am refering to, and according that manual I remove some microMIPS32 major opcodes. Major opcode 0x1f is reserved, so I just remove it. As for others, like 0x16, 0x17, 0x36 and 0x37, they are for higher-order MIPS ISA level or new revision of this microMIPS architecture. Since they are not appear in the manual I refer to, I just remove them as well.

Please review, thanks.

[1] http://www.mips.com/products/architectures/micromips/#specifications

MIPS Architecture for Programmers Volume II-B:
The microMIPS32 Instruction Set (Revision 3.05)

MD00582-2B-microMIPS-AFP-03.05.pdf

Signed-off-by Chen Wei-Ren <[email protected]>

---
 target-mips/translate.c |   16 ++++++++++------
 1 files changed, 10 insertions(+), 6 deletions(-)

target-mips/translate.c +10 -6

index f6fc0c2..b57da24 100644
@@ -10241,7 +10241,15 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
 
 /* microMIPS extension to MIPS32 */
 
-/* microMIPS32 major opcodes */
+/*
+ * microMIPS32 major opcodes
+ *
+ * MIPS Architecture for Programmers Volume II-B:
+ *   The microMIPS32 Instruction Set (Revision 3.05)
+ *
+ * Table 6.2 microMIPS32 Encoding of Major Opcode Field
+ *
+ */
 
 enum {
     POOL32A = 0x00,

@@ -10268,9 +10276,8 @@ enum {
     POOL16D = 0x13,
     ORI32 = 0x14,
     POOL32F = 0x15,
-    POOL32S = 0x16,
-    DADDIU32 = 0x17,
 
+    /* 0x1f is reserved */
     POOL32C = 0x18,
     LWGP16 = 0x19,
     LW16 = 0x1a,

@@ -10278,7 +10285,6 @@ enum {
     XORI32 = 0x1c,
     JALS32 = 0x1d,
     ADDIUPC = 0x1e,
-    POOL48A = 0x1f,
 
     /* 0x20 is reserved */
     RES_20 = 0x20,

@@ -10307,8 +10313,6 @@ enum {
     B16 = 0x33,
     ANDI32 = 0x34,
     J32 = 0x35,
-    SD32 = 0x36,
-    LD32 = 0x37,
 
     /* 0x38 and 0x39 are reserved */
     RES_38 = 0x38,

Signature · 1 line

1.7.3.4

Johnson, Eric

2012-11-15 02:35 UTC #1 lore raw

Hi Chen,

Please only remove the POOL48A opcode.

The others are documented in the microMIPS64 Instruction Set manual ( http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00087-2B-MIPS64BIS-AFP-03.51.pdf ). See http://www.mips.com/products/architectures/mips64/ for other relavent docs.

Instead of removing them please surround the POOL32S, DADDIU32, SD32, and LD32 opcodes with #if defined(TARGET_MIPS64)

-Eric

Quoted 85 lines

-----Original Message-----
From: [email protected] [mailto:qemu-devel- [email protected]] On Behalf Of ??? (Wei-Ren Chen)
Sent: Wednesday, November 14, 2012 6:15 PM
To: [email protected]; [email protected]
Cc: [email protected]; Jia Liu; Aurelien Jarno
Subject: [Qemu-devel] [PATCH] target-mips: Clean up microMIPS32 major opcode
Hi all,
I check MIPS microMIPS manual [1], and found the major opcode might be
wrong. I add a comment to explicitly indicate what manual I am refering to, and according that manual I remove some microMIPS32 major opcodes. Major opcode 0x1f is reserved, so I just remove it. As for others, like 0x16, 0x17, 0x36 and 0x37, they are for higher-order MIPS ISA level or new revision of this microMIPS architecture. Since they are not appear in the manual I refer to, I just remove them as well.
Please review, thanks.
[1] http://www.mips.com/products/architectures/micromips/#specifications
MIPS Architecture for Programmers Volume II-B:
The microMIPS32 Instruction Set (Revision 3.05)
MD00582-2B-microMIPS-AFP-03.05.pdf
Signed-off-by Chen Wei-Ren <[email protected]>
---
 target-mips/translate.c |   16 ++++++++++------
 1 files changed, 10 insertions(+), 6 deletions(-)
target-mips/translate.c +9 -1
index f6fc0c2..b57da24 100644
@@ -10241,7 +10241,15 @@ static int decode_mips16_opc (CPUMIPSState *env,
 DisasContext *ctx,
 
 /* microMIPS extension to MIPS32 */
 
-/* microMIPS32 major opcodes */
+/*
+ * microMIPS32 major opcodes
+ *
+ * MIPS Architecture for Programmers Volume II-B:
+ *   The microMIPS32 Instruction Set (Revision 3.05)
+ *
+ * Table 6.2 microMIPS32 Encoding of Major Opcode Field
+ *
+ */
 
 enum {
     POOL32A = 0x00,
target-mips/translate.c +1 -6
@@ -10268,9 +10276,8 @@ enum {
     POOL16D = 0x13,
     ORI32 = 0x14,
     POOL32F = 0x15,
-    POOL32S = 0x16,
-    DADDIU32 = 0x17,
 
+    /* 0x1f is reserved */
     POOL32C = 0x18,
     LWGP16 = 0x19,
     LW16 = 0x1a,
@@ -10278,7 +10285,6 @@ enum {
     XORI32 = 0x1c,
     JALS32 = 0x1d,
     ADDIUPC = 0x1e,
-    POOL48A = 0x1f,
 
     /* 0x20 is reserved */
     RES_20 = 0x20,
@@ -10307,8 +10313,6 @@ enum {
     B16 = 0x33,
     ANDI32 = 0x34,
     J32 = 0x35,
-    SD32 = 0x36,
-    LD32 = 0x37,
 
     /* 0x38 and 0x39 are reserved */
     RES_38 = 0x38,
--
1.7.3.4

陳韋任 (Wei-Ren Chen)

author

2012-11-15 03:27 UTC #2 lore raw

Quoted 8 lines · Eric

Hi Chen,
Please only remove the POOL48A opcode.
The others are documented in the microMIPS64 Instruction Set manual ( http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00087-2B-MIPS64BIS-AFP-03.51.pdf ). See http://www.mips.com/products/architectures/mips64/ for other relavent docs.
Instead of removing them please surround the POOL32S, DADDIU32, SD32, and LD32 opcodes with #if defined(TARGET_MIPS64)

Just want to make sure I am reading the right manual, are you refering
to [1] or [2]? The link you gave me is about MIPS64 not microMIPS64, I am not sure which one I should look into. I can find DADDIU, SD, and LD in [1] and [2], all *without* 32 suffix. Should I change their name? I cannot find POOL32S in both document, would you like to point it out? Thanks.

Regards,
chenwj

[1] MIPS Architecture For Programmers
Volume I-B: Introduction to the microMIPS64 Architecture

MD00743-2B-microMIPS64INT-AFP-03.02.pdf

[2] MIPS Architecture For Programmers
Volume II-A: The MIPS64 Instruction Set

MD00087-2B-MIPS64BIS-AFP-03.51.pdf

Signature · 5 lines

Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

Johnson, Eric

2012-11-15 04:02 UTC #3 lore raw

Hi Chen,

Sorry I must have made a copy paste error. I access the documents internally. I'll double check the link tomorrow.

The document I referenced is the MIPS64 not the microMIPS64.

Do not change the names. The LD32 and SD32 are microMIPS specific. The assembler LD and SD opcodes work for either MIPS64 or microMIPS64.

Eric

Quoted 36 lines · 陳韋任 (Wei-Ren Chen)

Quoted 8 lines · Eric
Hi Chen,
Please only remove the POOL48A opcode.
The others are documented in the microMIPS64 Instruction Set manual ( http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00087-2B-MIPS64BIS-AFP-03.51.pdf ). See http://www.mips.com/products/architectures/mips64/ for other relavent docs.
Instead of removing them please surround the POOL32S, DADDIU32, SD32, and LD32 opcodes with #if defined(TARGET_MIPS64)
Just want to make sure I am reading the right manual, are you refering
to [1] or [2]? The link you gave me is about MIPS64 not microMIPS64, I am not sure which one I should look into. I can find DADDIU, SD, and LD in [1] and [2], all *without* 32 suffix. Should I change their name? I cannot find POOL32S in both document, would you like to point it out? Thanks.
Regards,
chenwj
[1] MIPS Architecture For Programmers
Volume I-B: Introduction to the microMIPS64 Architecture
   MD00743-2B-microMIPS64INT-AFP-03.02.pdf
[2] MIPS Architecture For Programmers
Volume II-A: The MIPS64 Instruction Set
   MD00087-2B-MIPS64BIS-AFP-03.51.pdf
Signature · 5 lines
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

陳韋任 (Wei-Ren Chen)

author

2012-11-15 05:51 UTC #4 lore raw

Quoted 7 lines · Eric

Hi Chen,
Sorry I must have made a copy paste error. I access the documents internally. I'll double check the link tomorrow.
The document I referenced is the MIPS64 not the microMIPS64.
Do not change the names. The LD32 and SD32 are microMIPS specific. The assembler LD and SD opcodes work for either MIPS64 or microMIPS64.

O.K., thanks for the help. :)

How about DADDIU32, should I keep the 32 suffix, too?
I still can't find where POOL32S is.

Regards,
chenwj

Signature · 5 lines

Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

Johnson, Eric

2012-11-15 17:30 UTC #5 lore raw

Quoted 20 lines

-----Original Message-----
From: 陳韋任 (Wei-Ren Chen) [mailto:[email protected]]
Sent: Wednesday, November 14, 2012 9:51 PM
To: Johnson, Eric
Cc: [email protected]; [email protected]; Jia Liu; Aurelien Jarno
Subject: Re: [Qemu-devel] [PATCH] target-mips: Clean up microMIPS32 major opcode
Quoted 3 lines · Eric
Hi Chen,
Sorry I must have made a copy paste error. I access the documents
internally. I'll double check the link tomorrow.
Quoted 4 lines
The document I referenced is the MIPS64 not the microMIPS64.
Do not change the names. The LD32 and SD32 are microMIPS specific. The
assembler LD and SD opcodes work for either MIPS64 or microMIPS64.

Quoted 7 lines

O.K., thanks for the help. :)
How about DADDIU32, should I keep the 32 suffix, too?
I still can't find where POOL32S is.
Regards,
chenwj

The only opcode on the list that is incorrect is the POOL48A opcode. It should be removed. If the others are removed or renamed, I or someone else would just have to fix them at some point in the future.

It seems the microMIPS64 Instruction Set manual is not one the external website. I'll ask about that.

-Eric

Aurelien Jarno

2012-11-15 14:04 UTC #6 lore raw

In reply to Johnson, Eric

Quoted 9 lines · Eric

Hi Chen,
Please only remove the POOL48A opcode.
The others are documented in the microMIPS64 Instruction Set manual ( http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00087-2B-MIPS64BIS-AFP-03.51.pdf ). See http://www.mips.com/products/architectures/mips64/ for other relavent docs.
Instead of removing them please surround the POOL32S, DADDIU32, SD32, and LD32 opcodes with #if defined(TARGET_MIPS64)

I don't think a #if is necessary there, this makes the code more difficult to read, while it doesn't change anything on the generated code.

Signature · 2 lines

Aurelien Jarno                          GPG: 1024D/F1BCDB73
[email protected]                 http://www.aurel32.net

Johnson, Eric

2012-11-15 17:24 UTC #7 lore raw

Quoted 20 lines

-----Original Message-----
From: Aurelien Jarno [mailto:[email protected]]
Sent: Thursday, November 15, 2012 6:04 AM
To: Johnson, Eric
Cc: 陳韋任 (Wei-Ren Chen); [email protected]; [email protected]; [email protected]; Jia Liu
Subject: Re: [Qemu-devel] [PATCH] target-mips: Clean up microMIPS32 major opcode
Quoted 5 lines · Eric
Hi Chen,
Please only remove the POOL48A opcode.
The others are documented in the microMIPS64 Instruction Set manual (
http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00087-
2B-MIPS64BIS-AFP-03.51.pdf ). See
http://www.mips.com/products/architectures/mips64/ for other relavent docs.
Quoted 1 line

Quoted 8 lines

Quoted 1 line
Instead of removing them please surround the POOL32S, DADDIU32, SD32,
and LD32 opcodes with
Quoted 2 lines
#if defined(TARGET_MIPS64)
I don't think a #if is necessary there, this makes the code more difficult to read, while it doesn't change anything on the generated code.

Agreed.

-Eric