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Add basic support for Allwinner A1X SoCs

PATCH Superseded Maxime Ripard 4 participants 13 messages Nov 16, 2012 – Nov 17, 2012

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#0 lore raw

v2 cover Add basic support for Allwinner A1X SoCs

Hi,

You'll find in this patchset the initial support for Allwinner A10 and A13 SoCs from Allwinner. Since the internal name of these SoCs are sun4i and sun5i, the mach- directory is named sunxi.

You can find these SoCs in the Cubieboard, the A13-olinuxino or the Melee A1000.

Both SoCs should work fine, as the A13 is a trimmed down version of the A10, but it has only been tested on a A13-OlinuXino from Olimex.

Support is quite minimal for now, since it only includes timer and IRQ controller drivers, so we can only boot to userspace through initramfs. Support for the other peripherals on these SoCs will come eventually.

Thanks,
Maxime

Changes from v1:
- Changed the earlyprintk support to add a more generic mechanism, since boards can have both the debug UART on UART0 or UART1
- Small fixes in the dt: moved the memory node to the dtsi, fixed the memory size on A13
- Simplified the irq controller driver as suggested by Stefan Roese
- Removed the hardcoded clock frequency in the timer to a fixed rate clock using clk framework
- Added a README file to the documentation to mention the supported SoCs and the related datasheet

Maxime Ripard (7):
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
clocksource: sunxi: Add Allwinner A1X Timer Driver
irqchip: sunxi: Add irq controller driver
ARM: sunxi: Add basic support for Allwinner A1x SoCs
ARM: sunxi: Add earlyprintk support
ARM: sunxi: Add device tree for the A13 and the Olinuxino board
ARM: sunxi: Add entry to MAINTAINERS

 Documentation/arm/sunxi/README                     |   19 +++
 .../interrupt-controller/allwinner,sunxi-ic.txt    |  104 ++++++++++++
 .../bindings/timer/allwinner,sunxi-timer.txt       |   17 ++
 MAINTAINERS                                        |    6 +
 arch/arm/Kconfig                                   |    2 +
 arch/arm/Kconfig.debug                             |    8 +
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/Makefile                         |    1 +
 arch/arm/boot/dts/sun5i-olinuxino.dts              |   26 +++
 arch/arm/boot/dts/sun5i.dtsi                       |   74 +++++++++
 arch/arm/include/debug/sunxi.S                     |   24 +++
 arch/arm/mach-sunxi/Kconfig                        |    9 ++
 arch/arm/mach-sunxi/Makefile                       |    1 +
 arch/arm/mach-sunxi/Makefile.boot                  |    1 +
 arch/arm/mach-sunxi/sunxi.c                        |   60 +++++++
 arch/arm/mach-sunxi/sunxi.h                        |   20 +++
 drivers/clk/Makefile                               |    1 +
 drivers/clk/clk-sunxi.c                            |   30 ++++
 drivers/clocksource/Kconfig                        |    3 +
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/sunxi_timer.c                  |  170 ++++++++++++++++++++
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-sunxi.c                        |  150 +++++++++++++++++
 include/linux/clk/sunxi.h                          |   22 +++
 include/linux/irqchip/sunxi.h                      |   27 ++++
 include/linux/sunxi_timer.h                        |   24 +++
 26 files changed, 802 insertions(+)
 create mode 100644 Documentation/arm/sunxi/README
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt
 create mode 100644 Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
 create mode 100644 arch/arm/boot/dts/sun5i-olinuxino.dts
 create mode 100644 arch/arm/boot/dts/sun5i.dtsi
 create mode 100644 arch/arm/include/debug/sunxi.S
 create mode 100644 arch/arm/mach-sunxi/Kconfig
 create mode 100644 arch/arm/mach-sunxi/Makefile
 create mode 100644 arch/arm/mach-sunxi/Makefile.boot
 create mode 100644 arch/arm/mach-sunxi/sunxi.c
 create mode 100644 arch/arm/mach-sunxi/sunxi.h
 create mode 100644 drivers/clk/clk-sunxi.c
 create mode 100644 drivers/clocksource/sunxi_timer.c
 create mode 100644 drivers/irqchip/irq-sunxi.c
 create mode 100644 include/linux/clk/sunxi.h
 create mode 100644 include/linux/irqchip/sunxi.h
 create mode 100644 include/linux/sunxi_timer.h
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v2 1/7 clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs

---
 drivers/clk/Makefile      |    1 +
 drivers/clk/clk-sunxi.c   |   30 ++++++++++++++++++++++++++++++
 include/linux/clk/sunxi.h |   22 ++++++++++++++++++++++
 3 files changed, 53 insertions(+)
 create mode 100644 drivers/clk/clk-sunxi.c
 create mode 100644 include/linux/clk/sunxi.h
drivers/clk/Makefile +1 -0
index 71a25b9..9c300a8 100644
@@ -19,6 +19,7 @@ endif
 obj-$(CONFIG_MACH_LOONGSON1)	+= clk-ls1x.o
 obj-$(CONFIG_ARCH_U8500)	+= ux500/
 obj-$(CONFIG_ARCH_VT8500)	+= clk-vt8500.o
+obj-$(CONFIG_ARCH_SUNXI)	+= clk-sunxi.o
 
 # Chip specific
 obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
drivers/clk/clk-sunxi.c new file +30 -0
new file mode 100644
index 0000000..0e831b5
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/sunxi.h>
+#include <linux/of.h>
+
+static const __initconst struct of_device_id clk_match[] = {
+	{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+	{}
+};
+
+void __init sunxi_init_clocks(void)
+{
+	of_clk_init(clk_match);
+}
include/linux/clk/sunxi.h new file +22 -0
new file mode 100644
index 0000000..e074fdd
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
+
+void __init sunxi_init_clocks(void);
+
+#endif
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 1/7 clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs

Quoting Maxime Ripard (2012-11-16 13:20:22)

Quoted 2 lines

Regards,
Mike

Quoted 86 lines
---
 drivers/clk/Makefile      |    1 +
 drivers/clk/clk-sunxi.c   |   30 ++++++++++++++++++++++++++++++
 include/linux/clk/sunxi.h |   22 ++++++++++++++++++++++
 3 files changed, 53 insertions(+)
 create mode 100644 drivers/clk/clk-sunxi.c
 create mode 100644 include/linux/clk/sunxi.h
drivers/clk/Makefile +1 -0
index 71a25b9..9c300a8 100644
@@ -19,6 +19,7 @@ endif
 obj-$(CONFIG_MACH_LOONGSON1)   += clk-ls1x.o
 obj-$(CONFIG_ARCH_U8500)       += ux500/
 obj-$(CONFIG_ARCH_VT8500)      += clk-vt8500.o
+obj-$(CONFIG_ARCH_SUNXI)       += clk-sunxi.o
 
 # Chip specific
 obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
drivers/clk/clk-sunxi.c new file +30 -0
new file mode 100644
index 0000000..0e831b5
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/sunxi.h>
+#include <linux/of.h>
+
+static const __initconst struct of_device_id clk_match[] = {
+       { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+       {}
+};
+
+void __init sunxi_init_clocks(void)
+{
+       of_clk_init(clk_match);
+}
include/linux/clk/sunxi.h new file +22 -0
new file mode 100644
index 0000000..e074fdd
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
+
+void __init sunxi_init_clocks(void);
+
+#endif
Signature · 1 line
1.7.9.5
#3 lore raw

PATCH v2 2/7 clocksource: sunxi: Add Allwinner A1X Timer Driver

In reply to Maxime Ripard
CC Thomas Gleixner <[email protected]>
CC John Stultz <[email protected]>
---
 .../bindings/timer/allwinner,sunxi-timer.txt       |   17 ++
 drivers/clocksource/Kconfig                        |    3 +
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/sunxi_timer.c                  |  170 ++++++++++++++++++++
 include/linux/sunxi_timer.h                        |   24 +++
 5 files changed, 215 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
 create mode 100644 drivers/clocksource/sunxi_timer.c
 create mode 100644 include/linux/sunxi_timer.h
Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt new file +17 -0
new file mode 100644
index 0000000..0c7b64e
@@ -0,0 +1,17 @@
+Allwinner A1X SoCs Timer Controller
+
+Required properties:
+
+- compatible : should be "allwinner,sunxi-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupt of the first timer
+- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
+
+Example:
+
+timer {
+	compatible = "allwinner,sunxi-timer";
+	reg = <0x01c20c00 0x400>;
+	interrupts = <22>;
+	clocks = <&osc>;
+};
drivers/clocksource/Kconfig +3 -0
index 6a78073..a098573 100644
@@ -22,6 +22,9 @@ config DW_APB_TIMER_OF
 config ARMADA_370_XP_TIMER
 	bool
 
+config SUNXI_TIMER
+	bool
+
 config CLKSRC_DBX500_PRCMU
 	bool "Clocksource PRCMU Timer"
 	depends on UX500_SOC_DB8500
drivers/clocksource/Makefile +1 -0
index 603be36..36f06de 100644
@@ -14,5 +14,6 @@ obj-$(CONFIG_DW_APB_TIMER_OF)	+= dw_apb_timer_of.o
 obj-$(CONFIG_CLKSRC_DBX500_PRCMU)	+= clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
 obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o
+obj-$(CONFIG_SUNXI_TIMER)	+= sunxi_timer.o
 
 obj-$(CONFIG_CLKSRC_ARM_GENERIC)	+= arm_generic.o
drivers/clocksource/sunxi_timer.c new file +170 -0

170 lines not on this page · raw message

include/linux/sunxi_timer.h new file +24 -0
new file mode 100644
index 0000000..b9165bb
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SUNXI_TIMER_H
+#define __SUNXI_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer sunxi_timer;
+
+#endif
Signature · 1 line
1.7.9.5
#4 lore raw

PATCH v2 3/7 irqchip: sunxi: Add irq controller driver

In reply to Maxime Ripard
CC Thomas Gleixner <[email protected]>
---
 .../interrupt-controller/allwinner,sunxi-ic.txt    |  104 ++++++++++++++
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-sunxi.c                        |  150 ++++++++++++++++++++
 include/linux/irqchip/sunxi.h                      |   27 ++++
 4 files changed, 282 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt
 create mode 100644 drivers/irqchip/irq-sunxi.c
 create mode 100644 include/linux/irqchip/sunxi.h
Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-ic.txt new file +104 -0
new file mode 100644
index 0000000..7f9fb85
@@ -0,0 +1,104 @@
+Allwinner Sunxi Interrupt Controller
+
+Required properties:
+
+- compatible : should be "allwinner,sunxi-ic"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+
+The interrupt sources are as follows:
+
+0: ENMI
+1: UART0
+2: UART1
+3: UART2
+4: UART3
+5: IR0
+6: IR1
+7: I2C0
+8: I2C1
+9: I2C2
+10: SPI0
+11: SPI1
+12: SPI2
+13: SPDIF
+14: AC97
+15: TS
+16: I2S
+17: UART4
+18: UART5
+19: UART6
+20: UART7
+21: KEYPAD
+22: TIMER0
+23: TIMER1
+24: TIMER2
+25: TIMER3
+26: CAN
+27: DMA
+28: PIO
+29: TOUCH_PANEL
+30: AUDIO_CODEC
+31: LRADC
+32: SDMC0
+33: SDMC1
+34: SDMC2
+35: SDMC3
+36: MEMSTICK
+37: NAND
+38: USB0
+39: USB1
+40: USB2
+41: SCR
+42: CSI0
+43: CSI1
+44: LCDCTRL0
+45: LCDCTRL1
+46: MP
+47: DEFEBE0
+48: DEFEBE1
+49: PMU
+50: SPI3
+51: TZASC
+52: PATA
+53: VE
+54: SS
+55: EMAC
+56: SATA
+57: GPS
+58: HDMI
+59: TVE
+60: ACE
+61: TVD
+62: PS2_0
+63: PS2_1
+64: USB3
+65: USB4
+66: PLE_PFM
+67: TIMER4
+68: TIMER5
+69: GPU_GP
+70: GPU_GPMMU
+71: GPU_PP0
+72: GPU_PPMMU0
+73: GPU_PMU
+74: GPU_RSV0
+75: GPU_RSV1
+76: GPU_RSV2
+77: GPU_RSV3
+78: GPU_RSV4
+79: GPU_RSV5
+80: GPU_RSV6
+82: SYNC_TIMER0
+83: SYNC_TIMER1
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "allwinner,sunxi-ic";
+	reg = <0x01c20400 0x400>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
drivers/irqchip/Makefile +1 -0
index 054321d..2444d07 100644
@@ -1 +1,2 @@
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
+obj-$(CONFIG_ARCH_SUNXI)   += irq-sunxi.o
drivers/irqchip/irq-sunxi.c new file +150 -0

150 lines not on this page · raw message

include/linux/irqchip/sunxi.h new file +27 -0
new file mode 100644
index 0000000..1fe2c22
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_IRQCHIP_SUNXI_H
+#define __LINUX_IRQCHIP_SUNXI_H
+
+#include <asm/exception.h>
+
+extern void sunxi_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry sunxi_handle_irq(
+	struct pt_regs *regs);
+
+#endif
Signature · 1 line
1.7.9.5
#5 lore raw

PATCH v2 4/7 ARM: sunxi: Add basic support for Allwinner A1x SoCs

In reply to Maxime Ripard
---
 Documentation/arm/sunxi/README    |   19 ++++++++++++
 arch/arm/Kconfig                  |    2 ++
 arch/arm/Makefile                 |    1 +
 arch/arm/mach-sunxi/Kconfig       |    9 ++++++
 arch/arm/mach-sunxi/Makefile      |    1 +
 arch/arm/mach-sunxi/Makefile.boot |    1 +
 arch/arm/mach-sunxi/sunxi.c       |   60 +++++++++++++++++++++++++++++++++++++
 arch/arm/mach-sunxi/sunxi.h       |   20 +++++++++++++
 8 files changed, 113 insertions(+)
 create mode 100644 Documentation/arm/sunxi/README
 create mode 100644 arch/arm/mach-sunxi/Kconfig
 create mode 100644 arch/arm/mach-sunxi/Makefile
 create mode 100644 arch/arm/mach-sunxi/Makefile.boot
 create mode 100644 arch/arm/mach-sunxi/sunxi.c
 create mode 100644 arch/arm/mach-sunxi/sunxi.h
Documentation/arm/sunxi/README new file +19 -0
new file mode 100644
index 0000000..87a1e8f
@@ -0,0 +1,19 @@
+ARM Allwinner SoCs
+==================
+
+This document lists all the ARM Allwinner SoCs that are currently
+supported in mainline by the Linux kernel. This document will also
+provide links to documentation and or datasheet for these SoCs.
+
+SunXi family
+------------
+
+  Flavors:
+        Allwinner A10 (sun4i)
+                Datasheet       : http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
+
+        Allwinner A13 (sun5i)
+                Datasheet       : http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
+
+  Core: Cortex A8
+  Linux kernel mach directory: arch/arm/mach-sunxi
\ No newline at end of file
arch/arm/Kconfig +2 -0
index ade7e92..1abb573 100644
@@ -1113,6 +1113,8 @@ source "arch/arm/mach-exynos/Kconfig"
 
 source "arch/arm/mach-shmobile/Kconfig"
 
+source "arch/arm/mach-sunxi/Kconfig"
+
 source "arch/arm/mach-prima2/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
arch/arm/Makefile +1 -0
index 5f914fc..363320a 100644
@@ -193,6 +193,7 @@ machine-$(CONFIG_ARCH_SPEAR13XX)	+= spear13xx
 machine-$(CONFIG_ARCH_SPEAR3XX)		+= spear3xx
 machine-$(CONFIG_MACH_SPEAR600)		+= spear6xx
 machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
+machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
arch/arm/mach-sunxi/Kconfig new file +9 -0
new file mode 100644
index 0000000..3fdd008
@@ -0,0 +1,9 @@
+config ARCH_SUNXI
+	bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
+	select CLKSRC_MMIO
+	select COMMON_CLK
+	select GENERIC_CLOCKEVENTS
+	select GENERIC_IRQ_CHIP
+	select PINCTRL
+	select SPARSE_IRQ
+	select SUNXI_TIMER
arch/arm/mach-sunxi/Makefile new file +1 -0
new file mode 100644
index 0000000..93bebfc
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_SUNXI) += sunxi.o
arch/arm/mach-sunxi/Makefile.boot new file +1 -0
new file mode 100644
index 0000000..46d4cf0
@@ -0,0 +1 @@
+zreladdr-$(CONFIG_ARCH_SUNXI)	+= 0x40008000
arch/arm/mach-sunxi/sunxi.c new file +60 -0

60 lines not on this page · raw message

arch/arm/mach-sunxi/sunxi.h new file +20 -0
new file mode 100644
index 0000000..33b5871
@@ -0,0 +1,20 @@
+/*
+ * Generic definitions for Allwinner SunXi SoCs
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __MACH_SUNXI_H
+#define __MACH_SUNXI_H
+
+#define SUNXI_REGS_PHYS_BASE	0x01c00000
+#define SUNXI_REGS_VIRT_BASE	IOMEM(0xf1c00000)
+#define SUNXI_REGS_SIZE		(SZ_2M + SZ_1M)
+
+#endif /* __MACH_SUNXI_H */
Signature · 1 line
1.7.9.5
#6 lore raw

PATCH v2 5/7 ARM: sunxi: Add earlyprintk support

In reply to Maxime Ripard
---
 arch/arm/Kconfig.debug         |    8 ++++++++
 arch/arm/include/debug/sunxi.S |   24 ++++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 arch/arm/include/debug/sunxi.S
arch/arm/Kconfig.debug +8 -0
index b0f3857..f12bc3a 100644
@@ -345,6 +345,13 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on SOCFPGA based platforms.
 
+	config DEBUG_SUNXI_UART1
+		bool "Kernel low-level debugging messages via sunXi UART1"
+		depends on ARCH_SUNXI
+		help
+		  Say Y here if you want kernel low-level debugging support
+		  on Allwinner A1X based platforms on the UART1.
+
 	config DEBUG_VEXPRESS_UART0_DETECT
 		bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
 		depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -416,6 +423,7 @@ config DEBUG_LL_INCLUDE
 	default "debug/mvebu.S" if DEBUG_MVEBU_UART
 	default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
 	default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
+	default "debug/sunxi.S" if DEBUG_SUNXI_UART1
 	default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
 		DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
 	default "mach/debug-macro.S"
arch/arm/include/debug/sunxi.S new file +24 -0
new file mode 100644
index 0000000..3bf61ca
@@ -0,0 +1,24 @@
+/*
+ * Early serial output macro for Allwinner A1X SoCs
+ *
+ * Copyright (C) 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifdef CONFIG_DEBUG_SUNXI_UART1
+#define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28400
+#define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28400
+#endif
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =SUNXI_UART_DEBUG_PHYS_BASE
+	ldr	\rv, =SUNXI_UART_DEBUG_VIRT_BASE
+	.endm
+
+#define UART_SHIFT	2
+#include <asm/hardware/debug-8250.S>
Signature · 1 line
1.7.9.5
#7 lore raw

PATCH v2 6/7 ARM: sunxi: Add device tree for the A13 and the Olinuxino board

In reply to Maxime Ripard
---
 arch/arm/boot/dts/Makefile            |    1 +
 arch/arm/boot/dts/sun5i-olinuxino.dts |   26 ++++++++++++
 arch/arm/boot/dts/sun5i.dtsi          |   74 +++++++++++++++++++++++++++++++++
 3 files changed, 101 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun5i-olinuxino.dts
 create mode 100644 arch/arm/boot/dts/sun5i.dtsi
arch/arm/boot/dts/Makefile +1 -0
index f37cf9f..9b2d3f0 100644
@@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
 	spear310-evb.dtb \
 	spear320-evb.dtb
 dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun5i-olinuxino.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
arch/arm/boot/dts/sun5i-olinuxino.dts new file +26 -0
new file mode 100644
index 0000000..3b1cce3
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun5i.dtsi"
+
+/ {
+	model = "Olimex A13-Olinuxino";
+	compatible = "olimex,a13-olinuxino", "allwinner,sun5i";
+
+	soc {
+		duart: uart at 01c28400 {
+			status = "okay";
+		};
+	};
+};
arch/arm/boot/dts/sun5i.dtsi new file +74 -0

74 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#8 lore raw

PATCH v2 7/7 ARM: sunxi: Add entry to MAINTAINERS

In reply to Maxime Ripard
---
 MAINTAINERS |    6 ++++++
 1 file changed, 6 insertions(+)
MAINTAINERS +6 -0
index 59203e7..7dbfcb7 100644
@@ -685,6 +685,12 @@ M:	Lennert Buytenhek <[email protected]>
 L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 
+ARM/Allwinner A1X SoC support
+M:	Maxime Ripard <[email protected]>
+L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
+S:	Maintained
+F:	arch/arm/mach-sunxi/
+
 ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES
 M:	Andrew Victor <[email protected]>
 M:	Nicolas Ferre <[email protected]>
Signature · 1 line
1.7.9.5
maintainer
#9 lore raw

v2 cover Add basic support for Allwinner A1X SoCs

In reply to Maxime Ripard
Quoted 7 lines · Maxime Ripard

You'll find in this patchset the initial support for Allwinner A10 and A13 SoCs from Allwinner. Since the internal name of these SoCs are sun4i and sun5i, the mach- directory is named sunxi.

You can find these SoCs in the Cubieboard, the A13-olinuxino or the Melee A1000.

Quoted 6 lines

Both SoCs should work fine, as the A13 is a trimmed down version of the A10, but it has only been tested on a A13-OlinuXino from Olimex.

Support is quite minimal for now, since it only includes timer and IRQ controller drivers, so we can only boot to userspace through initramfs. Support for the other peripherals on these SoCs will come eventually.

Looks all great!

Are you planning to send a pull request, or should we apply the port from patches?

Arnd

#10 lore raw

v2 cover Add basic support for Allwinner A1X SoCs

Hi Arnd,

Le 16/11/2012 22:40, Arnd Bergmann a ?crit :

Quoted 4 lines

Looks all great!

Are you planning to send a pull request, or should we apply the port from patches?

Whatever you prefer, just tell me.

Maxime

Signature · 4 lines
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
maintainer
#11 lore raw

v2 cover Add basic support for Allwinner A1X SoCs

Quoted 8 lines · Maxime Ripard

Le 16/11/2012 22:40, Arnd Bergmann a ?crit :

Quoted 4 lines

Looks all great!

Are you planning to send a pull request, or should we apply the port from patches?

Whatever you prefer, just tell me.

Generally, git pull requests are preferred, ideally using a signed tag that has a changeset description for the git history.

We can handle patches as well, but they cause slightly more work.

Arnd

#12 lore raw

v2 cover Add basic support for Allwinner A1X SoCs

In reply to Maxime Ripard
Quoted 9 lines · Maxime Ripard

Hi,

You'll find in this patchset the initial support for Allwinner A10 and A13 SoCs from Allwinner. Since the internal name of these SoCs are sun4i and sun5i, the mach- directory is named sunxi.

You can find these SoCs in the Cubieboard, the A13-olinuxino or the Melee A1000.

Quoted 6 lines

Both SoCs should work fine, as the A13 is a trimmed down version of the A10, but it has only been tested on a A13-OlinuXino from Olimex.

Support is quite minimal for now, since it only includes timer and IRQ controller drivers, so we can only boot to userspace through initramfs. Support for the other peripherals on these SoCs will come eventually.

Nice work. Thanks. Whole series is:

I'll send some A10/cubieboard patches beginning next week.

Thanks,
Stefan