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ARM: sunxi: Restructure sunxi dts/dtsi files

PATCH New Stefan Roese 3 participants 13 messages Nov 19, 2012

Subsystems (6)
Device tree bindings Arm (32-bit) Arm sub-architectures Arm/Allwinner sunXi SoC support +2 more subsystems
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Stefan Roese

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#0 lore raw

PATCH 1/4 ARM: sunxi: Restructure sunxi dts/dtsi files

For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files:

sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi

Additionally the "duart" label in the olinuxino.dts is changed to "uart1".

Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/boot/dts/sun5i-olinuxino.dts |  6 +++-
 arch/arm/boot/dts/sun5i.dtsi          | 56 +----------------------------
 arch/arm/boot/dts/sunxi.dtsi          | 66 +++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+), 56 deletions(-)
 create mode 100644 arch/arm/boot/dts/sunxi.dtsi
arch/arm/boot/dts/sun5i-olinuxino.dts +5 -1
index 3b1cce3..d6ff889 100644
@@ -18,8 +18,12 @@
 	model = "Olimex A13-Olinuxino";
 	compatible = "olimex,a13-olinuxino", "allwinner,sun5i";
 
+	chosen {
+		bootargs = "earlyprintk console=ttyS0,115200";
+	};
+
 	soc {
-		duart: uart at 01c28400 {
+		uart1: uart at 01c28400 {
 			status = "okay";
 		};
 	};
arch/arm/boot/dts/sun5i.dtsi +1 -55

65 lines not on this page · raw message

arch/arm/boot/dts/sunxi.dtsi new file +66 -0

66 lines not on this page · raw message

Signature · 1 line
1.8.0
author
#1 lore raw

PATCH 2/4 ARM: sunxi: Add earlyprintk support for UART0 (sun4i)

Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/Kconfig.debug         | 9 ++++++++-
 arch/arm/include/debug/sunxi.S | 5 ++++-
 2 files changed, 12 insertions(+), 2 deletions(-)
arch/arm/Kconfig.debug +8 -1
index f12bc3a..cc1ed35 100644
@@ -345,6 +345,13 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on SOCFPGA based platforms.
 
+	config DEBUG_SUNXI_UART0
+		bool "Kernel low-level debugging messages via sunXi UART0"
+		depends on ARCH_SUNXI
+		help
+		  Say Y here if you want kernel low-level debugging support
+		  on Allwinner A1X based platforms on the UART0.
+
 	config DEBUG_SUNXI_UART1
 		bool "Kernel low-level debugging messages via sunXi UART1"
 		depends on ARCH_SUNXI

@@ -423,7 +430,7 @@ config DEBUG_LL_INCLUDE
 	default "debug/mvebu.S" if DEBUG_MVEBU_UART
 	default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
 	default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
-	default "debug/sunxi.S" if DEBUG_SUNXI_UART1
+	default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
 	default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
 		DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
 	default "mach/debug-macro.S"
arch/arm/include/debug/sunxi.S +4 -1
index 3bf61ca..04eb56d 100644
@@ -10,7 +10,10 @@
  * published by the Free Software Foundation.
 */
 
-#ifdef CONFIG_DEBUG_SUNXI_UART1
+#if defined(CONFIG_DEBUG_SUNXI_UART0)
+#define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28000
+#define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28000
+#elif defined(CONFIG_DEBUG_SUNXI_UART1)
 #define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28400
 #define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28400
 #endif
Signature · 1 line
1.8.0
Applied
#2 lore raw

PATCH 2/4 ARM: sunxi: Add earlyprintk support for UART0 (sun4i)

Le 19/11/2012 12:09, Stefan Roese a ?crit :

Quoted 42 lines
Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/Kconfig.debug         | 9 ++++++++-
 arch/arm/include/debug/sunxi.S | 5 ++++-
 2 files changed, 12 insertions(+), 2 deletions(-)
arch/arm/Kconfig.debug +8 -1
index f12bc3a..cc1ed35 100644
@@ -345,6 +345,13 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on SOCFPGA based platforms.
 
+	config DEBUG_SUNXI_UART0
+		bool "Kernel low-level debugging messages via sunXi UART0"
+		depends on ARCH_SUNXI
+		help
+		  Say Y here if you want kernel low-level debugging support
+		  on Allwinner A1X based platforms on the UART0.
+
 	config DEBUG_SUNXI_UART1
 		bool "Kernel low-level debugging messages via sunXi UART1"
 		depends on ARCH_SUNXI

@@ -423,7 +430,7 @@ config DEBUG_LL_INCLUDE
 	default "debug/mvebu.S" if DEBUG_MVEBU_UART
 	default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
 	default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
-	default "debug/sunxi.S" if DEBUG_SUNXI_UART1
+	default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
 	default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
 		DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
 	default "mach/debug-macro.S"
arch/arm/include/debug/sunxi.S +0 -0
index 3bf61ca..04eb56d 100644
@@ -10,7 +10,10 @@
  * published by the Free Software Foundation.

arch/arm/include/debug/sunxi.S line 19

Quoted 10 lines
arch/arm/include/debug/sunxi.S +4 -1
 */
 
-#ifdef CONFIG_DEBUG_SUNXI_UART1
+#if defined(CONFIG_DEBUG_SUNXI_UART0)
+#define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28000
+#define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28000
+#elif defined(CONFIG_DEBUG_SUNXI_UART1)
 #define SUNXI_UART_DEBUG_PHYS_BASE 0x01c28400
 #define SUNXI_UART_DEBUG_VIRT_BASE 0xf1c28400
 #endif

Applied, thanks!

Signature · 4 lines
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
author
#4 lore raw

PATCH 3/4 ARM: sunxi: Add sun4i and cubieboard support

In reply to Stefan Roese

This patch adds support for the Cubieboard based on the Allwinner A10/sun4i SoC. Currently only UART is supported. Other devices will eventually follow.

Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/boot/dts/Makefile             |  3 ++-
 arch/arm/boot/dts/sun4i-cubieboard.dts | 38 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/sunxi.dtsi           |  9 ++++++++
 arch/arm/mach-sunxi/sunxi.c            |  1 +
 4 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/sun4i-cubieboard.dts
arch/arm/boot/dts/Makefile +2 -1
index 9b2d3f0..4dd567b 100644
@@ -84,7 +84,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
 	spear310-evb.dtb \
 	spear320-evb.dtb
 dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun5i-olinuxino.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun4i-cubieboard.dtb \
+	sun5i-olinuxino.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
arch/arm/boot/dts/sun4i-cubieboard.dts new file +38 -0
new file mode 100644
index 0000000..f4ca126
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Stefan Roese
+ * Stefan Roese <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun4i.dtsi"
+
+/ {
+	model = "Cubietech Cubieboard";
+	compatible = "cubietech,cubieboard", "allwinner,sun4i";
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		bootargs = "earlyprintk console=ttyS0,115200";
+	};
+
+	soc {
+		uart0: uart at 01c28000 {
+			status = "okay";
+		};
+
+		uart1: uart at 01c28400 {
+			status = "okay";
+		};
+	};
+};
arch/arm/boot/dts/sunxi.dtsi +9 -0
index 9e476de..8284fbd 100644
@@ -54,6 +54,15 @@
 			#interrupt-cells = <1>;
 		};
 
+		uart0: uart at 01c28000 {
+			compatible = "ns8250";
+			reg = <0x01c28000 0x400>;
+			interrupts = <1>;
+			reg-shift = <2>;
+			clock-frequency = <24000000>;
+			status = "disabled";
+		};
+
 		uart1: uart at 01c28400 {
 			compatible = "ns8250";
 			reg = <0x01c28400 0x400>;
arch/arm/mach-sunxi/sunxi.c +1 -0
index 8f42df8..13d4d96 100644
@@ -46,6 +46,7 @@ static void __init sunxi_dt_init(void)
 }
 
 static const char * const sunxi_board_dt_compat[] = {
+	"allwinner,sun4i",
 	"allwinner,sun5i",
 	NULL,
 };
Signature · 1 line
1.8.0
Applied
#5 lore raw

PATCH 3/4 ARM: sunxi: Add sun4i and cubieboard support

Le 19/11/2012 12:09, Stefan Roese a ?crit :

Quoted 99 lines

This patch adds support for the Cubieboard based on the Allwinner A10/sun4i SoC. Currently only UART is supported. Other devices will eventually follow.

Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/boot/dts/Makefile             |  3 ++-
 arch/arm/boot/dts/sun4i-cubieboard.dts | 38 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/sunxi.dtsi           |  9 ++++++++
 arch/arm/mach-sunxi/sunxi.c            |  1 +
 4 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/sun4i-cubieboard.dts
arch/arm/boot/dts/Makefile +2 -1
index 9b2d3f0..4dd567b 100644
@@ -84,7 +84,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
 	spear310-evb.dtb \
 	spear320-evb.dtb
 dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun5i-olinuxino.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun4i-cubieboard.dtb \
+	sun5i-olinuxino.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
arch/arm/boot/dts/sun4i-cubieboard.dts new file +38 -0
new file mode 100644
index 0000000..f4ca126
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Stefan Roese
+ * Stefan Roese <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun4i.dtsi"
+
+/ {
+	model = "Cubietech Cubieboard";
+	compatible = "cubietech,cubieboard", "allwinner,sun4i";
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		bootargs = "earlyprintk console=ttyS0,115200";
+	};
+
+	soc {
+		uart0: uart at 01c28000 {
+			status = "okay";
+		};
+
+		uart1: uart at 01c28400 {
+			status = "okay";
+		};
+	};
+};
arch/arm/boot/dts/sunxi.dtsi +9 -0
index 9e476de..8284fbd 100644
@@ -54,6 +54,15 @@
 			#interrupt-cells = <1>;
 		};
 
+		uart0: uart at 01c28000 {
+			compatible = "ns8250";
+			reg = <0x01c28000 0x400>;
+			interrupts = <1>;
+			reg-shift = <2>;
+			clock-frequency = <24000000>;
+			status = "disabled";
+		};
+
 		uart1: uart at 01c28400 {
 			compatible = "ns8250";
 			reg = <0x01c28400 0x400>;
arch/arm/mach-sunxi/sunxi.c +0 -0
index 8f42df8..13d4d96 100644

arch/arm/mach-sunxi/sunxi.c static void __init sunxi_dt_init(void) · line 52

Quoted 7 lines
arch/arm/mach-sunxi/sunxi.c +1 -0
@@ -46,6 +46,7 @@ static void __init sunxi_dt_init(void)
 }
 
 static const char * const sunxi_board_dt_compat[] = {
+	"allwinner,sun4i",
 	"allwinner,sun5i",
 	NULL,
 };

Applied, thanks!

Maxime

Signature · 4 lines
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
author
#7 lore raw

PATCH 4/4 ARM: sunxi: Add sunxi restart function via onchip watchdog

In reply to Stefan Roese
Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/mach-sunxi/sunxi.c       |  1 +
 arch/arm/mach-sunxi/sunxi.h       |  2 ++
 drivers/clocksource/sunxi_timer.c | 14 ++++++++++++++
 3 files changed, 17 insertions(+)
arch/arm/mach-sunxi/sunxi.c +1 -0
index 13d4d96..6b1186c 100644
@@ -57,5 +57,6 @@ DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
 	.init_irq	= sunxi_init_irq,
 	.handle_irq	= sunxi_handle_irq,
 	.timer		= &sunxi_timer,
+	.restart	= sunxi_restart,
 	.dt_compat	= sunxi_board_dt_compat,
 MACHINE_END
arch/arm/mach-sunxi/sunxi.h +2 -0
index 33b5871..806c5fd 100644
@@ -17,4 +17,6 @@
 #define SUNXI_REGS_VIRT_BASE	IOMEM(0xf1c00000)
 #define SUNXI_REGS_SIZE		(SZ_2M + SZ_1M)
 
+void sunxi_restart(char mode, const char *cmd);
+
 #endif /* __MACH_SUNXI_H */
drivers/clocksource/sunxi_timer.c +14 -0
index 3c46434..dfbf879 100644
@@ -34,6 +34,8 @@
 #define TIMER0_CTL_ONESHOT		(1 << 7)
 #define TIMER0_INTVAL_REG	0x14
 #define TIMER0_CNTVAL_REG	0x18
+#define WATCH_DOG_CTRL_REG	0x90
+#define WATCH_DOG_MODE_REG	0x94
 
 #define TIMER_SCAL		16
 

@@ -103,6 +105,18 @@ static struct of_device_id sunxi_timer_dt_ids[] = {
 	{ .compatible = "allwinner,sunxi-timer" },
 };
 
+void sunxi_restart(char mode, const char *cmd)
+{
+	/* Use watchdog to reset system */
+
+	/* Enable timer and set reset bit */
+	writel(3, timer_base + WATCH_DOG_MODE_REG);
+	writel(0xa57 << 1 | 1, timer_base + WATCH_DOG_CTRL_REG);
+
+	while(1)
+		;
+}
+
 static void __init sunxi_timer_init(void)
 {
 	struct device_node *node;
Signature · 1 line
1.8.0
#8 lore raw

PATCH 4/4 ARM: sunxi: Add sunxi restart function via onchip watchdog

Hi Stefan,

While I've taken the three other patches, I'm more concerned about this one.

On a general basis, I would rather see this code into the machine source file, since it doesn't directly relate to the timer driver. If at some point someone wants to write a proper watchdog driver alongside with the timer driver, I'll be fine with moving the code there, but for now, let's keep it simple.

Le 19/11/2012 12:09, Stefan Roese a ?crit :

Quoted 49 lines
Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/mach-sunxi/sunxi.c       |  1 +
 arch/arm/mach-sunxi/sunxi.h       |  2 ++
 drivers/clocksource/sunxi_timer.c | 14 ++++++++++++++
 3 files changed, 17 insertions(+)
arch/arm/mach-sunxi/sunxi.c +1 -0
index 13d4d96..6b1186c 100644
@@ -57,5 +57,6 @@ DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
 	.init_irq	= sunxi_init_irq,
 	.handle_irq	= sunxi_handle_irq,
 	.timer		= &sunxi_timer,
+	.restart	= sunxi_restart,
 	.dt_compat	= sunxi_board_dt_compat,
 MACHINE_END
arch/arm/mach-sunxi/sunxi.h +2 -0
index 33b5871..806c5fd 100644
@@ -17,4 +17,6 @@
 #define SUNXI_REGS_VIRT_BASE	IOMEM(0xf1c00000)
 #define SUNXI_REGS_SIZE		(SZ_2M + SZ_1M)
 
+void sunxi_restart(char mode, const char *cmd);
+
 #endif /* __MACH_SUNXI_H */
drivers/clocksource/sunxi_timer.c +3 -0
index 3c46434..dfbf879 100644
@@ -34,6 +34,8 @@
 #define TIMER0_CTL_ONESHOT		(1 << 7)
 #define TIMER0_INTVAL_REG	0x14
 #define TIMER0_CNTVAL_REG	0x18
+#define WATCH_DOG_CTRL_REG	0x90
+#define WATCH_DOG_MODE_REG	0x94
 
 #define TIMER_SCAL		16
 

@@ -103,6 +105,18 @@ static struct of_device_id sunxi_timer_dt_ids[] = {
 	{ .compatible = "allwinner,sunxi-timer" },
 };
 
+void sunxi_restart(char mode, const char *cmd)

drivers/clocksource/sunxi_timer.c static struct of_device_id sunxi_timer_dt_ids[] = { · line 118

Quoted 10 lines
drivers/clocksource/sunxi_timer.c +10 -0
+{
+	/* Use watchdog to reset system */
+
+	/* Enable timer and set reset bit */
+	writel(3, timer_base + WATCH_DOG_MODE_REG);
+	writel(0xa57 << 1 | 1, timer_base + WATCH_DOG_CTRL_REG);
+
+	while(1)
+		;
+}

Here, your code looks way more obscure and "complicated" than the one from linux-sunxi found here:
https://github.com/linux-sunxi/linux-sunxi/blob/sunxi-3.4/arch/arm/mach-sun4i/core.c#L289

Why is that?

Thanks,
Maxime

Signature · 4 lines
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
author
#9 lore raw

PATCH 4/4 ARM: sunxi: Add sunxi restart function via onchip watchdog

Quoted 7 lines · Maxime Ripard

While I've taken the three other patches, I'm more concerned about this one.

On a general basis, I would rather see this code into the machine source file, since it doesn't directly relate to the timer driver. If at some point someone wants to write a proper watchdog driver alongside with the timer driver, I'll be fine with moving the code there, but for now, let's keep it simple.

I thought about that too. But it would either a) result in code duplication (finding and mapping this timer device node) or b) we would have to make this "timer_base" an ugly global variable so that we can reference it from the platform code. That's why I placed it the timer source.

<snip>

Quoted 16 lines

drivers/clocksource/sunxi_timer.c static struct of_device_id sunxi_timer_dt_ids[] = { · line 118

Quoted 11 lines
drivers/clocksource/sunxi_timer.c +11 -0
+void sunxi_restart(char mode, const char *cmd)
+{
+	/* Use watchdog to reset system */
+
+	/* Enable timer and set reset bit */
+	writel(3, timer_base + WATCH_DOG_MODE_REG);
+	writel(0xa57 << 1 | 1, timer_base + WATCH_DOG_CTRL_REG);
+
+	while(1)
+		;
+}

Here, your code looks way more obscure and "complicated" than the one from linux-sunxi found here:
https://github.com/linux-sunxi/linux-sunxi/blob/sunxi-3.4/arch/arm/mach-sun4i/core.c#L289

Quoted 1 line

Why is that?

"Way more obscure" sounds a bit exaggerated for 3 lines of code. ;)

The delays have been removed as they are not necessary. So its even "cleaner" than the code that you referenced. And the code at linux-sunxi also has incorrect register definitions (CTRL_REG is not 0x94 but 0x90).

The main difference is the added write to the real CTRL_REG (0x90) to rearm the wdog. This has been suggested by Henrik Norstr?m, who has done most of the U-Boot work (preparing for mainlining as well).

So since Arnd seem to be fine with this patch, I suggest to leave it as is for now.

Thanks,
Stefan

maintainer
#10 lore raw

PATCH 4/4 ARM: sunxi: Add sunxi restart function via onchip watchdog

In reply to Stefan Roese
Quoted 3 lines · Stefan Roese
Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
Acked-by Arnd Bergmann <[email protected]>
Quoted 5 lines
drivers/clocksource/sunxi_timer.c +5 -0
+void sunxi_restart(char mode, const char *cmd)
+{
+	/* Use watchdog to reset system */
+
+	/* Enable timer and set reset bit */

drivers/clocksource/sunxi_timer.c static struct of_device_id sunxi_timer_dt_ids[] = { · line 122

Quoted 10 lines
drivers/clocksource/sunxi_timer.c +7 -0
+	writel(3, timer_base + WATCH_DOG_MODE_REG);
+	writel(0xa57 << 1 | 1, timer_base + WATCH_DOG_CTRL_REG);
+
+	while(1)
+		;
+}
+
 static void __init sunxi_timer_init(void)
 {
 	struct device_node *node;

We may have to revisit this if we get to the point where timer drivers can be in loadable modules. We can't do that yet, so it's probably better the way you wrote it than something else.

Arnd

Applied
#11 lore raw

PATCH 1/4 ARM: sunxi: Restructure sunxi dts/dtsi files

In reply to Stefan Roese

Le 19/11/2012 12:09, Stefan Roese a ?crit :

Quoted 173 lines

For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files:

sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi

Additionally the "duart" label in the olinuxino.dts is changed to "uart1".

Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
---
 arch/arm/boot/dts/sun5i-olinuxino.dts |  6 +++-
 arch/arm/boot/dts/sun5i.dtsi          | 56 +----------------------------
 arch/arm/boot/dts/sunxi.dtsi          | 66 +++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+), 56 deletions(-)
 create mode 100644 arch/arm/boot/dts/sunxi.dtsi
arch/arm/boot/dts/sun5i-olinuxino.dts +5 -1
index 3b1cce3..d6ff889 100644
@@ -18,8 +18,12 @@
 	model = "Olimex A13-Olinuxino";
 	compatible = "olimex,a13-olinuxino", "allwinner,sun5i";
 
+	chosen {
+		bootargs = "earlyprintk console=ttyS0,115200";
+	};
+
 	soc {
-		duart: uart at 01c28400 {
+		uart1: uart at 01c28400 {
 			status = "okay";
 		};
 	};
arch/arm/boot/dts/sun5i.dtsi +1 -55
index 4bedf3e..59a2d26 100644
@@ -11,64 +11,10 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-/include/ "skeleton.dtsi"
+/include/ "sunxi.dtsi"
 
 / {
-	interrupt-parent = <&intc>;
-
-	cpus {
-		cpu at 0 {
-			compatible = "arm,cortex-a8";
-		};
-	};
-
-	chosen {
-		bootargs = "earlyprintk console=ttyS0,115200";
-	};
-
 	memory {
 		reg = <0x40000000 0x20000000>;
 	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		osc: oscillator {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	soc {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x01c20000 0x300000>;
-		ranges;
-
-		timer at 01c20c00 {
-			compatible = "allwinner,sunxi-timer";
-			reg = <0x01c20c00 0x400>;
-			interrupts = <22>;
-			clocks = <&osc>;
-		};
-
-		intc: interrupt-controller at 01c20400 {
-			compatible = "allwinner,sunxi-ic";
-			reg = <0x01c20400 0x400>;
-			interrupt-controller;
-			#interrupt-cells = <1>;
-		};
-
-		uart1: uart at 01c28400 {
-			compatible = "ns8250";
-			reg = <0x01c28400 0x400>;
-			interrupts = <2>;
-			reg-shift = <2>;
-			clock-frequency = <24000000>;
-			status = "disabled";
-		};
-	};
 };
arch/arm/boot/dts/sunxi.dtsi new file +56 -0
new file mode 100644
index 0000000..9e476de
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	interrupt-parent = <&intc>;
+
+	cpus {
+		cpu at 0 {
+			compatible = "arm,cortex-a8";
+		};
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		osc: oscillator {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x01c20000 0x300000>;
+		ranges;
+
+		timer at 01c20c00 {
+			compatible = "allwinner,sunxi-timer";
+			reg = <0x01c20c00 0x400>;
+			interrupts = <22>;
+			clocks = <&osc>;
+		};
+
+		intc: interrupt-controller at 01c20400 {
+			compatible = "allwinner,sunxi-ic";
+			reg = <0x01c20400 0x400>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+		};
+

arch/arm/boot/dts/sunxi.dtsi line 66

Quoted 10 lines
arch/arm/boot/dts/sunxi.dtsi new file +10 -0
+		uart1: uart at 01c28400 {
+			compatible = "ns8250";
+			reg = <0x01c28400 0x400>;
+			interrupts = <2>;
+			reg-shift = <2>;
+			clock-frequency = <24000000>;
+			status = "disabled";
+		};
+	};
+};

Applied, thanks!

Signature · 4 lines
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
maintainer
#12 lore raw

PATCH 1/4 ARM: sunxi: Restructure sunxi dts/dtsi files

In reply to Stefan Roese
Quoted 9 lines · Stefan Roese

For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files:

sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi

Quoted 6 lines

Additionally the "duart" label in the olinuxino.dts is changed to "uart1".

Signed-off-by Stefan Roese <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Arnd Bergmann <[email protected]>
Acked-by Arnd Bergmann <[email protected]>

The patch looks good, but I think you didn't pass the '-M' argument to git-format-patch, which would have made it more readable.

Arnd