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Avoid passing clks through platform data

PATCH Superseded Padmavathi Venna 5 participants 16 messages Nov 6, 2012 – Nov 24, 2012

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#0 lore raw

v3 cover Avoid passing clks through platform data

Changes since v2:
- Rebased on 3.7-rc3

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

In the below series of patches, registered the existed clks with clkdev using generic connection id and removed the variable which holds those clk names. This is done for s3c64xx,s5pc100,s5p64x0, s5pv210 and exynos4 series. But tested the sound card detection only on smdk6410 board. On remaining all platforms it was just build tested.

Padmavathi Venna (5):
ARM: S3C64XX: Add I2S clkdev support
ARM: S5PC100: Add I2S clkdev support
ARM: S5P64x0: Add I2S clkdev support
ARM: S5PV210: Avoid passing the clks through platform data
ARM: Exynos: Avoid passing the clks through platform data

 arch/arm/mach-exynos/dev-audio.c      |   12 ---
 arch/arm/mach-s3c64xx/clock.c         |  126 ++++++++++++++++++++-------------
 arch/arm/mach-s3c64xx/dev-audio.c     |   11 ---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   49 +++++++++----
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   61 +++++++++++-----
 arch/arm/mach-s5p64x0/dev-audio.c     |   12 ---
 arch/arm/mach-s5pc100/clock.c         |   48 ++++++++-----
 arch/arm/mach-s5pc100/dev-audio.c     |   16 ----
 arch/arm/mach-s5pv210/dev-audio.c     |   16 ----
 9 files changed, 182 insertions(+), 169 deletions(-)
Signature · 1 line
1.7.4.4
#1 lore raw

PATCH v3 1/5 ARM: S3C64XX: Add I2S clkdev support

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s3c64xx/clock.c     |  126 ++++++++++++++++++++++--------------
 arch/arm/mach-s3c64xx/dev-audio.c |   11 ---
 2 files changed, 77 insertions(+), 60 deletions(-)
arch/arm/mach-s3c64xx/clock.c +77 -49
index 28041e8..087183d 100644
@@ -153,25 +153,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c64xx_pclk_ctrl,
 		.ctrlbit	= S3C6410_CLKCON_PCLK_I2C1,
 	}, {
-		.name		= "iis",
-		.devname	= "samsung-i2s.0",
-		.parent		= &clk_p,
-		.enable		= s3c64xx_pclk_ctrl,
-		.ctrlbit	= S3C_CLKCON_PCLK_IIS0,
-	}, {
-		.name		= "iis",
-		.devname	= "samsung-i2s.1",
-		.parent		= &clk_p,
-		.enable		= s3c64xx_pclk_ctrl,
-		.ctrlbit	= S3C_CLKCON_PCLK_IIS1,
-	}, {
-#ifdef CONFIG_CPU_S3C6410
-		.name		= "iis",
-		.parent		= &clk_p,
-		.enable		= s3c64xx_pclk_ctrl,
-		.ctrlbit	= S3C6410_CLKCON_PCLK_IIS2,
-	}, {
-#endif
 		.name		= "keypad",
 		.parent		= &clk_p,
 		.enable		= s3c64xx_pclk_ctrl,
@@ -345,6 +326,32 @@ static struct clk clk_48m_spi1 = {
 	.ctrlbit	= S3C_CLKCON_SCLK_SPI1_48,
 };
 
+static struct clk clk_i2s0 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.0",
+	.parent		= &clk_p,
+	.enable		= s3c64xx_pclk_ctrl,
+	.ctrlbit	= S3C_CLKCON_PCLK_IIS0,
+};
+
+static struct clk clk_i2s1 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.1",
+	.parent		= &clk_p,
+	.enable		= s3c64xx_pclk_ctrl,
+	.ctrlbit	= S3C_CLKCON_PCLK_IIS1,
+};
+
+#ifdef CONFIG_CPU_S3C6410
+static struct clk clk_i2s2 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.2",
+	.parent		= &clk_p,
+	.enable		= s3c64xx_pclk_ctrl,
+	.ctrlbit	= S3C6410_CLKCON_PCLK_IIS2,
+};
+#endif
+
 static struct clk init_clocks[] = {
 	{
 		.name		= "lcd",
@@ -668,6 +675,7 @@ static struct clksrc_sources clkset_audio1 = {
 	.nr_sources	= ARRAY_SIZE(clkset_audio1_list),
 };
 
+#ifdef CONFIG_CPU_S3C6410
 static struct clk *clkset_audio2_list[] = {
 	[0] = &clk_mout_epll.clk,
 	[1] = &clk_dout_mpll,
@@ -680,6 +688,7 @@ static struct clksrc_sources clkset_audio2 = {
 	.sources	= clkset_audio2_list,
 	.nr_sources	= ARRAY_SIZE(clkset_audio2_list),
 };
+#endif
 
 static struct clk *clkset_camif_list[] = {
 	&clk_h2,
@@ -702,36 +711,6 @@ static struct clksrc_clk clksrcs[] = {
 		.sources	= &clkset_uhost,
 	}, {
 		.clk	= {
-			.name		= "audio-bus",
-			.devname	= "samsung-i2s.0",
-			.ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C_CLK_SRC, .shift = 7, .size = 3  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4  },
-		.sources	= &clkset_audio0,
-	}, {
-		.clk	= {
-			.name		= "audio-bus",
-			.devname	= "samsung-i2s.1",
-			.ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C_CLK_SRC, .shift = 10, .size = 3  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4  },
-		.sources	= &clkset_audio1,
-	}, {
-		.clk	= {
-			.name		= "audio-bus",
-			.devname	= "samsung-i2s.2",
-			.ctrlbit        = S3C6410_CLKCON_SCLK_AUDIO2,
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4  },
-		.sources	= &clkset_audio2,
-	}, {
-		.clk	= {
 			.name		= "irda-bus",
 			.ctrlbit        = S3C_CLKCON_SCLK_IRDA,
 			.enable		= s3c64xx_sclk_ctrl,
@@ -823,6 +802,43 @@ static struct clksrc_clk clk_sclk_spi1 = {
 	.sources = &clkset_spi_mmc,
 };
 
+static struct clksrc_clk clk_audio_bus0 = {
+	.clk	= {
+		.name		= "audio-bus",
+		.devname	= "samsung-i2s.0",
+		.ctrlbit	= S3C_CLKCON_SCLK_AUDIO0,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src	= { .reg = S3C_CLK_SRC, .shift = 7, .size = 3  },
+	.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4  },
+	.sources	= &clkset_audio0,
+};
+
+static struct clksrc_clk clk_audio_bus1 = {
+	.clk	= {
+		.name		= "audio-bus",
+		.devname	= "samsung-i2s.1",
+		.ctrlbit	= S3C_CLKCON_SCLK_AUDIO1,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src	= { .reg = S3C_CLK_SRC, .shift = 10, .size = 3  },
+	.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4  },
+	.sources	= &clkset_audio1,
+};
+
+#ifdef CONFIG_CPU_S3C6410
+static struct clksrc_clk clk_audio_bus2 = {
+	.clk	= {
+		.name		= "audio-bus",
+		.devname	= "samsung-i2s.2",
+		.ctrlbit	= S3C6410_CLKCON_SCLK_AUDIO2,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src	= { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3  },
+	.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4  },
+	.sources	= &clkset_audio2,
+};
+#endif
 /* Clock initialisation code */
 
 static struct clksrc_clk *init_parents[] = {
@@ -838,6 +854,8 @@ static struct clksrc_clk *clksrc_cdev[] = {
 	&clk_sclk_mmc2,
 	&clk_sclk_spi0,
 	&clk_sclk_spi1,
+	&clk_audio_bus0,
+	&clk_audio_bus1,
 };
 
 static struct clk *clk_cdev[] = {
@@ -846,6 +864,8 @@ static struct clk *clk_cdev[] = {
 	&clk_hsmmc2,
 	&clk_48m_spi0,
 	&clk_48m_spi1,
+	&clk_i2s0,
+	&clk_i2s1,
 };
 
 static struct clk_lookup s3c64xx_clk_lookup[] = {
@@ -862,6 +882,14 @@ static struct clk_lookup s3c64xx_clk_lookup[] = {
 	CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0),
 	CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
 	CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1),
+	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus0.clk),
+	CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
+	CLKDEV_INIT("samsung-i2s.1", "i2s_opclk1", &clk_audio_bus1.clk),
+#ifdef CONFIG_CPU_S3C6410
+	CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
+	CLKDEV_INIT("samsung-i2s.2", "i2s_opclk1", &clk_audio_bus2.clk),
+#endif
 };
 
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
arch/arm/mach-s3c64xx/dev-audio.c +0 -11
index 35f3e07..e367e87 100644
@@ -23,11 +23,6 @@
 #include <linux/platform_data/asoc-s3c.h>
 #include <plat/gpio-cfg.h>
 
-static const char *rclksrc[] = {
-	[0] = "iis",
-	[1] = "audio-bus",
-};
-
 static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev)
 {
 	unsigned int base;
@@ -64,11 +59,6 @@ static struct resource s3c64xx_iis0_resource[] = {
 
 static struct s3c_audio_pdata i2sv3_pdata = {
 	.cfg_gpio = s3c64xx_i2s_cfg_gpio,
-	.type = {
-		.i2s = {
-			.src_clk = rclksrc,
-		},
-	},
 };
 
 struct platform_device s3c64xx_device_iis0 = {
@@ -110,7 +100,6 @@ static struct s3c_audio_pdata i2sv4_pdata = {
 	.type = {
 		.i2s = {
 			.quirks = QUIRK_PRI_6CHAN,
-			.src_clk = rclksrc,
 		},
 	},
 };
Signature · 1 line
1.7.4.4
#2 lore raw

PATCH v3 1/5 ARM: S3C64XX: Add I2S clkdev support

cc'ing Mark Brown.

Quoted 248 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s3c64xx/clock.c     |  126 ++++++++++++++++++++++--------------
 arch/arm/mach-s3c64xx/dev-audio.c |   11 ---
 2 files changed, 77 insertions(+), 60 deletions(-)
arch/arm/mach-s3c64xx/clock.c +77 -49
index 28041e8..087183d 100644
@@ -153,25 +153,6 @@ static struct clk init_clocks_off[] = {
                .enable         = s3c64xx_pclk_ctrl,
                .ctrlbit        = S3C6410_CLKCON_PCLK_I2C1,
        }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.0",
-               .parent         = &clk_p,
-               .enable         = s3c64xx_pclk_ctrl,
-               .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.1",
-               .parent         = &clk_p,
-               .enable         = s3c64xx_pclk_ctrl,
-               .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
-       }, {
-#ifdef CONFIG_CPU_S3C6410
-               .name           = "iis",
-               .parent         = &clk_p,
-               .enable         = s3c64xx_pclk_ctrl,
-               .ctrlbit        = S3C6410_CLKCON_PCLK_IIS2,
-       }, {
-#endif
                .name           = "keypad",
                .parent         = &clk_p,
                .enable         = s3c64xx_pclk_ctrl,
@@ -345,6 +326,32 @@ static struct clk clk_48m_spi1 = {
        .ctrlbit        = S3C_CLKCON_SCLK_SPI1_48,
 };
 
+static struct clk clk_i2s0 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.0",
+       .parent         = &clk_p,
+       .enable         = s3c64xx_pclk_ctrl,
+       .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
+};
+
+static struct clk clk_i2s1 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.1",
+       .parent         = &clk_p,
+       .enable         = s3c64xx_pclk_ctrl,
+       .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
+};
+
+#ifdef CONFIG_CPU_S3C6410
+static struct clk clk_i2s2 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.2",
+       .parent         = &clk_p,
+       .enable         = s3c64xx_pclk_ctrl,
+       .ctrlbit        = S3C6410_CLKCON_PCLK_IIS2,
+};
+#endif
+
 static struct clk init_clocks[] = {
        {
                .name           = "lcd",
@@ -668,6 +675,7 @@ static struct clksrc_sources clkset_audio1 = {
        .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
 };
 
+#ifdef CONFIG_CPU_S3C6410
 static struct clk *clkset_audio2_list[] = {
        [0] = &clk_mout_epll.clk,
        [1] = &clk_dout_mpll,
@@ -680,6 +688,7 @@ static struct clksrc_sources clkset_audio2 = {
        .sources        = clkset_audio2_list,
        .nr_sources     = ARRAY_SIZE(clkset_audio2_list),
 };
+#endif
 
 static struct clk *clkset_camif_list[] = {
        &clk_h2,
@@ -702,36 +711,6 @@ static struct clksrc_clk clksrcs[] = {
                .sources        = &clkset_uhost,
        }, {
                .clk    = {
-                       .name           = "audio-bus",
-                       .devname        = "samsung-i2s.0",
-                       .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
-                       .enable         = s3c64xx_sclk_ctrl,
-               },
-               .reg_src        = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3  },
-               .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4  },
-               .sources        = &clkset_audio0,
-       }, {
-               .clk    = {
-                       .name           = "audio-bus",
-                       .devname        = "samsung-i2s.1",
-                       .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
-                       .enable         = s3c64xx_sclk_ctrl,
-               },
-               .reg_src        = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3  },
-               .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4  },
-               .sources        = &clkset_audio1,
-       }, {
-               .clk    = {
-                       .name           = "audio-bus",
-                       .devname        = "samsung-i2s.2",
-                       .ctrlbit        = S3C6410_CLKCON_SCLK_AUDIO2,
-                       .enable         = s3c64xx_sclk_ctrl,
-               },
-               .reg_src        = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3  },
-               .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4  },
-               .sources        = &clkset_audio2,
-       }, {
-               .clk    = {
                        .name           = "irda-bus",
                        .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
                        .enable         = s3c64xx_sclk_ctrl,
@@ -823,6 +802,43 @@ static struct clksrc_clk clk_sclk_spi1 = {
        .sources = &clkset_spi_mmc,
 };
 
+static struct clksrc_clk clk_audio_bus0 = {
+       .clk    = {
+               .name           = "audio-bus",
+               .devname        = "samsung-i2s.0",
+               .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
+               .enable         = s3c64xx_sclk_ctrl,
+       },
+       .reg_src        = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3  },
+       .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4  },
+       .sources        = &clkset_audio0,
+};
+
+static struct clksrc_clk clk_audio_bus1 = {
+       .clk    = {
+               .name           = "audio-bus",
+               .devname        = "samsung-i2s.1",
+               .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
+               .enable         = s3c64xx_sclk_ctrl,
+       },
+       .reg_src        = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3  },
+       .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4  },
+       .sources        = &clkset_audio1,
+};
+
+#ifdef CONFIG_CPU_S3C6410
+static struct clksrc_clk clk_audio_bus2 = {
+       .clk    = {
+               .name           = "audio-bus",
+               .devname        = "samsung-i2s.2",
+               .ctrlbit        = S3C6410_CLKCON_SCLK_AUDIO2,
+               .enable         = s3c64xx_sclk_ctrl,
+       },
+       .reg_src        = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3  },
+       .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4  },
+       .sources        = &clkset_audio2,
+};
+#endif
 /* Clock initialisation code */
 
 static struct clksrc_clk *init_parents[] = {
@@ -838,6 +854,8 @@ static struct clksrc_clk *clksrc_cdev[] = {
        &clk_sclk_mmc2,
        &clk_sclk_spi0,
        &clk_sclk_spi1,
+       &clk_audio_bus0,
+       &clk_audio_bus1,
 };
 
 static struct clk *clk_cdev[] = {
@@ -846,6 +864,8 @@ static struct clk *clk_cdev[] = {
        &clk_hsmmc2,
        &clk_48m_spi0,
        &clk_48m_spi1,
+       &clk_i2s0,
+       &clk_i2s1,
 };
 
 static struct clk_lookup s3c64xx_clk_lookup[] = {
@@ -862,6 +882,14 @@ static struct clk_lookup s3c64xx_clk_lookup[] = {
        CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0),
        CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
        CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus0.clk),
+       CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
+       CLKDEV_INIT("samsung-i2s.1", "i2s_opclk1", &clk_audio_bus1.clk),
+#ifdef CONFIG_CPU_S3C6410
+       CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
+       CLKDEV_INIT("samsung-i2s.2", "i2s_opclk1", &clk_audio_bus2.clk),
+#endif
 };
 
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
arch/arm/mach-s3c64xx/dev-audio.c +0 -12
index 35f3e07..e367e87 100644
@@ -23,11 +23,6 @@
 #include <linux/platform_data/asoc-s3c.h>
 #include <plat/gpio-cfg.h>
 
-static const char *rclksrc[] = {
-       [0] = "iis",
-       [1] = "audio-bus",
-};
-
 static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev)
 {
        unsigned int base;
@@ -64,11 +59,6 @@ static struct resource s3c64xx_iis0_resource[] = {
 
 static struct s3c_audio_pdata i2sv3_pdata = {
        .cfg_gpio = s3c64xx_i2s_cfg_gpio,
-       .type = {
-               .i2s = {
-                       .src_clk = rclksrc,
-               },
-       },
 };
 
 struct platform_device s3c64xx_device_iis0 = {
@@ -110,7 +100,6 @@ static struct s3c_audio_pdata i2sv4_pdata = {
        .type = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN,
-                       .src_clk = rclksrc,
                },
        },
 };
--

1.7.4.4

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#3 lore raw

PATCH v3 2/5 ARM: S5PC100: Add I2S clkdev support

In reply to Padmavathi Venna

I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s5pc100/clock.c     |   48 +++++++++++++++++++++++--------------
 arch/arm/mach-s5pc100/dev-audio.c |   16 ------------
 2 files changed, 30 insertions(+), 34 deletions(-)
arch/arm/mach-s5pc100/clock.c +30 -18
index 9262197..a206dc3 100644
@@ -606,24 +606,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s5pc100_d1_4_ctrl,
 		.ctrlbit	= (1 << 13),
 	}, {
-		.name		= "iis",
-		.devname	= "samsung-i2s.0",
-		.parent		= &clk_div_pclkd1.clk,
-		.enable		= s5pc100_d1_5_ctrl,
-		.ctrlbit	= (1 << 0),
-	}, {
-		.name		= "iis",
-		.devname	= "samsung-i2s.1",
-		.parent		= &clk_div_pclkd1.clk,
-		.enable		= s5pc100_d1_5_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "iis",
-		.devname	= "samsung-i2s.2",
-		.parent		= &clk_div_pclkd1.clk,
-		.enable		= s5pc100_d1_5_ctrl,
-		.ctrlbit	= (1 << 2),
-	}, {
 		.name		= "ac97",
 		.parent		= &clk_div_pclkd1.clk,
 		.enable		= s5pc100_d1_5_ctrl,
@@ -724,6 +706,30 @@ static struct clk clk_48m_spi2 = {
 	.ctrlbit	= (1 << 9),
 };
 
+static struct clk clk_i2s0 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.0",
+	.parent		= &clk_div_pclkd1.clk,
+	.enable		= s5pc100_d1_5_ctrl,
+	.ctrlbit	= (1 << 0),
+};
+
+static struct clk clk_i2s1 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.1",
+	.parent		= &clk_div_pclkd1.clk,
+	.enable		= s5pc100_d1_5_ctrl,
+	.ctrlbit	= (1 << 1),
+};
+
+static struct clk clk_i2s2 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.2",
+	.parent		= &clk_div_pclkd1.clk,
+	.enable		= s5pc100_d1_5_ctrl,
+	.ctrlbit	= (1 << 2),
+};
+
 static struct clk clk_vclk54m = {
 	.name		= "vclk_54m",
 	.rate		= 54000000,
@@ -1154,6 +1160,9 @@ static struct clk *clk_cdev[] = {
 	&clk_48m_spi0,
 	&clk_48m_spi1,
 	&clk_48m_spi2,
+	&clk_i2s0,
+	&clk_i2s1,
+	&clk_i2s2,
 };
 
 static struct clksrc_clk *clksrc_cdev[] = {
@@ -1321,6 +1330,9 @@ static struct clk_lookup s5pc100_clk_lookup[] = {
 	CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
 	CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2),
 	CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
+	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+	CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
+	CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
 };
 
 void __init s5pc100_register_clocks(void)
arch/arm/mach-s5pc100/dev-audio.c +0 -16
index 1cc252c..46f488b 100644
@@ -39,18 +39,12 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev)
 	return 0;
 }
 
-static const char *rclksrc_v5[] = {
-	[0] = "iis",
-	[1] = "i2sclkd2",
-};
-
 static struct s3c_audio_pdata i2sv5_pdata = {
 	.cfg_gpio = s5pc100_cfg_i2s,
 	.type = {
 		.i2s = {
 			.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
 					 | QUIRK_NEED_RSTCLR,
-			.src_clk = rclksrc_v5,
 		},
 	},
 };
@@ -72,18 +66,8 @@ struct platform_device s5pc100_device_iis0 = {
 	},
 };
 
-static const char *rclksrc_v3[] = {
-	[0] = "iis",
-	[1] = "sclk_audio",
-};
-
 static struct s3c_audio_pdata i2sv3_pdata = {
 	.cfg_gpio = s5pc100_cfg_i2s,
-	.type = {
-		.i2s = {
-			.src_clk = rclksrc_v3,
-		},
-	},
 };
 
 static struct resource s5pc100_iis1_resource[] = {
Signature · 1 line
1.7.4.4
#4 lore raw

PATCH v3 2/5 ARM: S5PC100: Add I2S clkdev support

cc'ing Mark Brown.

Quoted 141 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s5pc100/clock.c     |   48 +++++++++++++++++++++++--------------
 arch/arm/mach-s5pc100/dev-audio.c |   16 ------------
 2 files changed, 30 insertions(+), 34 deletions(-)
arch/arm/mach-s5pc100/clock.c +30 -18
index 9262197..a206dc3 100644
@@ -606,24 +606,6 @@ static struct clk init_clocks_off[] = {
                .enable         = s5pc100_d1_4_ctrl,
                .ctrlbit        = (1 << 13),
        }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.0",
-               .parent         = &clk_div_pclkd1.clk,
-               .enable         = s5pc100_d1_5_ctrl,
-               .ctrlbit        = (1 << 0),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.1",
-               .parent         = &clk_div_pclkd1.clk,
-               .enable         = s5pc100_d1_5_ctrl,
-               .ctrlbit        = (1 << 1),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.2",
-               .parent         = &clk_div_pclkd1.clk,
-               .enable         = s5pc100_d1_5_ctrl,
-               .ctrlbit        = (1 << 2),
-       }, {
                .name           = "ac97",
                .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
@@ -724,6 +706,30 @@ static struct clk clk_48m_spi2 = {
        .ctrlbit        = (1 << 9),
 };
 
+static struct clk clk_i2s0 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.0",
+       .parent         = &clk_div_pclkd1.clk,
+       .enable         = s5pc100_d1_5_ctrl,
+       .ctrlbit        = (1 << 0),
+};
+
+static struct clk clk_i2s1 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.1",
+       .parent         = &clk_div_pclkd1.clk,
+       .enable         = s5pc100_d1_5_ctrl,
+       .ctrlbit        = (1 << 1),
+};
+
+static struct clk clk_i2s2 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.2",
+       .parent         = &clk_div_pclkd1.clk,
+       .enable         = s5pc100_d1_5_ctrl,
+       .ctrlbit        = (1 << 2),
+};
+
 static struct clk clk_vclk54m = {
        .name           = "vclk_54m",
        .rate           = 54000000,
@@ -1154,6 +1160,9 @@ static struct clk *clk_cdev[] = {
        &clk_48m_spi0,
        &clk_48m_spi1,
        &clk_48m_spi2,
+       &clk_i2s0,
+       &clk_i2s1,
+       &clk_i2s2,
 };
 
 static struct clksrc_clk *clksrc_cdev[] = {
@@ -1321,6 +1330,9 @@ static struct clk_lookup s5pc100_clk_lookup[] = {
        CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
        CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2),
        CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+       CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
+       CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
 };
 
 void __init s5pc100_register_clocks(void)
arch/arm/mach-s5pc100/dev-audio.c +0 -17
index 1cc252c..46f488b 100644
@@ -39,18 +39,12 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev)
        return 0;
 }
 
-static const char *rclksrc_v5[] = {
-       [0] = "iis",
-       [1] = "i2sclkd2",
-};
-
 static struct s3c_audio_pdata i2sv5_pdata = {
        .cfg_gpio = s5pc100_cfg_i2s,
        .type = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
                                         | QUIRK_NEED_RSTCLR,
-                       .src_clk = rclksrc_v5,
                },
        },
 };
@@ -72,18 +66,8 @@ struct platform_device s5pc100_device_iis0 = {
        },
 };
 
-static const char *rclksrc_v3[] = {
-       [0] = "iis",
-       [1] = "sclk_audio",
-};
-
 static struct s3c_audio_pdata i2sv3_pdata = {
        .cfg_gpio = s5pc100_cfg_i2s,
-       .type = {
-               .i2s = {
-                       .src_clk = rclksrc_v3,
-               },
-       },
 };
 
 static struct resource s5pc100_iis1_resource[] = {
--

1.7.4.4

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#5 lore raw

PATCH v3 3/5 ARM: S5P64x0: Add I2S clkdev support

In reply to Padmavathi Venna

I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   49 ++++++++++++++++++---------
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   61 ++++++++++++++++++++++----------
 arch/arm/mach-s5p64x0/dev-audio.c     |   12 ------
 3 files changed, 75 insertions(+), 47 deletions(-)
arch/arm/mach-s5p64x0/clock-s5p6440.c +33 -16
index 0004455..5112371 100644
@@ -243,12 +243,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s5p64x0_pclk_ctrl,
 		.ctrlbit	= (1 << 25),
 	}, {
-		.name		= "iis",
-		.devname	= "samsung-i2s.0",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 26),
-	}, {
 		.name		= "dsim",
 		.parent		= &clk_pclk_low.clk,
 		.enable		= s5p64x0_pclk_ctrl,
@@ -405,15 +399,6 @@ static struct clksrc_clk clksrcs[] = {
 		.sources = &clkset_group1,
 		.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
 		.reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_audio2",
-			.ctrlbit	= (1 << 11),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_audio,
-		.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
 	},
 };
 
@@ -464,6 +449,26 @@ static struct clksrc_clk clk_sclk_uclk = {
 	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 };
 
+static struct clk clk_i2s0 = {
+	.name		= "iis",
+	.devname	= "samsung-i2s.0",
+	.parent		= &clk_pclk_low.clk,
+	.enable		= s5p64x0_pclk_ctrl,
+	.ctrlbit	= (1 << 26),
+};
+
+static struct clksrc_clk clk_audio_bus2 = {
+	.clk	= {
+		.name		= "sclk_audio2",
+		.devname	= "samsung-i2s.0",
+		.ctrlbit	= (1 << 11),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_audio,
+	.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
+};
+
 static struct clksrc_clk clk_sclk_spi0 = {
 	.clk	= {
 		.name		= "sclk_spi",
@@ -506,13 +511,18 @@ static struct clk dummy_apb_pclk = {
 	.id		= -1,
 };
 
+static struct clk *clk_cdev[] = {
+	&clk_i2s0,
+};
+
 static struct clksrc_clk *clksrc_cdev[] = {
 	&clk_sclk_uclk,
 	&clk_sclk_spi0,
 	&clk_sclk_spi1,
 	&clk_sclk_mmc0,
 	&clk_sclk_mmc1,
-	&clk_sclk_mmc2
+	&clk_sclk_mmc2,
+	&clk_audio_bus2,
 };
 
 static struct clk_lookup s5p6440_clk_lookup[] = {
@@ -524,6 +534,8 @@ static struct clk_lookup s5p6440_clk_lookup[] = {
 	CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
 	CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
 	CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk),
 };
 
 void __init_or_cpufreq s5p6440_setup_clocks(void)
@@ -596,12 +608,17 @@ static struct clk *clks[] __initdata = {
 void __init s5p6440_register_clocks(void)
 {
 	int ptr;
+	unsigned int cnt;
 
 	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
 	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
+	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+	for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
+		s3c_disable_clocks(clk_cdev[cnt], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
arch/arm/mach-s5p64x0/clock-s5p6450.c +42 -19

107 lines not on this page · raw message

arch/arm/mach-s5p64x0/dev-audio.c +0 -12
index a0d6edf..723d477 100644
@@ -19,11 +19,6 @@
 #include <mach/dma.h>
 #include <mach/irqs.h>
 
-static const char *rclksrc[] = {
-	[0] = "iis",
-	[1] = "sclk_audio2",
-};
-
 static int s5p6440_cfg_i2s(struct platform_device *pdev)
 {
 	switch (pdev->id) {
@@ -45,7 +40,6 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = {
 	.type = {
 		.i2s = {
 			.quirks = QUIRK_PRI_6CHAN,
-			.src_clk = rclksrc,
 		},
 	},
 };
@@ -93,7 +87,6 @@ static struct s3c_audio_pdata s5p6450_i2s0_pdata = {
 	.type = {
 		.i2s = {
 			.quirks = QUIRK_PRI_6CHAN,
-			.src_clk = rclksrc,
 		},
 	},
 };
@@ -110,11 +103,6 @@ struct platform_device s5p6450_device_iis0 = {
 
 static struct s3c_audio_pdata s5p6450_i2s_pdata = {
 	.cfg_gpio = s5p6450_cfg_i2s,
-	.type = {
-		.i2s = {
-			.src_clk = rclksrc,
-		},
-	},
 };
 
 static struct resource s5p6450_i2s1_resource[] = {
Signature · 1 line
1.7.4.4
#6 lore raw

PATCH v3 3/5 ARM: S5P64x0: Add I2S clkdev support

cc'ing Mark Brown

Quoted 289 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clk. The list of source clk names were passed through platform data in non-dt case. Register the existing RCLK source clocks with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   49 ++++++++++++++++++---------
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   61 ++++++++++++++++++++++----------
 arch/arm/mach-s5p64x0/dev-audio.c     |   12 ------
 3 files changed, 75 insertions(+), 47 deletions(-)
arch/arm/mach-s5p64x0/clock-s5p6440.c +33 -16
index 0004455..5112371 100644
@@ -243,12 +243,6 @@ static struct clk init_clocks_off[] = {
                .enable         = s5p64x0_pclk_ctrl,
                .ctrlbit        = (1 << 25),
        }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.0",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 26),
-       }, {
                .name           = "dsim",
                .parent         = &clk_pclk_low.clk,
                .enable         = s5p64x0_pclk_ctrl,
@@ -405,15 +399,6 @@ static struct clksrc_clk clksrcs[] = {
                .sources = &clkset_group1,
                .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
                .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
-       }, {
-               .clk    = {
-                       .name           = "sclk_audio2",
-                       .ctrlbit        = (1 << 11),
-                       .enable         = s5p64x0_sclk_ctrl,
-               },
-               .sources = &clkset_audio,
-               .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
-               .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
        },
 };
 
@@ -464,6 +449,26 @@ static struct clksrc_clk clk_sclk_uclk = {
        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 };
 
+static struct clk clk_i2s0 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.0",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 26),
+};
+
+static struct clksrc_clk clk_audio_bus2 = {
+       .clk    = {
+               .name           = "sclk_audio2",
+               .devname        = "samsung-i2s.0",
+               .ctrlbit        = (1 << 11),
+               .enable         = s5p64x0_sclk_ctrl,
+       },
+       .sources = &clkset_audio,
+       .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
+       .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
+};
+
 static struct clksrc_clk clk_sclk_spi0 = {
        .clk    = {
                .name           = "sclk_spi",
@@ -506,13 +511,18 @@ static struct clk dummy_apb_pclk = {
        .id             = -1,
 };
 
+static struct clk *clk_cdev[] = {
+       &clk_i2s0,
+};
+
 static struct clksrc_clk *clksrc_cdev[] = {
        &clk_sclk_uclk,
        &clk_sclk_spi0,
        &clk_sclk_spi1,
        &clk_sclk_mmc0,
        &clk_sclk_mmc1,
-       &clk_sclk_mmc2
+       &clk_sclk_mmc2,
+       &clk_audio_bus2,
 };
 
 static struct clk_lookup s5p6440_clk_lookup[] = {
@@ -524,6 +534,8 @@ static struct clk_lookup s5p6440_clk_lookup[] = {
        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk),
 };
 
 void __init_or_cpufreq s5p6440_setup_clocks(void)
@@ -596,12 +608,17 @@ static struct clk *clks[] __initdata = {
 void __init s5p6440_register_clocks(void)
 {
        int ptr;
+       unsigned int cnt;
 
        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
        for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
                s3c_register_clksrc(sysclks[ptr], 1);
 
+       s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+       for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
+               s3c_disable_clocks(clk_cdev[cnt], 1);
+
        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
arch/arm/mach-s5p64x0/clock-s5p6450.c +42 -19
index f3e0ef3..154dea7 100644
@@ -247,24 +247,6 @@ static struct clk init_clocks_off[] = {
                .enable         = s5p64x0_pclk_ctrl,
                .ctrlbit        = (1 << 22),
        }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.0",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 26),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.1",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 15),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.2",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 16),
-       }, {
                .name           = "i2c",
                .devname        = "s3c2440-i2c.1",
                .parent         = &clk_pclk_low.clk,
@@ -402,6 +384,7 @@ static struct clksrc_sources clkset_sclk_audio0 = {
 static struct clksrc_clk clk_sclk_audio0 = {
        .clk            = {
                .name           = "audio-bus",
+               .devname        = "samsung-i2s.0",
                .enable         = s5p64x0_sclk_ctrl,
                .ctrlbit        = (1 << 8),
                .parent         = &clk_dout_epll.clk,
@@ -549,6 +532,36 @@ static struct clksrc_clk clk_sclk_spi1 = {
        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
 };
 
+static struct clk clk_i2s0 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.0",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 26),
+};
+
+static struct clk clk_i2s1 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.1",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 15),
+};
+
+static struct clk clk_i2s2 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.2",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 16),
+};
+
+static struct clk *clk_cdev[] = {
+       &clk_i2s0,
+       &clk_i2s1,
+       &clk_i2s2,
+};
+
 static struct clksrc_clk *clksrc_cdev[] = {
        &clk_sclk_uclk,
        &clk_sclk_spi0,
@@ -556,6 +569,7 @@ static struct clksrc_clk *clksrc_cdev[] = {
        &clk_sclk_mmc0,
        &clk_sclk_mmc1,
        &clk_sclk_mmc2,
+       &clk_sclk_audio0,
 };
 
 static struct clk_lookup s5p6450_clk_lookup[] = {
@@ -567,6 +581,10 @@ static struct clk_lookup s5p6450_clk_lookup[] = {
        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk),
+       CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
+       CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
 };
 
 /* Clock initialization code */
@@ -584,7 +602,6 @@ static struct clksrc_clk *sysclks[] = {
        &clk_pclk,
        &clk_hclk_low,
        &clk_pclk_low,
-       &clk_sclk_audio0,
 };
 
 static struct clk dummy_apb_pclk = {
@@ -661,10 +678,16 @@ void __init_or_cpufreq s5p6450_setup_clocks(void)
 void __init s5p6450_register_clocks(void)
 {
        int ptr;
+       unsigned int cnt;
 
        for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
                s3c_register_clksrc(sysclks[ptr], 1);
 
+
+       s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+       for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
+               s3c_disable_clocks(clk_cdev[cnt], 1);
+
        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
arch/arm/mach-s5p64x0/dev-audio.c +0 -13
index a0d6edf..723d477 100644
@@ -19,11 +19,6 @@
 #include <mach/dma.h>
 #include <mach/irqs.h>
 
-static const char *rclksrc[] = {
-       [0] = "iis",
-       [1] = "sclk_audio2",
-};
-
 static int s5p6440_cfg_i2s(struct platform_device *pdev)
 {
        switch (pdev->id) {
@@ -45,7 +40,6 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = {
        .type = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN,
-                       .src_clk = rclksrc,
                },
        },
 };
@@ -93,7 +87,6 @@ static struct s3c_audio_pdata s5p6450_i2s0_pdata = {
        .type = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN,
-                       .src_clk = rclksrc,
                },
        },
 };
@@ -110,11 +103,6 @@ struct platform_device s5p6450_device_iis0 = {
 
 static struct s3c_audio_pdata s5p6450_i2s_pdata = {
        .cfg_gpio = s5p6450_cfg_i2s,
-       .type = {
-               .i2s = {
-                       .src_clk = rclksrc,
-               },
-       },
 };
 
 static struct resource s5p6450_i2s1_resource[] = {
--

1.7.4.4

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#7 lore raw

PATCH v3 4/5 ARM: S5PV210: Avoid passing the clks through platform data

In reply to Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s5pv210/dev-audio.c |   16 ----------------
 1 files changed, 0 insertions(+), 16 deletions(-)
arch/arm/mach-s5pv210/dev-audio.c +0 -16
index 0a5480b..addfb16 100644
@@ -20,11 +20,6 @@
 #include <mach/irqs.h>
 #include <mach/regs-audss.h>
 
-static const char *rclksrc[] = {
-	[0] = "busclk",
-	[1] = "i2sclk",
-};
-
 static int s5pv210_cfg_i2s(struct platform_device *pdev)
 {
 	/* configure GPIO for i2s port */
@@ -52,7 +47,6 @@ static struct s3c_audio_pdata i2sv5_pdata = {
 		.i2s = {
 			.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
 					 | QUIRK_NEED_RSTCLR,
-			.src_clk = rclksrc,
 			.idma_addr = S5PV210_AUDSS_INT_MEM,
 		},
 	},
@@ -75,18 +69,8 @@ struct platform_device s5pv210_device_iis0 = {
 	},
 };
 
-static const char *rclksrc_v3[] = {
-	[0] = "iis",
-	[1] = "audio-bus",
-};
-
 static struct s3c_audio_pdata i2sv3_pdata = {
 	.cfg_gpio = s5pv210_cfg_i2s,
-	.type = {
-		.i2s = {
-			.src_clk = rclksrc_v3,
-		},
-	},
 };
 
 static struct resource s5pv210_iis1_resource[] = {
Signature · 1 line
1.7.4.4
#8 lore raw

PATCH v3 4/5 ARM: S5PV210: Avoid passing the clks through platform data

cc'ing Mark Brown.

Quoted 62 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-s5pv210/dev-audio.c |   16 ----------------
 1 files changed, 0 insertions(+), 16 deletions(-)
arch/arm/mach-s5pv210/dev-audio.c +0 -17
index 0a5480b..addfb16 100644
@@ -20,11 +20,6 @@
 #include <mach/irqs.h>
 #include <mach/regs-audss.h>
 
-static const char *rclksrc[] = {
-       [0] = "busclk",
-       [1] = "i2sclk",
-};
-
 static int s5pv210_cfg_i2s(struct platform_device *pdev)
 {
        /* configure GPIO for i2s port */
@@ -52,7 +47,6 @@ static struct s3c_audio_pdata i2sv5_pdata = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
                                         | QUIRK_NEED_RSTCLR,
-                       .src_clk = rclksrc,
                        .idma_addr = S5PV210_AUDSS_INT_MEM,
                },
        },
@@ -75,18 +69,8 @@ struct platform_device s5pv210_device_iis0 = {
        },
 };
 
-static const char *rclksrc_v3[] = {
-       [0] = "iis",
-       [1] = "audio-bus",
-};
-
 static struct s3c_audio_pdata i2sv3_pdata = {
        .cfg_gpio = s5pv210_cfg_i2s,
-       .type = {
-               .i2s = {
-                       .src_clk = rclksrc_v3,
-               },
-       },
 };
 
 static struct resource s5pv210_iis1_resource[] = {
--

1.7.4.4

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#9 lore raw

PATCH v3 5/5 ARM: Exynos: Avoid passing the clks through platform data

In reply to Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-exynos/dev-audio.c |   12 ------------
 1 files changed, 0 insertions(+), 12 deletions(-)
arch/arm/mach-exynos/dev-audio.c +0 -12
index ae321c7..e7d46fd 100644
@@ -23,11 +23,6 @@
 #include <mach/irqs.h>
 #include <mach/regs-audss.h>
 
-static const char *rclksrc[] = {
-	[0] = "busclk",
-	[1] = "i2sclk",
-};
-
 static int exynos4_cfg_i2s(struct platform_device *pdev)
 {
 	/* configure GPIO for i2s port */
@@ -55,7 +50,6 @@ static struct s3c_audio_pdata i2sv5_pdata = {
 		.i2s = {
 			.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
 					 | QUIRK_NEED_RSTCLR,
-			.src_clk = rclksrc,
 			.idma_addr = EXYNOS4_AUDSS_INT_MEM,
 		},
 	},
@@ -78,17 +72,11 @@ struct platform_device exynos4_device_i2s0 = {
 	},
 };
 
-static const char *rclksrc_v3[] = {
-	[0] = "sclk_i2s",
-	[1] = "no_such_clock",
-};
-
 static struct s3c_audio_pdata i2sv3_pdata = {
 	.cfg_gpio = exynos4_cfg_i2s,
 	.type = {
 		.i2s = {
 			.quirks = QUIRK_NO_MUXPSR,
-			.src_clk = rclksrc_v3,
 		},
 	},
 };
Signature · 1 line
1.7.4.4
#10 lore raw

PATCH v3 5/5 ARM: Exynos: Avoid passing the clks through platform data

cc'ing Mark Brown.

Quoted 61 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

---
 arch/arm/mach-exynos/dev-audio.c |   12 ------------
 1 files changed, 0 insertions(+), 12 deletions(-)
arch/arm/mach-exynos/dev-audio.c +0 -13
index ae321c7..e7d46fd 100644
@@ -23,11 +23,6 @@
 #include <mach/irqs.h>
 #include <mach/regs-audss.h>
 
-static const char *rclksrc[] = {
-       [0] = "busclk",
-       [1] = "i2sclk",
-};
-
 static int exynos4_cfg_i2s(struct platform_device *pdev)
 {
        /* configure GPIO for i2s port */
@@ -55,7 +50,6 @@ static struct s3c_audio_pdata i2sv5_pdata = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
                                         | QUIRK_NEED_RSTCLR,
-                       .src_clk = rclksrc,
                        .idma_addr = EXYNOS4_AUDSS_INT_MEM,
                },
        },
@@ -78,17 +72,11 @@ struct platform_device exynos4_device_i2s0 = {
        },
 };
 
-static const char *rclksrc_v3[] = {
-       [0] = "sclk_i2s",
-       [1] = "no_such_clock",
-};
-
 static struct s3c_audio_pdata i2sv3_pdata = {
        .cfg_gpio = exynos4_cfg_i2s,
        .type = {
                .i2s = {
                        .quirks = QUIRK_NO_MUXPSR,
-                       .src_clk = rclksrc_v3,
                },
        },
 };
--

1.7.4.4

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#11 lore raw

v3 cover Avoid passing clks through platform data

In reply to Padmavathi Venna
Quoted 14 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

In the below series of patches, registered the existed clks with clkdev using generic connection id and removed the variable which holds those clk names. This is done for s3c64xx,s5pc100,s5p64x0, s5pv210 and exynos4 series. But tested the sound card detection only on smdk6410 board. On remaining all platforms it was just build tested.

Quoted 6 lines

Padmavathi Venna (5):
ARM: S3C64XX: Add I2S clkdev support
ARM: S5PC100: Add I2S clkdev support
ARM: S5P64x0: Add I2S clkdev support
ARM: S5PV210: Avoid passing the clks through platform data
ARM: Exynos: Avoid passing the clks through platform data

As I2S driver is changed for support DT,
These patch series should be applied.
Adding ack all patches.

Thanks,
Sangbeom.

#12 lore raw

v3 cover Avoid passing clks through platform data

Quoted 24 lines · Sangbeom Kim
Quoted 14 lines · Padmavathi Venna

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

In the below series of patches, registered the existed clks with clkdev using generic connection id and removed the variable which holds those clk names. This is done for s3c64xx,s5pc100,s5p64x0, s5pv210 and exynos4 series. But tested the sound card detection only on smdk6410 board. On remaining all platforms it was just build tested.

Quoted 6 lines

Padmavathi Venna (5):
ARM: S3C64XX: Add I2S clkdev support
ARM: S5PC100: Add I2S clkdev support
ARM: S5P64x0: Add I2S clkdev support
ARM: S5PV210: Avoid passing the clks through platform data
ARM: Exynos: Avoid passing the clks through platform data

Quoted 6 lines

As I2S driver is changed for support DT,
These patch series should be applied.
Adding ack all patches.

Looks OK to me, will apply, thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

#13 lore raw

v3 cover Avoid passing clks through platform data

In reply to Padmavathi Venna

cc'ing Mark Brown.

Quoted 42 lines · Padmavathi Venna

Changes since v2:
- Rebased on 3.7-rc3

I2S controller has an internal mux for RCLK source clks. The list of source clk names were passed through platform data in non-dt case. The variable holding the list of RCLK source clk names is not required, as the list of clks need to be registered with clkdev using generic connection id. This is required as part of adding DT support for I2S controller driver.

In the below series of patches, registered the existed clks with clkdev using generic connection id and removed the variable which holds those clk names. This is done for s3c64xx,s5pc100,s5p64x0, s5pv210 and exynos4 series. But tested the sound card detection only on smdk6410 board. On remaining all platforms it was just build tested.

Padmavathi Venna (5):
ARM: S3C64XX: Add I2S clkdev support
ARM: S5PC100: Add I2S clkdev support
ARM: S5P64x0: Add I2S clkdev support
ARM: S5PV210: Avoid passing the clks through platform data
ARM: Exynos: Avoid passing the clks through platform data

 arch/arm/mach-exynos/dev-audio.c      |   12 ---
 arch/arm/mach-s3c64xx/clock.c         |  126 ++++++++++++++++++++-------------
 arch/arm/mach-s3c64xx/dev-audio.c     |   11 ---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   49 +++++++++----
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   61 +++++++++++-----
 arch/arm/mach-s5p64x0/dev-audio.c     |   12 ---
 arch/arm/mach-s5pc100/clock.c         |   48 ++++++++-----
 arch/arm/mach-s5pc100/dev-audio.c     |   16 ----
 arch/arm/mach-s5pv210/dev-audio.c     |   16 ----
 9 files changed, 182 insertions(+), 169 deletions(-)

--
1.7.4.4

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#14 lore raw

v3 cover Avoid passing clks through platform data

Quoted 5 lines · Padma Venkat

cc'ing Mark Brown.

Quoted 2 lines · Padmavathi Venna

Changes since v2:
- Rebased on 3.7-rc3

Please don't do this, send the patches non-quoted.
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#15 lore raw

v3 cover Avoid passing clks through platform data

Quoted 10 lines · Mark Brown
Quoted 3 lines · Padma Venkat

cc'ing Mark Brown.

On Tue, Nov 6, 2012 at 10:18 AM, Padmavathi Venna <[email protected]>

Quoted 2 lines · wrote:
Quoted 2 lines

Changes since v2:
- Rebased on 3.7-rc3

Please don't do this, send the patches non-quoted.

And it can make a confusion if there is no any explanation...

Note, I applied following arch/arm/ Samsung stuff for audio with Sangbeom's ack:-)

Padmavathi Venna (9):
ARM: EXYNOS: Add clocks for EXYNOS5 Audio Subsystem
ARM: dts: Add nodes for i2s controllers for Samsung EXYNOS5 platforms
ARM: EXYNOS: Enable platform support for I2S controllers
ARM: S3C64XX: Add I2S clkdev support
ARM: S5PC100: Add I2S clkdev support
ARM: S5P64X0: Add I2S clkdev support
ARM: S5PV210: Avoid passing the clks through platform data
ARM: EXYNOS: Avoid passing the clks through platform data
ARM: SAMSUNG: Delete the unnecessary variable

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.