x86: Allow excluding reset vector code from u-boot
PATCH v4 2/9 x86: Allow excluding reset vector code from u-boot
From: Gabe Black <[email protected]>
When running from coreboot we don't want this code.
This version works by ifdef-ing out all of the code that would go into those sections and all the code that refers to it. The sections are then empty, and the linker will either leave them empty for the loader to ignore or remove them entirely.
---
Changes in v4:
- Use CONFIG_SYS_X86_RESET_VECTOR instead CONFIG_NO_RESET_CODE
- Add note about CONFIG_SYS_X86_RESET_VECTOR to README
Changes in v3:
- Fix incorrect repeated line in Makefile
Changes in v2:
- Put CONFIG_NO_RESET_CODE into Makefile instead of source files
Makefile | 8 +++----- README | 4 ++++ arch/x86/cpu/Makefile | 5 +++-- arch/x86/cpu/u-boot.lds | 3 +++ include/configs/coreboot.h | 2 ++ include/configs/eNET.h | 3 +++ 6 files changed, 18 insertions(+), 7 deletions(-)
Makefile +3 -5
@@ -230,10 +230,8 @@ endif # U-Boot objects....order is important (i.e. start must be first) OBJS = $(CPUDIR)/start.o -ifeq ($(CPU),x86) -OBJS += $(CPUDIR)/start16.o -OBJS += $(CPUDIR)/resetvec.o -endif +OBJS-$(CONFIG_SYS_X86_RESET_VECTOR) += $(CPUDIR)/start16.o +OBJS-$(CONFIG_SYS_X86_RESET_VECTOR) += $(CPUDIR)/resetvec.o ifeq ($(CPU),ppc4xx) OBJS += $(CPUDIR)/resetvec.o endif
@@ -241,7 +239,7 @@ ifeq ($(CPU),mpc85xx) OBJS += $(CPUDIR)/resetvec.o endif -OBJS := $(addprefix $(obj),$(OBJS)) +OBJS := $(addprefix $(obj),$(OBJS) $(OBJS-y)) HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n)
README +4 -0
@@ -3621,6 +3621,10 @@ Low Level (hardware related) configuration options: be used if available. These functions may be faster under some conditions but may increase the binary size. +- CONFIG_SYS_X86_RESET_VECTOR + If defined, the x86 reset vector code is included. When + running from Coreboot this is not needed. + Freescale QE/FMAN Firmware Support: -----------------------------------
arch/x86/cpu/Makefile +3 -2
@@ -28,12 +28,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).o -START = start.o start16.o resetvec.o +START-y = start.o +START-$(CONFIG_SYS_X86_RESET_VECTOR) += resetvec.o start16.o COBJS = interrupts.o cpu.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -START := $(addprefix $(obj),$(START)) +START := $(addprefix $(obj),$(START-y)) all: $(obj).depend $(START) $(LIB)
arch/x86/cpu/u-boot.lds +3 -0
@@ -86,6 +86,8 @@ SECTIONS __bios_start = LOADADDR(.bios); __bios_size = SIZEOF(.bios); +#ifndef CONFIG_NO_RESET_CODE + /* * The following expressions place the 16-bit Real-Mode code and * Reset Vector at the end of the Flash ROM
@@ -95,4 +97,5 @@ SECTIONS . = RESET_VEC_LOC; .resetvec : AT (CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE + RESET_VEC_LOC)) { KEEP(*(.resetvec)); } +#endif }
include/configs/coreboot.h +2 -0
@@ -38,6 +38,8 @@#undef CONFIG_SHOW_BOOT_PROGRESS#define CONFIG_LAST_STAGE_INIT +/* Define this for now, will be removed in a later patch */ +#define CONFIG_SYS_X86_RESET_VECTOR /*----------------------------------------------------------------------- * Watchdog Configuration
include/configs/eNET.h +3 -0
@@ -38,6 +38,9 @@#define CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT +/* Not running from Coreboot, so we need the reset vector code */ +#define CONFIG_SYS_X86_RESET_VECTOR +/*----------------------------------------------------------------------- * Watchdog Configuration * NOTE: If CONFIG_HW_WATCHDOG is NOT defined, the watchdog jumper on the
Signature · 1 line
1.7.7.3
PATCH v4 8/9 x86: Remove coreboot start16 code
Now that coreboot doesn't need the start16 code, remove it. We need to remove the CONFIG_SYS_X86_RESET_VECTOR option from coreboot.h also.
---
Changes in v4:
- Remove CONFIG_SYS_X86_RESET_VECTOR from coreboot.h
Changes in v3: None
Changes in v2:
- Add new patch to remove coreboot start16 code.
board/chromebook-x86/coreboot/coreboot_start16.S | 13 ------------- include/configs/coreboot.h | 3 --- 2 files changed, 0 insertions(+), 16 deletions(-)
board/chromebook-x86/coreboot/coreboot_start16.S +0 -13
@@ -22,19 +22,6 @@ * MA 02111-1307 USA */ -/* - * 16bit initialization code. - * This code have to map the area of the boot flash - * that is used by U-boot to its final destination. - */ - -.text -.section .start16, "ax" -.code16 -.globl board_init16 -board_init16: - jmp board_init16_ret - .section .bios, "ax" .code16 .globl realmode_reset
include/configs/coreboot.h +0 -3
@@ -38,9 +38,6 @@#undef CONFIG_SHOW_BOOT_PROGRESS#define CONFIG_LAST_STAGE_INIT -/* Define this for now, will be removed in a later patch */ -#define CONFIG_SYS_X86_RESET_VECTOR -/*----------------------------------------------------------------------- * Watchdog Configuration */
Signature · 1 line
1.7.7.3
PATCH v4 9/9 x86: coreboot: Enable LPC TPM
In reply to Simon GlassCoreboot boards have an LPC TPM connected, so enable this.
---
Changes in v4:
- Remove CONFIG_NO_RESET_CODE from coreboot.h since this is not needed
Changes in v3: None
Changes in v2: None
include/configs/coreboot.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
include/configs/coreboot.h +4 -0
@@ -66,6 +66,10 @@ CONFIG_SYS_SCSI_MAX_LUN)#endif +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 +/*----------------------------------------------------------------------- * Real Time Clock Configuration */
Signature · 1 line
1.7.7.3
PATCH v4 9/9 x86: coreboot: Enable LPC TPM
Dear Simon Glass,
Quoted 18 lines
Coreboot boards have an LPC TPM connected, so enable this.
Signed-off-by Simon Glass <[email protected]>---
Changes in v4:
- RemoveCONFIG_NO_RESET_CODEfromcoreboot.hsince this is not neededChanges in v3: None
Changes in v2: Noneinclude/configs/coreboot.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)include/configs/coreboot.h +0
-0
include/configs/coreboot.h line 75
Quoted 10 lines
include/configs/coreboot.h +4
-0@@ -66,6 +66,10 @@ CONFIG_SYS_SCSI_MAX_LUN)#endif +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 +/*----------------------------------------------------------------------- * Real Time Clock Configuration */
Good, so now we have LPC enabled, problem solved then ?
Best regards,
Marek Vasut
PATCH v4 2/9 x86: Allow excluding reset vector code from u-boot
In reply to Simon GlassDear Simon Glass,
Quoted 8 lines · In message <[email protected]> you wrote:
From: Gabe Black <[email protected]>
When running from coreboot we don't want this code.
This version works by ifdef-ing out all of the code that would go into those sections and all the code that refers to it. The sections are then empty, and the linker will either leave them empty for the loader to ignore or remove them entirely.
Hm.... as is, this requires that we define CONFIG_SYS_X86_RESET_VECTOR in all x86 board config files, just because a single board configuration does not need this? This makes no sense. Please invert the logic.
Best regards,
Wolfgang Denk
Signature · 6 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"The question of whether a computer can think is no more interesting
than the question of whether a submarine can swim"
- Edsgar W. DijkstraPATCH v4 2/9 x86: Allow excluding reset vector code from u-boot
Hi Wolfgang,
Quoted 12 lines · Wolfgang Denk
Dear Simon Glass,
Quoted 8 lines · In message <[email protected]> you wrote:
From: Gabe Black <[email protected]>
When running from coreboot we don't want this code.
This version works by ifdef-ing out all of the code that would go into those sections and all the code that refers to it. The sections are then empty, and the linker will either leave them empty for the loader to ignore or remove them entirely.
Quoted 4 lines
Hm.... as is, this requires that we define
CONFIG_SYS_X86_RESET_VECTORin all x86 board config files, just because a single board configuration does not need this? This makes no sense. Please invert the logic.
That was how the previous patch worked (CONFIG_NO_RESET_CODE). If required the ifneq in the Makefile though, which you objected to. Or is there another way?
Also Graeme mentioned that all x86 boards will soon use Coreboot, so the option (and the code) may in fact be removed one day. That's why I was happy enough to invert it.
There are actually only 2 boards, enet and coreboot.
Regards,
Simon
Quoted 12 lines
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "The question of whether a computer can think is no more interesting than the question of whether a submarine can swim"
- Edsgar W. Dijkstra
PATCH v4 2/9 x86: Allow excluding reset vector code from u-boot
Dear Simon Glass,
Quoted 9 lines · In message <CAPnjgZ3uhFKvsCV3Z2p0ynhvjGTNQmEUZ2CAg6cGA1AeU1AZ-A@mail.gmail.com>…
Quoted 5 lines
Hm.... as is, this requires that we define
CONFIG_SYS_X86_RESET_VECTORin all x86 board config files, just because a single board configuration does not need this? This makes no sense. Please invert the logic.That was how the previous patch worked (
CONFIG_NO_RESET_CODE). If required the ifneq in theMakefilethough, which you objected to. Or is there another way?
As usual, there are a number of ways.
Option 1: Define CONFIG_SYS_X86_RESET_VECTOR in a common header file,
so that you can #undef it in a board config file which does not want / need this. This is functionally equivalent with your current patch, but you have to care about thgis settingonly in the files where it is actually interesting.
Option 2: use logig similar to the OBJ-y=... in the Makefile, just
inverted. I know there are examples for this, but I'm too lazu at the moment to search.
Quoted 5 lines
Also Graeme mentioned that all x86 boards will soon use Coreboot, so the option (and the code) may in fact be removed one day. That's why I was happy enough to invert it.
There are actually only 2 boards, enet and coreboot.
Maybe, but the approach is wrong even for a single board.
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Committee, n.: A group of men who individually can do nothing but as a group decide that nothing can be done. - Fred Allen