ARM/SPI: New driver for SPI master controller for CLPS711X-target
PATCH RESEND 1/1 ARM/SPI: New driver for SPI master controller for CLPS711X-target
This patch add new driver for CLPS711X SPI master controller. Due to platform limitations driver supports only 8 bit transfer mode. Chip select control is handled via GPIO.
--- drivers/spi/Kconfig | 7 + drivers/spi/Makefile | 1 + drivers/spi/spi-clps711x.c | 296 ++++++++++++++++++++++++++++ include/linux/platform_data/spi-clps711x.h | 21 ++ 4 files changed, 325 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/spi-clps711x.c create mode 100644 include/linux/platform_data/spi-clps711x.h
drivers/spi/Kconfig +7 -0
@@ -123,6 +123,13 @@ config SPI_BUTTERFLY inexpensive battery powered microcontroller evaluation board. This same cable can be used to flash new firmware. +config SPI_CLPS711X + tristate "CLPS711X host SPI controller" + depends on ARCH_CLPS711X + help + This enables dedicated general purpose SPI/Microwire1-compatible + master mode interface (SSI1) for CLPS711X-based CPUs. + config SPI_COLDFIRE_QSPI tristate "Freescale Coldfire QSPI controller" depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
drivers/spi/Makefile +1 -0
@@ -19,6 +19,7 @@ obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o +obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o
drivers/spi/spi-clps711x.c new file +296 -0
296 lines not on this page · raw message
include/linux/platform_data/spi-clps711x.h new file +21 -0
@@ -0,0 +1,21 @@ +/* +* CLPS711X SPI bus driver definitions +* +* Copyright (C) 2012 Alexander Shiyan <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +*/ + +#ifndef ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H +#define ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H + +/* Board specific platform_data */ +struct spi_clps711x_pdata { +int *chipselect;/* Array of GPIO-numbers */ +int num_chipselect;/* Total count of GPIOs */ +}; + +#endif
Signature · 1 line
1.7.8.6
PATCH RESEND 1/1 ARM/SPI: New driver for SPI master controller for CLPS711X-target
Quoted 5 lines · Alexander Shiyan
This patch add new driver for CLPS711X SPI master controller. Due to platform limitations driver supports only 8 bit transfer mode. Chip select control is handled via GPIO.
Signed-off-by Alexander Shiyan <[email protected]>
PATCH RESEND 1/1 ARM/SPI: New driver for SPI master controller for CLPS711X-target
Quoted 9 lines · On Mon, 12 Nov 2012 21:43:34 +0000 Arnd Bergmann <[email protected]> wrote:
Quoted 5 lines · Alexander Shiyan
This patch add new driver for CLPS711X SPI master controller. Due to platform limitations driver supports only 8 bit transfer mode. Chip select control is handled via GPIO.
Signed-off-by Alexander Shiyan <[email protected]>Acked-by Arnd Bergmann <[email protected]>
Please apply this patch in the SPI tree.
Signature · 1 line
Alexander Shiyan <[email protected]>
Grant Likely
AppliedPATCH RESEND 1/1 ARM/SPI: New driver for SPI master controller for CLPS711X-target
Quoted 8 lines · Alexander Shiyan
Quoted 5 lines · On Mon, 12 Nov 2012 21:43:34 +0000 Arnd Bergmann <[email protected]> wrote:
Quoted 4 lines · Alexander Shiyan
This patch add new driver for CLPS711X SPI master controller. Due to platform limitations driver supports only 8 bit transfer mode. Chip select control is handled via GPIO.
Quoted 6 lines
Quoted 4 lines
Quoted 1 line
Signed-off-by Alexander Shiyan <[email protected]>Acked-by Arnd Bergmann <[email protected]>Please apply this patch in the SPI tree.
Applied, thanks.
g.
Quoted 3 lines
Signature · 2 lines
-- Alexander Shiyan <[email protected]>
Signature · 2 lines
Grant Likely, B.Sc, P.Eng. Secret Lab Technologies, Ltd.