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mx25pdk: Include CONFIG_MX25

PATCH New Fabio Estevam 4 participants 14 messages Oct 23, 2012 – Dec 11, 2012

Subsystems (3)
Arm (32-bit) Arm i.MX and Layerscape Char and misc drivers
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Fabio Estevam

author
#0 lore raw

PATCH v3 1/6 mx25pdk: Include CONFIG_MX25

It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC differences based on the this config option.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- No changes
Changes since v1:
- No changes

 include/configs/mx25pdk.h |    1 +
 1 file changed, 1 insertion(+)
include/configs/mx25pdk.h +1 -0
index 96c143e..2087502 100644
@@ -17,6 +17,7 @@
 
 /* High Level Configuration Options */
 
+#define CONFIG_MX25
 #define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_TEXT_BASE		0x81200000
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH v3 2/6 mx25pdk: Add esdhc support

mx25pdk has a SD/MMC slot connected to esdhc1.

Add support for it and allow the environment variables to be saved into SD/MMC.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- No changes
Changes since v1:
- Use "esdhc_cfg[0].sdhc_clk"

 board/freescale/mx25pdk/mx25pdk.c |   53 +++++++++++++++++++++++++++++++++++++
 include/configs/mx25pdk.h         |   16 ++++++++++-
 2 files changed, 68 insertions(+), 1 deletion(-)
board/freescale/mx25pdk/mx25pdk.c +53 -0
index 4a8352f..5f7c982 100644
@@ -19,12 +19,24 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/imx25-pinmux.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/clock.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+
+#define CARD_DETECT		IMX_GPIO_NR(2, 1)
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[1] = {
+	{IMX_MMC_SDHC1_BASE},
+};
+#endif
+
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */

@@ -48,6 +60,47 @@ int board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_getcd(struct mmc *mmc)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+
+	/*
+	 * Set up the Card Detect pin.
+	 *
+	 * SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15
+	 *
+	 */
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+	writel(gpio_mux_mode, &muxctl->pad_a15);
+	writel(0x0, &padctl->pad_a15);
+
+	gpio_direction_input(CARD_DETECT);
+	return !gpio_get_value(CARD_DETECT);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	u32 sdhc1_mux_mode = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	writel(sdhc1_mux_mode, &muxctl->pad_sd1_cmd);
+	writel(sdhc1_mux_mode, &muxctl->pad_sd1_clk);
+	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data0);
+	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data1);
+	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data2);
+	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data3);
+
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+	return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+}
+#endif
+
 int checkboard(void)
 {
 	puts("Board: MX25PDK\n");
include/configs/mx25pdk.h +15 -1
index 2087502..1770521 100644
@@ -20,6 +20,7 @@
 #define CONFIG_MX25
 #define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_TEXT_BASE		0x81200000
+#define CONFIG_MXC_GPIO
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

@@ -58,9 +59,10 @@
 /* No NOR flash present */
 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
 #define CONFIG_ENV_SIZE        (8 * 1024)
-#define CONFIG_ENV_IS_NOWHERE
 
 #define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 /* U-Boot general configuration */
 #define CONFIG_SYS_PROMPT	"MX25PDK U-Boot > "

@@ -78,6 +80,9 @@
 /* U-Boot commands */
 #include <config_cmd_default.h>
 #define CONFIG_CMD_CACHE
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
 
 /* Ethernet */
 #define CONFIG_FEC_MXC

@@ -86,6 +91,15 @@
 #define CONFIG_CMD_NET
 #define CONFIG_ENV_OVERWRITE
 
+/* ESDHC driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+#define CONFIG_SYS_FSL_ESDHC_NUM	1
+
+#define CONFIG_DOS_PARTITION
+
 #define CONFIG_BOOTDELAY	3
 
 #define CONFIG_LOADADDR		0x81000000	/* loadaddr env var */
Signature · 1 line
1.7.9.5
author
#2 lore raw

PATCH v3 3/6 pmic_fsl: Introduce FSL_PMIC_I2C_LENGTH

In reply to Fabio Estevam

Introduce FSL_PMIC_I2C_LENGTH to configure the number of bytes that are used to communicate with the PMIC via I2C.

Instead of hardcoding the value, pass the number via a configurable option per PMIC type.

This will be useful for adding support for PMIC MC34704 from Freescale, which uses only one byte in its I2C protocol.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- Do not pass FSL_PMIC_I2C_LENGTH in the board file

 drivers/misc/pmic_fsl.c    |    6 +++++-
 include/configs/mx35pdk.h  |    1 +
 include/configs/mx53loco.h |    1 +
 3 files changed, 7 insertions(+), 1 deletion(-)
drivers/misc/pmic_fsl.c +5 -1
index 0ff75ed..9d80b55 100644
@@ -26,6 +26,10 @@
 #include <pmic.h>
 #include <fsl_pmic.h>
 
+#if defined(CONFIG_PMIC_FSL_MC13892)
+#define FSL_PMIC_I2C_LENGTH	3
+#endif
+
 #if defined(CONFIG_PMIC_SPI)
 static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
 {

@@ -53,7 +57,7 @@ int pmic_init(void)
 #elif defined(CONFIG_PMIC_I2C)
 	p->interface = PMIC_I2C;
 	p->hw.i2c.addr = CONFIG_SYS_FSL_PMIC_I2C_ADDR;
-	p->hw.i2c.tx_num = 3;
+	p->hw.i2c.tx_num = FSL_PMIC_I2C_LENGTH;
 	p->bus = I2C_PMIC;
 #else
 #error "You must select CONFIG_PMIC_SPI or CONFIG_PMIC_I2C"
include/configs/mx35pdk.h +1 -0
index 826c912..e79f76e 100644
@@ -68,6 +68,7 @@
 #define CONFIG_PMIC
 #define CONFIG_PMIC_I2C
 #define CONFIG_PMIC_FSL
+#define CONFIG_PMIC_FSL_MC13892
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
 #define CONFIG_RTC_MC13XXX
include/configs/mx53loco.h +1 -0
index 0658dd3..9e8f5ce 100644
@@ -93,6 +93,7 @@
 #define CONFIG_PMIC_I2C
 #define CONFIG_DIALOG_PMIC
 #define CONFIG_PMIC_FSL
+#define CONFIG_PMIC_FSL_MC13892
 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	0x48
 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
Signature · 1 line
1.7.9.5
author
#3 lore raw

PATCH v3 4/6 mic: Add support for mc34704

In reply to Fabio Estevam

Add the register layout for the MC34704 PMIC from Freescale.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- Pass FSL_PMIC_I2C_LENGTH

 drivers/misc/pmic_fsl.c |    2 ++
 include/mc34704.h       |   49 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+)
 create mode 100644 include/mc34704.h
drivers/misc/pmic_fsl.c +2 -0
index 9d80b55..c8d4c8d 100644
@@ -28,6 +28,8 @@
 
 #if defined(CONFIG_PMIC_FSL_MC13892)
 #define FSL_PMIC_I2C_LENGTH	3
+#elif defined(CONFIG_PMIC_FSL_MC34704)
+#define FSL_PMIC_I2C_LENGTH	1
 #endif
 
 #if defined(CONFIG_PMIC_SPI)
include/mc34704.h new file +49 -0

49 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#4 lore raw

PATCH v3 4/6 mic: Add support for mc34704

Am 23/10/2012 18:34, schrieb Fabio Estevam:

Quoted 17 lines

Add the register layout for the MC34704 PMIC from Freescale.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- Pass FSL_PMIC_I2C_LENGTH

 drivers/misc/pmic_fsl.c |    2 ++
 include/mc34704.h       |   49 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+)
 create mode 100644 include/mc34704.h
drivers/misc/pmic_fsl.c +0 -0
index 9d80b55..c8d4c8d 100644

drivers/misc/pmic_fsl.c line 33

Quoted 6 lines
drivers/misc/pmic_fsl.c +2 -0
@@ -28,6 +28,8 @@
 
 #if defined(CONFIG_PMIC_FSL_MC13892)
 #define FSL_PMIC_I2C_LENGTH	3
+#elif defined(CONFIG_PMIC_FSL_MC34704)
+#define FSL_PMIC_I2C_LENGTH	1
 #endif

I think this can break boards with MX3 where the MC13783 is used, and where MC13892 is not set.

At the moment, MC34704 is the one that requires a short lenght. Maybe it is better to set 3 as default:

#if defined(CONFIG_PMIC_FSL_MC34704)
#define FSL_PMIC_I2C_LENGTH 1
#else
#define FSL_PMIC_I2C_LENGTH 3
#endif

Quoted 58 lines
drivers/misc/pmic_fsl.c +0 -0
 #if defined(CONFIG_PMIC_SPI)
include/mc34704.h new file +49 -0
new file mode 100644
index 0000000..6611d54
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ */
+
+#ifndef __MC34704_H__
+#define __MC34704_H__
+
+enum {
+	MC34704_RESERVED0_REG = 0,	/* 0x00 */
+	MC34704_GENERAL1_REG,		/* 0x01 */
+	MC34704_GENERAL2_REG,		/* 0x02 */
+	MC34704_GENERAL3_REG,		/* 0x03 */
+	MC34704_RESERVED4_REG,		/* 0x04 */
+	MC34704_VGSET2_REG,		/* 0x05 */
+	MC34704_REG2SET1_REG,		/* 0x06 */
+	MC34704_REG2SET2_REG,		/* 0x07 */
+	MC34704_REG3SET1_REG,		/* 0x08 */
+	MC34704_REG3SET2_REG,		/* 0x09 */
+	MC34704_REG4SET1_REG,		/* 0x0a */
+	MC34704_REG4SET2_REG,		/* 0x0b */
+	MC34704_REG5SET1_REG,		/* 0x0c */
+	MC34704_REG5SET2_REG,		/* 0x0d */
+	MC34704_REG5SET3_REG,		/* 0x0e */
+	MC34704_RESERVEDF_REG,		/* 0x0f */
+	MC34704_RESERVED10_REG,		/* 0x10 */
+	MC34704_RESERVED11_REG,		/* 0x11 */
+	MC34704_RESERVED12_REG,		/* 0x12 */
+	MC34704_FSW2SET_REG,		/* 0x13 */
+	MC34704_RESERVED14_REG,		/* 0x14 */
+	MC34704_REG8SET1_REG,		/* 0x15 */
+	MC34704_REG8SET2_REG,		/* 0x16 */
+	MC34704_REG8SET3_REG,		/* 0x17 */
+	MC34704_FAULTS_REG,		/* 0x18 */
+	MC34704_I2CSET1,		/* 0x19 */
+	MC34704_NUM_OF_REGS,
+};
+
+/* GENERAL2 register fields */
+#define ONOFFE		(1 << 0)
+#define ONOFFD		(1 << 1)
+#define ALLOFF		(1 << 4)
+
+#endif /* __MC34704_H__ */
Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
reviewer
#5 lore raw

PATCH v3 4/6 mic: Add support for mc34704

Hi Stefano,

Quoted 2 lines · Stefano Babic

I think this can break boards with MX3 where the MC13783 is used, and where MC13892 is not set.

mc13783 can only communicate via spi, not i2c, so this patch does not break mx3 + mc13783 case.

Regards,

Fabio Estevam

#6 lore raw

PATCH v3 4/6 mic: Add support for mc34704

Am 25/10/2012 12:55, schrieb Fabio Estevam:

Quoted 9 lines

Hi Stefano,

Quoted 2 lines · Stefano Babic

I think this can break boards with MX3 where the MC13783 is used, and where MC13892 is not set.

mc13783 can only communicate via spi, not i2c, so this patch does not break mx3 + mc13783 case.

Thanks, I have not checked it - I have considered the MC13873 more similar to the MC13892 as it is ;-).

Then the patch is ok for me.

Acked-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
author
#7 lore raw

PATCH v3 5/6 mx25: Place common functions into sys_proto.h

In reply to Fabio Estevam

imx-regs.h is meant to contain SoC register definitions.

Common SoC funtions should go to sys_proto.h instead.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- No changes: newly introduced in this series

 arch/arm/include/asm/arch-mx25/imx-regs.h  |    4 ----
 arch/arm/include/asm/arch-mx25/sys_proto.h |    3 +++
 board/syteco/zmx25/zmx25.c                 |    1 +
 3 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/include/asm/arch-mx25/imx-regs.h +0 -4
index 53aafe3..738d411 100644
@@ -36,10 +36,6 @@
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
 
-#ifdef CONFIG_FEC_MXC
-extern void mx25_fec_init_pins(void);
-#endif
-
 /* Clock Control Module (CCM) registers */
 struct ccm_regs {
 	u32 mpctl;	/* Core PLL Control */
arch/arm/include/asm/arch-mx25/sys_proto.h +3 -0
index 6a01a7b..46db341 100644
@@ -25,5 +25,8 @@
 #define _SYS_PROTO_H_
 
 void mx25_uart1_init_pins(void);
+#if defined CONFIG_FEC_MXC
+extern void mx25_fec_init_pins(void);
+#endif
 
 #endif
board/syteco/zmx25/zmx25.c +1 -0
index fe5589d..4f37c59 100644
@@ -33,6 +33,7 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/imx25-pinmux.h>
+#include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
Signature · 1 line
1.7.9.5
author
#8 lore raw

PATCH v3 6/6 mx25pdk: Add Ethernet support

In reply to Fabio Estevam

mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the MC34704 PMIC via I2C.

Make the FEC ethernet port functional

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- Pass FSL_PMIC_I2C_LENGTH in PMIC file

 board/freescale/mx25pdk/mx25pdk.c |   61 +++++++++++++++++++++++++++++++++++++
 include/configs/mx25pdk.h         |   22 +++++++++++++
 2 files changed, 83 insertions(+)
board/freescale/mx25pdk/mx25pdk.c +61 -0
index 9bf2d48..72fa6bc 100644
@@ -26,7 +26,13 @@
 #include <asm/arch/clock.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
+#include <i2c.h>
+#include <pmic.h>
+#include <fsl_pmic.h>
+#include <mc34704.h>
 
+#define FEC_RESET_B		IMX_GPIO_NR(2, 3)
+#define FEC_ENABLE_B		IMX_GPIO_NR(4, 8)
 #define CARD_DETECT		IMX_GPIO_NR(2, 1)
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -37,6 +43,47 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = {
 };
 #endif
 
+static void mx25pdk_fec_init(void)
+{
+	struct iomuxc_mux_ctl *muxctl;
+	struct iomuxc_pad_ctl *padctl;
+	u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+	u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+
+	/* FEC pin init is generic */
+	mx25_fec_init_pins();
+
+	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+	/*
+	 * Set up FEC_RESET_B and FEC_ENABLE_B
+	 *
+	 * FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12
+	 * FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17
+	 */
+	writel(gpio_mux_mode, &muxctl->pad_d12);
+	writel(gpio_mux_mode, &muxctl->pad_a17);
+
+	writel(0x0, &padctl->pad_d12);
+	writel(0x0, &padctl->pad_a17);
+
+	/* Assert RESET and ENABLE low */
+	gpio_direction_output(FEC_RESET_B, 0);
+	gpio_direction_output(FEC_ENABLE_B, 0);
+
+	udelay(10);
+
+	/* Deassert RESET and ENABLE */
+	gpio_set_value(FEC_RESET_B, 1);
+	gpio_set_value(FEC_ENABLE_B, 1);
+
+	/* Setup I2C pins so that PMIC can turn on PHY supply */
+	writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk);
+	writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat);
+	writel(0x1E8, &padctl->pad_i2c1_clk);
+	writel(0x1E8, &padctl->pad_i2c1_dat);
+}
+
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */

@@ -60,6 +107,20 @@ int board_init(void)
 	return 0;
 }
 
+int board_late_init(void)
+{
+	struct pmic *p;
+
+	mx25pdk_fec_init();
+
+	pmic_init();
+	p = get_pmic();
+	/* Turn on Ethernet PHY supply */
+	pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE);
+
+	return 0;
+}
+
 #ifdef CONFIG_FSL_ESDHC
 int board_mmc_getcd(struct mmc *mmc)
 {
include/configs/mx25pdk.h +22 -0
index 5258f88..0bb3579 100644
@@ -43,6 +43,7 @@
 #define PHYS_SDRAM_1_SIZE	(64 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_RAM_ADDR	IMX_RAM_BASE

@@ -105,8 +106,29 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 #define CONFIG_SYS_FSL_ESDHC_NUM	1
 
+/* PMIC Configs */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_PMIC_FSL
+#define CONFIG_PMIC_FSL_MC34704
+#define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x54
+
 #define CONFIG_DOS_PARTITION
 
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_BASE		IMX_I2C_BASE
+#define CONFIG_SYS_I2C_SPEED		100000
+
+/* Ethernet Configs */
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
 #define CONFIG_BOOTDELAY	3
 
 #define CONFIG_LOADADDR		0x81000000	/* loadaddr env var */
Signature · 1 line
1.7.9.5
#9 lore raw

PATCH v3 6/6 mx25pdk: Add Ethernet support

Hi Fabio,

Quoted 8 lines · Fabio Estevam

mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the MC34704 PMIC via I2C.

Make the FEC ethernet port functional

Signed-off-by Fabio Estevam <[email protected]>

This commit introduced a dependency on the PMIC framework, which has since been reworked in u-boot/master, leading to a failure to merge u-boot-arm/master and u-boot/master properly.

Fabio, can you look into this?

Stefano, can you add the resulting fix, if any, to the woodburn fixes?

Amicalement,

Signature · 1 line
Albert.
#10 lore raw

PATCH v3 6/6 mx25pdk: Add Ethernet support

Quoted 12 lines · Albert ARIBAUD

Hi Fabio,

Quoted 7 lines · Fabio Estevam

mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the MC34704 PMIC via I2C.

Make the FEC ethernet port functional

Quoted 8 lines
Quoted 1 line
Signed-off-by Fabio Estevam <[email protected]>

This commit introduced a dependency on the PMIC framework, which has since been reworked in u-boot/master, leading to a failure to merge u-boot-arm/master and u-boot/master properly.

Fabio, can you look into this?

Hi Fabio, hi Albert,

I have already found this conflict and fixed it (I hope). Fabio, to have a look, I pushed a temporary "master_merge" branch on u-boot-imx. If everything is fine, I will push the changes in the master branch as usual.

Quoted 1 line

Stefano, can you add the resulting fix, if any, to the woodburn fixes?

I hope I have already done without breaking anything.

Best regards,
Stefano

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
reviewer
#11 lore raw

PATCH v3 6/6 mx25pdk: Add Ethernet support

Hi Stefano,

Quoted 5 lines · Stefano Babic

Hi Fabio, hi Albert,

I have already found this conflict and fixed it (I hope). Fabio, to have a look, I pushed a temporary "master_merge" branch on u-boot-imx. If everything is fine, I will push the changes in the master branch as usual.

I will be able to access to my mx25pdk next Tuesday and will test your 'master_merge' branch.

Thanks,

Fabio Estevam

reviewer
#12 lore raw

PATCH v3 6/6 mx25pdk: Add Ethernet support

In reply to Albert ARIBAUD

Albert,

Quoted 3 lines · Albert ARIBAUD

This commit introduced a dependency on the PMIC framework, which has since been reworked in u-boot/master, leading to a failure to merge u-boot-arm/master and u-boot/master properly.

I have just sent a patch fixing it.

Regards,

Fabio Estevam

#13 lore raw

PATCH v3 1/6 mx25pdk: Include CONFIG_MX25

In reply to Fabio Estevam
Quoted 12 lines · Fabio Estevam

It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC differences based on the this config option.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v2:
- No changes
Changes since v1:
- No changes

 include/configs/mx25pdk.h |    1 +
 1 file changed, 1 insertion(+)

Applied (whole series) to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
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