mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
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PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
It could happen (1 out of 100 times) that NAND did not start up correctly after warm rebooting, so the kernel could not find the UBI or DMA timed out due to a stalled BCH. When resetting BCH together with GPMI, the issue could not be observed anymore (after 10000+ reboots). We probably need the consistent state already before sending any command to NAND, even when no ECC is needed. I chose to keep the extra reset for BCH when changing the flash layout to be on the safe side.
---
Would be really great to have in 3.7. Also a stable-candidate IMO.
drivers/mtd/nand/gpmi-nand/gpmi-lib.c | 9 +++++++++ 1 file changed, 9 insertions(+)
drivers/mtd/nand/gpmi-nand/gpmi-lib.c +9 -0
@@ -166,6 +166,15 @@ int gpmi_init(struct gpmi_nand_data *this)if (ret) goto err_out; +/* +* Reset BCH here, too. We got failures otherwise :( +* See later BCH reset for explanation of MX23 handling +*/ + ret =gpmi_reset_block (r->bch_regs,GPMI_IS_MX23 (this)); +if (ret) + goto err_out; + +/* Choose NAND mode. */ writel (BM_GPMI_CTRL1_GPMI_MODE , r->gpmi_regs +HW_GPMI_CTRL1_CLR );
Signature · 1 line
1.7.10.4
PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
? 2012?12?06? 04:46, Wolfram Sang ??:
Quoted 1 line
correctly after warm rebooting, so the kernel could not find the UBI or
which Soc do you meet this issue? the mx23 or mx28?
It's bad news to me. I ever thought the BCH-reset-issue is gone. I ever tested many times in mx28(> 10000 times) with freescale's uboot.
I guest you are not use the freescale's uboot. The uboot also will reset the BCH/GPMI.
thanks
Huang Shijie
PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
Quoted 3 lines · Huang Shijie
? 2012?12?06? 04:46, Wolfram Sang ??:
Quoted 1 line
correctly after warm rebooting, so the kernel could not find the UBI or
which Soc do you meet this issue? the mx23 or mx28?
MX28.
Quoted 2 lines
It's bad news to me. I ever thought the BCH-reset-issue is gone. I ever tested many times in mx28(> 10000 times) with freescale's uboot.
Did you power-cycle between each test or reboot? I still need to test if this really makes a difference, but I think the issue shows more often when only rebooting.
Quoted 2 lines
I guest you are not use the freescale's uboot. The uboot also will reset the BCH/GPMI.
I just checked its sources. It also has this flaw. GPMI and BCH need to be reset at the same time, i.e. before first commands are sent to the NAND (although they don't need ECC).
I use barebox, but that isn't of importance here. If I don't fix barebox, I see NAND issues in barebox or the kernel. If I fix barebox, I still see issues in the kernel, but not in barebox anymore.
The setup needs to be done properly to ensure a consistent state at the beginning, especially when somebody used the NAND before (ROM code, bootloader). Fixing the bootloader alone is not enough.
Thanks,
Wolfram
Signature · 9 lines
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PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
Quoted 11 lines · Wolfram Sang
Quoted 3 lines · Huang Shijie
? 2012?12?06? 04:46, Wolfram Sang ??:
Quoted 1 line
correctly after warm rebooting, so the kernel could not find the UBI or
which Soc do you meet this issue? the mx23 or mx28?
MX28.
Quoted 2 lines
It's bad news to me. I ever thought the BCH-reset-issue is gone. I ever tested many times in mx28(> 10000 times) with freescale's uboot.
Did you power-cycle between each test or reboot? I still need to test if
What's the meaning of "power-cycle"?
I only tested with the soft reset, the power is never shut down.
Quoted 10 lines
this really makes a difference, but I think the issue shows more often when only rebooting.
Quoted 2 lines
I guest you are not use the freescale's uboot. The uboot also will reset the BCH/GPMI.
I just checked its sources. It also has this flaw. GPMI and BCH need to be reset at the same time, i.e. before first commands are sent to the NAND (although they don't need ECC).
With your patch, we have resetted the BCH twice in the driver. Could we only reset BCH one time?
Do you ever remove another reset-bch code, and test it?
Frankly speaking, it's strange to reset the BCH twice, and it makes no sense. :( I am afraid that we have to add three-reset-bch in the future, if we can not find the root cause.
If you can remove another reset-bch code, i will ack the patch.
Quoted 4 lines
I use barebox, but that isn't of importance here. If I don't fix barebox, I see NAND issues in barebox or the kernel. If I fix barebox, I still see issues in the kernel, but not in barebox anymore.
I ever met the same case with the freescale's BSP code. I fixed the issue in uboot, and fixed the driver too.
Quoted 2 lines
The setup needs to be done properly to ensure a consistent state at the beginning, especially when somebody used the NAND before (ROM code,
At the beginning? it's really interesting.
I want to test it myself.
could you wait for some time?
Best Regards
Huang Shijie
Quoted 23 lines
bootloader). Fixing the bootloader alone is not enough.
Thanks,
Wolfram
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PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
Quoted 3 lines
Quoted 2 lines
Did you power-cycle between each test or reboot? I still need to test if
What's the meaning of "power-cycle"?
power off - power on
Quoted 1 line
I only tested with the soft reset, the power is never shut down.
OK.
Quoted 2 lines
With your patch, we have resetted the BCH twice in the driver. Could we only reset BCH one time?
You tell me, please :) Is it needed when changing the layout? I don't have any setup to test that. Unless I can test that, I prefer to not remove it. I am a bit anxious, because the reason for the stalled BCH is not fully understood and all I can reliably say is that resetting twice does not hurt.
Quoted 1 line
Do you ever remove another reset-bch code, and test it?
It will probably work, but we don't cover the case of changing the layout?
Quoted 1 line
Frankly speaking, it's strange to reset the BCH twice, and it makes no sense. :(
The stalled BCH makes no sense either, currently.
Quoted 2 lines
I am afraid that we have to add three-reset-bch in the future, if we can not find the root cause.
Well, ask the IC guys if something can go wrong when the BCH has been active and the GPMI gets reset and issues NAND commands (without needing ECC).
Quoted 1 line
If you can remove another reset-bch code, i will ack the patch.
Removing code that late in the cycle without proof sounds dangerous to me.
Quoted 6 lines
Quoted 2 lines
The setup needs to be done properly to ensure a consistent state at the beginning, especially when somebody used the NAND before (ROM code,
At the beginning? it's really interesting.
I want to test it myself.could you wait for some time?
What is some time? :)
Thanks,
Wolfram
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PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
In reply to Wolfram Sang? 2012?12?06? 17:52, Wolfram Sang ??:
Quoted 3 lines
The setup needs to be done properly to ensure a consistent state at the beginning, especially when somebody used the NAND before (ROM code, bootloader). Fixing the bootloader alone is not enough.
I tried to make some time to test it.
But i am too busy this week.
Anyway, let this patch get merged.
thanks
Huang Shijie
Artem Bityutskiy
AppliedPATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
In reply to Wolfram SangQuoted 8 lines · Wolfram Sang
It could happen (1 out of 100 times) that NAND did not start up correctly after warm rebooting, so the kernel could not find the UBI or DMA timed out due to a stalled BCH. When resetting BCH together with GPMI, the issue could not be observed anymore (after 10000+ reboots). We probably need the consistent state already before sending any command to NAND, even when no ECC is needed. I chose to keep the extra reset for BCH when changing the flash layout to be on the safe side.
Quoted 7 lines
Signed-off-by Wolfram Sang <[email protected]>Cc Huang Shijie <[email protected]>Cc Artem Bityutskiy <[email protected]>Cc David Woodhouse <[email protected]>---
Would be really great to have in 3.7. Also a stable-candidate IMO.
Pushed to l2-mtd.git, thanks
If you believe this is suitable for stable, please let me know.
Signature · 9 lines
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PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
Quoted 15 lines · Artem Bityutskiy
Quoted 14 lines · Wolfram Sang
It could happen (1 out of 100 times) that NAND did not start up correctly after warm rebooting, so the kernel could not find the UBI or DMA timed out due to a stalled BCH. When resetting BCH together with GPMI, the issue could not be observed anymore (after 10000+ reboots). We probably need the consistent state already before sending any command to NAND, even when no ECC is needed. I chose to keep the extra reset for BCH when changing the flash layout to be on the safe side.
Signed-off-by Wolfram Sang <[email protected]>Cc Huang Shijie <[email protected]>Cc Artem Bityutskiy <[email protected]>Cc David Woodhouse <[email protected]>---
Quoted 5 lines
Quoted 1 line
Would be really great to have in 3.7. Also a stable-candidate IMO.
Pushed to l2-mtd.git, thanks
If you believe this is suitable for stable, please let me know.
I strongly believe that.
Signature · 9 lines
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PATCH 1/1 mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
Quoted 3 lines · Wolfram Sang
Quoted 1 line
If you believe this is suitable for stable, please let me know.
I strongly believe that.
OK, added
Signature · 9 lines
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