Move arch-specific global data into its own structure

index 2b9af93..8ca45ca 100644
@@ -23,6 +23,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory which is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -82,6 +87,7 @@ typedef	struct	global_data {
 	unsigned long	post_log_res; /* success of POST test */
 	unsigned long	post_init_f_time; /* When post_init_f started */
 #endif
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index bf661e2..236a9da 100644
@@ -22,6 +22,10 @@
 #ifndef __ASM_GLOBAL_DATA_H__
 #define __ASM_GLOBAL_DATA_H__
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -48,6 +52,7 @@ typedef	struct	global_data {
 #endif
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index d91e5a4..109069f 100644
@@ -30,6 +30,10 @@
 
 #include <asm/u-boot.h>
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -57,6 +61,7 @@ typedef struct global_data {
 
 	void	**jt;			/* jump table */
 	char	env_buf[32];		/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index 0cdb11c..fd8aacb 100644
@@ -23,6 +23,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -66,6 +71,7 @@ typedef	struct	global_data {
 #endif
 	void		**jt;		/* Standalone app jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index 2111c7c..025131c 100644
@@ -24,6 +24,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -46,6 +51,7 @@ typedef	struct	global_data {
 	unsigned long	fb_base;	/* base address of frame buffer */
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index a735a8a..99949e1 100644
@@ -26,6 +26,10 @@
 
 #include <asm/regdef.h>
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -59,6 +63,7 @@ typedef	struct	global_data {
 	unsigned long	env_valid;	/* Checksum of Environment valid? */
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index b1feb2c..475bb44 100644
@@ -33,6 +33,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -63,6 +68,7 @@ typedef	struct global_data {
 
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index 413b485..cf8597b 100644
@@ -23,6 +23,10 @@
 #ifndef	__ASM_NIOS2_GLOBALDATA_H_
 #define __ASM_NIOS2_GLOBALDATA_H_
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 typedef	struct	global_data {
 	bd_t		*bd;
 	unsigned long	flags;

@@ -42,6 +46,7 @@ typedef	struct	global_data {
 #endif
 	void		**jt;		/* Standalone app jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index 96f3f1c..b478afa 100644
@@ -24,6 +24,11 @@
 
 #ifndef __ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -44,6 +49,7 @@ typedef struct global_data {
 	unsigned long	fb_base;	/* base address of frame buffer */
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index cb3a80b..df621da 100644
@@ -27,6 +27,10 @@
 #include "config.h"
 #include "asm/types.h"
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -184,6 +188,7 @@ typedef	struct	global_data {
 #endif
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index 78a751d..f33f465 100644
@@ -25,6 +25,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -46,6 +51,7 @@ typedef	struct global_data {
 	const void	*fdt_blob;	/* Our device tree, NULL if none */
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index 9a2c193..db85d4d 100644
@@ -27,6 +27,10 @@
 #ifndef	__ASM_SH_GLOBALDATA_H_
 #define __ASM_SH_GLOBALDATA_H_
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 typedef	struct global_data
 {
 	bd_t		*bd;

@@ -42,6 +46,7 @@ typedef	struct global_data
 	unsigned long	env_valid;	/* Checksum of Environment valid */
 	void		**jt;		/* Standalone app jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index aa63b35..a51c40b 100644
@@ -29,6 +29,10 @@
 
 #include "asm/types.h"
 
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -74,6 +78,7 @@ typedef struct global_data {
 #endif
 	void	**jt;			/* jump table */
 	char	env_buf[32];		/* buffer for getenv() before reloc. */
+	struct arch_global_data arch;	/* architecture-specific data */
 } gd_t;
 
 #include <asm-generic/global_data_flags.h>

index dc6402b..39c1acf 100644
@@ -23,6 +23,13 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+#ifndef __ASSEMBLY__
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -31,13 +38,12 @@
  * up the memory controller so that we can use RAM).
  */
 
-#ifndef __ASSEMBLY__
-
 #include <asm/u-boot.h>
 
 typedef struct global_data gd_t;
 
 struct global_data {
+	struct arch_global_data arch;	/* architecture-specific data */
 	/* NOTE: gd_addr MUST be first member of struct global_data! */
 	gd_t *gd_addr;	/* Location of Global Data */
 	bd_t		*bd;

index 09d2799..696200d 100644
@@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css)
 	case AT91_PMC_MCKR_CSS_SLOW:
 		return CONFIG_SYS_AT91_SLOW_CLOCK;
 	case AT91_PMC_MCKR_CSS_MAIN:
-		return gd->main_clk_rate_hz;
+		return gd->arch.main_clk_rate_hz;
 	case AT91_PMC_MCKR_CSS_PLLA:
-		return gd->plla_rate_hz;
+		return gd->arch.plla_rate_hz;
 	case AT91_PMC_MCKR_CSS_PLLB:
-		return gd->pllb_rate_hz;
+		return gd->arch.pllb_rate_hz;
 	}
 
 	return 0;

@@ -124,10 +124,10 @@ int at91_clock_init(unsigned long main_clock)
 		main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
 	}
 #endif
-	gd->main_clk_rate_hz = main_clock;
+	gd->arch.main_clk_rate_hz = main_clock;
 
 	/* report if PLLA is more than mildly overclocked */
-	gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
+	gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
 
 #ifdef CONFIG_USB_ATMEL
 	/*

@@ -136,9 +136,10 @@ int at91_clock_init(unsigned long main_clock)
 	 *
 	 * REVISIT:  assumes MCK doesn't derive from PLLB!
 	 */
-	gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
+	gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
 			     AT91_PMC_PLLBR_USBDIV_2;
-	gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
+	gd->arch.pllb_rate_hz = at91_pll_rate(main_clock,
+					      gd->arch.at91_pllb_usb_init);
 #endif
 
 	/*

@@ -146,13 +147,14 @@ int at91_clock_init(unsigned long main_clock)
 	 * For now, assume this parentage won't change.
 	 */
 	mckr = readl(&pmc->mckr);
-	gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
-	freq = gd->mck_rate_hz;
+	gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
+	freq = gd->arch.mck_rate_hz;
 
 	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2));	/* prescale */
 	/* mdiv */
-	gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
-	gd->cpu_clk_rate_hz = freq;
+	gd->arch.mck_rate_hz = freq /
+			(1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
+	gd->arch.cpu_clk_rate_hz = freq;
 
 	return 0;
 }

index dc5c6c4..f825388 100644
@@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css)
 	case AT91_PMC_MCKR_CSS_SLOW:
 		return CONFIG_SYS_AT91_SLOW_CLOCK;
 	case AT91_PMC_MCKR_CSS_MAIN:
-		return gd->main_clk_rate_hz;
+		return gd->arch.main_clk_rate_hz;
 	case AT91_PMC_MCKR_CSS_PLLA:
-		return gd->plla_rate_hz;
+		return gd->arch.plla_rate_hz;
 	case AT91_PMC_MCKR_CSS_PLLB:
-		return gd->pllb_rate_hz;
+		return gd->arch.pllb_rate_hz;
 	}
 
 	return 0;

@@ -132,10 +132,10 @@ int at91_clock_init(unsigned long main_clock)
 		main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
 	}
 #endif
-	gd->main_clk_rate_hz = main_clock;
+	gd->arch.main_clk_rate_hz = main_clock;
 
 	/* report if PLLA is more than mildly overclocked */
-	gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
+	gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
 
 #ifdef CONFIG_USB_ATMEL
 	/*

@@ -144,9 +144,10 @@ int at91_clock_init(unsigned long main_clock)
 	 *
 	 * REVISIT:  assumes MCK doesn't derive from PLLB!
 	 */
-	gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
+	gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
 			     AT91_PMC_PLLBR_USBDIV_2;
-	gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
+	gd->arch.pllb_rate_hz = at91_pll_rate(main_clock,
+					      gd->arch.at91_pllb_usb_init);
 #endif
 
 	/*

@@ -157,15 +158,15 @@ int at91_clock_init(unsigned long main_clock)
 #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
 		|| defined(CONFIG_AT91SAM9X5)
 	/* plla divisor by 2 */
-	gd->plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
+	gd->arch.plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
 #endif
-	gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
-	freq = gd->mck_rate_hz;
+	gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
+	freq = gd->arch.mck_rate_hz;
 
 	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2));	/* prescale */
 #if defined(CONFIG_AT91SAM9G20)
 	/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
-	gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
+	gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
 		freq / ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 7) : freq;
 	if (mckr & AT91_PMC_MCKR_MDIV_MASK)
 		freq /= 2;			/* processor clock division */

@@ -177,14 +178,15 @@ int at91_clock_init(unsigned long main_clock)
 	 *  2   <==>   4
 	 *  3   <==>   3
 	 */
-	gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
+	gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
 		(AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4)
 		? freq / 3
 		: freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
 #else
-	gd->mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
+	gd->arch.mck_rate_hz = freq /
+			(1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
 #endif
-	gd->cpu_clk_rate_hz = freq;
+	gd->arch.cpu_clk_rate_hz = freq;
 
 	return 0;
 }

index f70ce83..641ae3e 100644
@@ -79,7 +79,7 @@ int timer_init(void)
 	/* Enable PITC */
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
 
-	gd->timer_rate_hz = gd->mck_rate_hz / 16;
+	gd->timer_rate_hz = gd->arch.mck_rate_hz / 16;
 	gd->tbu = gd->tbl = 0;
 
 	return 0;

index 1e8522b..d4852a3 100644
@@ -31,37 +31,37 @@
 static inline unsigned long get_cpu_clk_rate(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	return gd->cpu_clk_rate_hz;
+	return gd->arch.cpu_clk_rate_hz;
 }
 
 static inline unsigned long get_main_clk_rate(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	return gd->main_clk_rate_hz;
+	return gd->arch.main_clk_rate_hz;
 }
 
 static inline unsigned long get_mck_clk_rate(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	return gd->mck_rate_hz;
+	return gd->arch.mck_rate_hz;
 }
 
 static inline unsigned long get_plla_clk_rate(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	return gd->plla_rate_hz;
+	return gd->arch.plla_rate_hz;
 }
 
 static inline unsigned long get_pllb_clk_rate(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	return gd->pllb_rate_hz;
+	return gd->arch.pllb_rate_hz;
 }
 
 static inline u32 get_pllb_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	return gd->at91_pllb_usb_init;
+	return gd->arch.at91_pllb_usb_init;
 }
 
 static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)

index 8ca45ca..ba7814a 100644
@@ -26,6 +26,15 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
+#ifdef CONFIG_AT91FAMILY
+	/* "static data" needed by at91's clock.c */
+	unsigned long	cpu_clk_rate_hz;
+	unsigned long	main_clk_rate_hz;
+	unsigned long	mck_rate_hz;
+	unsigned long	plla_rate_hz;
+	unsigned long	pllb_rate_hz;
+	unsigned long	at91_pllb_usb_init;
+#endif
 };
 
 /*

@@ -50,15 +59,6 @@ typedef	struct	global_data {
 #ifdef CONFIG_FSL_ESDHC
 	unsigned long	sdhc_clk;
 #endif
-#ifdef CONFIG_AT91FAMILY
-	/* "static data" needed by at91's clock.c */
-	unsigned long	cpu_clk_rate_hz;
-	unsigned long	main_clk_rate_hz;
-	unsigned long	mck_rate_hz;
-	unsigned long	plla_rate_hz;
-	unsigned long	pllb_rate_hz;
-	unsigned long	at91_pllb_usb_init;
-#endif
 #ifdef CONFIG_ARM
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long	timer_rate_hz;

index 4bfcef2..2873643 100644
@@ -31,14 +31,14 @@ DECLARE_GLOBAL_DATA_PTR;
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
 	tick *= CONFIG_SYS_HZ;
-	do_div(tick, gd->timer_rate_hz);
+	do_div(tick, gd->arch.timer_rate_hz);
 
 	return tick;
 }
 
 static inline unsigned long long usec_to_tick(unsigned long long usec)
 {
-	usec *= gd->timer_rate_hz;
+	usec *= gd->arch.timer_rate_hz;
 	do_div(usec, 1000000);
 
 	return usec;

@@ -74,7 +74,7 @@ int timer_init(void)
 	cr |= FTTMR010_TM3_ENABLE;
 	writel(cr, &tmr->cr);
 
-	gd->timer_rate_hz = TIMER_CLOCK;
+	gd->arch.timer_rate_hz = TIMER_CLOCK;
 	gd->tbu = gd->tbl = 0;
 
 	return 0;

@@ -126,5 +126,5 @@ ulong get_timer(ulong base)
  */
 ulong get_tbclk(void)
 {
-	return gd->timer_rate_hz;
+	return gd->arch.timer_rate_hz;
 }

index d8668be..7694fea 100644
@@ -52,7 +52,7 @@ int timer_init(void)
 		 * @33.25MHz and 15625 @ 50 MHz
 		 */
 		gd->tbu = get_PCLK() / (2 * 16 * 100);
-		gd->timer_rate_hz = get_PCLK() / (2 * 16);
+		gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
 	}
 	/* load value for 10 ms timeout */
 	writel(gd->tbu, &timers->tcntb4);

@@ -93,7 +93,7 @@ ulong get_timer_masked(void)
 {
 	ulong tmr = get_ticks();
 
-	return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ);
+	return tmr / (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
 }
 
 void udelay_masked(unsigned long usec)

index 641ae3e..061ccaf 100644
@@ -52,14 +52,14 @@ DECLARE_GLOBAL_DATA_PTR;
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
 	tick *= CONFIG_SYS_HZ;
-	do_div(tick, gd->timer_rate_hz);
+	do_div(tick, gd->arch.timer_rate_hz);
 
 	return tick;
 }
 
 static inline unsigned long long usec_to_tick(unsigned long long usec)
 {
-	usec *= gd->timer_rate_hz;
+	usec *= gd->arch.timer_rate_hz;
 	do_div(usec, 1000000);
 
 	return usec;

@@ -79,7 +79,7 @@ int timer_init(void)
 	/* Enable PITC */
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
 
-	gd->timer_rate_hz = gd->arch.mck_rate_hz / 16;
+	gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
 	gd->tbu = gd->tbl = 0;
 
 	return 0;

@@ -132,5 +132,5 @@ ulong get_timer(ulong base)
  */
 ulong get_tbclk(void)
 {
-	return gd->timer_rate_hz;
+	return gd->arch.timer_rate_hz;
 }

index 93c9e60..7e852b5 100644
@@ -60,7 +60,7 @@ int timer_init(void)
 	writel(0x0, &timer->tim34);
 	writel(TIMER_LOAD_VAL, &timer->prd34);
 	writel(2 << 22, &timer->tcr);
-	gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
+	gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
 	gd->timer_reset_value = 0;
 
 	return(0);

@@ -87,14 +87,15 @@ ulong get_timer(ulong base)
 
 	timer_diff = get_ticks() - gd->timer_reset_value;
 
-	return lldiv(timer_diff, (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base;
+	return lldiv(timer_diff,
+		     (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
 }
 
 void __udelay(unsigned long usec)
 {
 	unsigned long long endtime;
 
-	endtime = lldiv((unsigned long long)usec * gd->timer_rate_hz,
+	endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
 			1000000UL);
 	endtime += get_ticks();
 

@@ -108,7 +109,7 @@ void __udelay(unsigned long usec)
  */
 ulong get_tbclk(void)
 {
-	return gd->timer_rate_hz;
+	return gd->arch.timer_rate_hz;
 }
 
 #ifdef CONFIG_HW_WATCHDOG

index ba7814a..7a2f644 100644
@@ -35,6 +35,8 @@ struct arch_global_data {
 	unsigned long	pllb_rate_hz;
 	unsigned long	at91_pllb_usb_init;
 #endif
+	/* "static data" needed by most of timer.c on ARM platforms */
+	unsigned long timer_rate_hz;
 };
 
 /*

@@ -61,7 +63,6 @@ typedef	struct	global_data {
 #endif
 #ifdef CONFIG_ARM
 	/* "static data" needed by most of timer.c on ARM platforms */
-	unsigned long	timer_rate_hz;
 	unsigned long	tbl;
 	unsigned long	tbu;
 	unsigned long long	timer_reset_value;

index 2873643..781533b 100644
@@ -75,7 +75,7 @@ int timer_init(void)
 	writel(cr, &tmr->cr);
 
 	gd->arch.timer_rate_hz = TIMER_CLOCK;
-	gd->tbu = gd->tbl = 0;
+	gd->arch.tbu = gd->tbl = 0;
 
 	return 0;
 }

@@ -90,9 +90,9 @@ unsigned long long get_ticks(void)
 
 	/* increment tbu if tbl has rolled over */
 	if (now < gd->tbl)
-		gd->tbu++;
+		gd->arch.tbu++;
 	gd->tbl = now;
-	return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
 }
 
 void __udelay(unsigned long usec)

index 7694fea..e59e614 100644
@@ -45,17 +45,17 @@ int timer_init(void)
 	/* use PWM Timer 4 because it has no output */
 	/* prescaler for Timer 4 is 16 */
 	writel(0x0f00, &timers->tcfg0);
-	if (gd->tbu == 0) {
+	if (gd->arch.tbu == 0) {
 		/*
 		 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
 		 * (default) and prescaler = 16. Should be 10390
 		 * @33.25MHz and 15625 @ 50 MHz
 		 */
-		gd->tbu = get_PCLK() / (2 * 16 * 100);
+		gd->arch.tbu = get_PCLK() / (2 * 16 * 100);
 		gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
 	}
 	/* load value for 10 ms timeout */
-	writel(gd->tbu, &timers->tcntb4);
+	writel(gd->arch.tbu, &timers->tcntb4);
 	/* auto load, manual update of timer 4 */
 	tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000;
 	writel(tmr, &timers->tcon);

@@ -82,7 +82,7 @@ void __udelay (unsigned long usec)
 	ulong start = get_ticks();
 
 	tmo = usec / 1000;
-	tmo *= (gd->tbu * 100);
+	tmo *= (gd->arch.tbu * 100);
 	tmo /= 1000;
 
 	while ((ulong) (get_ticks() - start) < tmo)

@@ -104,10 +104,10 @@ void udelay_masked(unsigned long usec)
 
 	if (usec >= 1000) {
 		tmo = usec / 1000;
-		tmo *= (gd->tbu * 100);
+		tmo *= (gd->arch.tbu * 100);
 		tmo /= 1000;
 	} else {
-		tmo = usec * (gd->tbu * 100);
+		tmo = usec * (gd->arch.tbu * 100);
 		tmo /= (1000 * 1000);
 	}
 

@@ -133,7 +133,7 @@ unsigned long long get_ticks(void)
 		gd->tbl += gd->lastinc - now;
 	} else {
 		/* we have an overflow ... */
-		gd->tbl += gd->lastinc + gd->tbu - now;
+		gd->tbl += gd->lastinc + gd->arch.tbu - now;
 	}
 	gd->lastinc = now;
 

index 355cd6d..18ffd0c 100644
@@ -61,7 +61,7 @@ struct armd1tmr_registers {
 #define	COUNT_RD_REQ		0x1
 
 DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->tbl for lastdec */
 
 /* For preventing risk of instability in reading counter value,
  * first set read request to register cvwr and then read same

@@ -84,14 +84,14 @@ ulong get_timer_masked(void)
 
 	if (now >= gd->tbl) {
 		/* normal mode */
-		gd->tbu += now - gd->tbl;
+		gd->arch.tbu += now - gd->tbl;
 	} else {
 		/* we have an overflow ... */
-		gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
+		gd->arch.tbu += now + TIMER_LOAD_VAL - gd->tbl;
 	}
 	gd->tbl = now;
 
-	return gd->tbu;
+	return gd->arch.tbu;
 }
 
 ulong get_timer(ulong base)

@@ -135,9 +135,9 @@ int timer_init(void)
 
 	/* Enable timer 0 */
 	writel(0x1, &armd1timers->cer);
-	/* init the gd->tbu and gd->tbl value */
+	/* init the gd->arch.tbu and gd->tbl value */
 	gd->tbl = read_timer();
-	gd->tbu = 0;
+	gd->arch.tbu = 0;
 
 	return 0;
 }

index 061ccaf..f691518 100644
@@ -80,7 +80,7 @@ int timer_init(void)
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
 
 	gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
-	gd->tbu = gd->tbl = 0;
+	gd->arch.tbu = gd->tbl = 0;
 
 	return 0;
 }

@@ -96,9 +96,9 @@ unsigned long long get_ticks(void)
 
 	/* increment tbu if tbl has rolled over */
 	if (now < gd->tbl)
-		gd->tbu++;
+		gd->arch.tbu++;
 	gd->tbl = now;
-	return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
 }
 
 void __udelay(unsigned long usec)

index 7e852b5..e28e6e3 100644
@@ -75,10 +75,10 @@ unsigned long long get_ticks(void)
 
 	/* increment tbu if tbl has rolled over */
 	if (now < gd->tbl)
-		gd->tbu++;
+		gd->arch.tbu++;
 	gd->tbl = now;
 
-	return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
 }
 
 ulong get_timer(ulong base)

index 28aadad..701d439 100644
@@ -60,7 +60,7 @@ struct panthtmr_registers {
 #define	COUNT_RD_REQ		0x1
 
 DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->tbl for lastdec */
 
 /*
  * For preventing risk of instability in reading counter value,

@@ -92,14 +92,14 @@ ulong get_timer_masked(void)
 
 	if (now >= gd->tbl) {
 		/* normal mode */
-		gd->tbu += now - gd->tbl;
+		gd->arch.tbu += now - gd->tbl;
 	} else {
 		/* we have an overflow ... */
-		gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
+		gd->arch.tbu += now + TIMER_LOAD_VAL - gd->tbl;
 	}
 	gd->tbl = now;
 
-	return gd->tbu;
+	return gd->arch.tbu;
 }
 
 ulong get_timer(ulong base)

@@ -144,9 +144,9 @@ int timer_init(void)
 
 	/* Enable timer 0 */
 	writel(0x1, &panthtimers->cer);
-	/* init the gd->tbu and gd->tbl value */
+	/* init the gd->arch.tbu and gd->tbl value */
 	gd->tbl = read_timer();
-	gd->tbu = 0;
+	gd->arch.tbu = 0;
 
 	return 0;
 }

index 79aad99..bb9165b 100644
@@ -132,7 +132,7 @@ ulong get_timer(ulong base)
 /*
  * Emulation of Power architecture long long timebase.
  *
- * TODO: Support gd->tbu for real long long timebase.
+ * TODO: Support gd->arch.tbu for real long long timebase.
  */
 unsigned long long get_ticks(void)
 {

index 7a2f644..5d37061 100644
@@ -37,6 +37,7 @@ struct arch_global_data {
 #endif
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long timer_rate_hz;
+	unsigned long tbu;
 };
 
 /*

@@ -64,7 +65,6 @@ typedef	struct	global_data {
 #ifdef CONFIG_ARM
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long	tbl;
-	unsigned long	tbu;
 	unsigned long long	timer_reset_value;
 	unsigned long	lastinc;
 #endif

index 36266da..7a377cc 100644
@@ -117,11 +117,11 @@ unsigned long long get_ticks(void)
 
 	if (now >= gd->lastinc)	/* normal mode (non roll) */
 		/* move stamp forward with absolut diff ticks */
-		gd->tbl += (now - gd->lastinc);
+		gd->arch.tbl += (now - gd->lastinc);
 	else			/* we have rollover of incrementer */
-		gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
+		gd->arch.tbl += (0xFFFFFFFF - gd->lastinc) + now;
 	gd->lastinc = now;
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 ulong get_timer_masked(void)

index 9680b7f..c21ca3f 100644
@@ -32,7 +32,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp	(gd->tbl)
+#define timestamp	(gd->arch.tbl)
 #define lastinc		(gd->lastinc)
 
 /* General purpose timers bitfields */

index e929ae4..e179bb5 100644
@@ -52,7 +52,7 @@ int timer_init (void)
 
 	/* reset time */
 	gd->lastinc = READ_TIMER;	/* capture current incrementer value */
-	gd->tbl = 0;			/* start "advancing" time stamp */
+	gd->arch.tbl = 0;		/* start "advancing" time stamp */
 
 	return(0);
 }

@@ -82,7 +82,7 @@ void __udelay (unsigned long usec)
 	if ((tmo + tmp + 1) < tmp) {	/* if setting this forward will roll */
 					/* time stamp, then reset time */
 		gd->lastinc = READ_TIMER;	/* capture incrementer value */
-		gd->tbl = 0;			/* start time stamp */
+		gd->arch.tbl = 0;			/* start time stamp */
 	} else {
 		tmo	+= tmp;		/* else, set advancing stamp wake up time */
 	}

@@ -94,12 +94,15 @@ ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;		/* current tick value */
 
-	if (now >= gd->lastinc)		/* normal mode (non roll) */
-		gd->tbl += (now - gd->lastinc); /* move stamp fordward with absoulte diff ticks */
-	else				/* we have rollover of incrementer */
-		gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
+	if (now >= gd->lastinc) {		/* normal mode (non roll) */
+		/* move stamp fordward with absoulte diff ticks */
+		gd->arch.tbl += (now - gd->lastinc);
+	} else {
+		/* we have rollover of incrementer */
+		gd->arch.tbl += (0xFFFFFFFF - gd->lastinc) + now;
+	}
 	gd->lastinc = now;
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /* waits specified delay value and resets timestamp */

index 781533b..512fb9d 100644
@@ -75,7 +75,7 @@ int timer_init(void)
 	writel(cr, &tmr->cr);
 
 	gd->arch.timer_rate_hz = TIMER_CLOCK;
-	gd->arch.tbu = gd->tbl = 0;
+	gd->arch.tbu = gd->arch.tbl = 0;
 
 	return 0;
 }

@@ -89,10 +89,10 @@ unsigned long long get_ticks(void)
 	ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
 
 	/* increment tbu if tbl has rolled over */
-	if (now < gd->tbl)
+	if (now < gd->arch.tbl)
 		gd->arch.tbu++;
-	gd->tbl = now;
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
+	gd->arch.tbl = now;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
 }
 
 void __udelay(unsigned long usec)

index 91607b5..439ceab 100644
@@ -64,7 +64,7 @@ int timer_init(void)
 
 	writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
 	gd->lastinc = 0;
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 
 	return 0;
 }

@@ -91,14 +91,14 @@ ulong get_timer_raw(void)
 
 	if (now >= gd->lastinc) {
 		/* normal mode */
-		gd->tbl += now - gd->lastinc;
+		gd->arch.tbl += now - gd->lastinc;
 	} else {
 		/* we have an overflow ... */
-		gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
+		gd->arch.tbl += now + TIMER_LOAD_VAL - gd->lastinc;
 	}
 	gd->lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 ulong get_timer_masked(void)

index e59e614..eb2b8d0 100644
@@ -63,7 +63,7 @@ int timer_init(void)
 	tmr = (tmr & ~0x0700000) | 0x0500000;
 	writel(tmr, &timers->tcon);
 	gd->lastinc = 0;
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 
 	return 0;
 }

@@ -130,14 +130,14 @@ unsigned long long get_ticks(void)
 
 	if (gd->lastinc >= now) {
 		/* normal mode */
-		gd->tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->lastinc - now;
 	} else {
 		/* we have an overflow ... */
-		gd->tbl += gd->lastinc + gd->arch.tbu - now;
+		gd->arch.tbl += gd->lastinc + gd->arch.tbu - now;
 	}
 	gd->lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /*

index 18ffd0c..948607f 100644
@@ -61,7 +61,7 @@ struct armd1tmr_registers {
 #define	COUNT_RD_REQ		0x1
 
 DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->arch.tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
 
 /* For preventing risk of instability in reading counter value,
  * first set read request to register cvwr and then read same

@@ -82,14 +82,14 @@ ulong get_timer_masked(void)
 {
 	ulong now = read_timer();
 
-	if (now >= gd->tbl) {
+	if (now >= gd->arch.tbl) {
 		/* normal mode */
-		gd->arch.tbu += now - gd->tbl;
+		gd->arch.tbu += now - gd->arch.tbl;
 	} else {
 		/* we have an overflow ... */
-		gd->arch.tbu += now + TIMER_LOAD_VAL - gd->tbl;
+		gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
 	}
-	gd->tbl = now;
+	gd->arch.tbl = now;
 
 	return gd->arch.tbu;
 }

@@ -135,8 +135,8 @@ int timer_init(void)
 
 	/* Enable timer 0 */
 	writel(0x1, &armd1timers->cer);
-	/* init the gd->arch.tbu and gd->tbl value */
-	gd->tbl = read_timer();
+	/* init the gd->arch.tbu and gd->arch.tbl value */
+	gd->arch.tbl = read_timer();
 	gd->arch.tbu = 0;
 
 	return 0;

index f691518..4443fef 100644
@@ -80,7 +80,7 @@ int timer_init(void)
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
 
 	gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
-	gd->arch.tbu = gd->tbl = 0;
+	gd->arch.tbu = gd->arch.tbl = 0;
 
 	return 0;
 }

@@ -95,10 +95,10 @@ unsigned long long get_ticks(void)
 	ulong now = readl(&pit->piir);
 
 	/* increment tbu if tbl has rolled over */
-	if (now < gd->tbl)
+	if (now < gd->arch.tbl)
 		gd->arch.tbu++;
-	gd->tbl = now;
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
+	gd->arch.tbl = now;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
 }
 
 void __udelay(unsigned long usec)

index e28e6e3..b620bf7 100644
@@ -74,11 +74,11 @@ unsigned long long get_ticks(void)
 	unsigned long now = readl(&timer->tim34);
 
 	/* increment tbu if tbl has rolled over */
-	if (now < gd->tbl)
+	if (now < gd->arch.tbl)
 		gd->arch.tbu++;
-	gd->tbl = now;
+	gd->arch.tbl = now;
 
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
 }
 
 ulong get_timer(ulong base)

index f5d0160..41dc074 100644
@@ -86,7 +86,7 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp gd->tbl
+#define timestamp gd->arch.tbl
 #define lastdec gd->lastinc
 
 ulong get_timer_masked(void)

index 75314b9..1f1900e 100644
@@ -35,7 +35,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp gd->tbl
+#define timestamp gd->arch.tbl
 #define lastdec gd->lastinc
 
 static inline unsigned long long tick_to_time(unsigned long long tick)

index 4dc4041..8b5217f 100644
@@ -44,7 +44,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp	(gd->tbl)
+#define timestamp	(gd->arch.tbl)
 #define lastinc		(gd->lastinc)
 
 /*

index a5dd684..06e3086 100644
@@ -45,7 +45,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp	(gd->tbl)
+#define timestamp	(gd->arch.tbl)
 #define lastinc		(gd->lastinc)
 
 /*

index 4ed75e6..a12a7e3 100644
@@ -36,7 +36,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp (gd->tbl)
+#define timestamp (gd->arch.tbl)
 #define lastdec (gd->lastinc)
 
 /*

index 390c9c8..71b8700 100644
@@ -44,7 +44,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp gd->tbl
+#define timestamp gd->arch.tbl
 #define lastdec gd->lastinc
 
 int timer_init (void)

index 8a8aaf1..f69af71 100644
@@ -92,7 +92,7 @@ static inline ulong read_timer(void)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp gd->tbl
+#define timestamp gd->arch.tbl
 #define lastdec gd->lastinc
 
 ulong get_timer_masked(void)

index 701d439..2d9ddba 100644
@@ -60,7 +60,7 @@ struct panthtmr_registers {
 #define	COUNT_RD_REQ		0x1
 
 DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->arch.tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
 
 /*
  * For preventing risk of instability in reading counter value,

@@ -90,14 +90,14 @@ ulong get_timer_masked(void)
 {
 	ulong now = read_timer();
 
-	if (now >= gd->tbl) {
+	if (now >= gd->arch.tbl) {
 		/* normal mode */
-		gd->arch.tbu += now - gd->tbl;
+		gd->arch.tbu += now - gd->arch.tbl;
 	} else {
 		/* we have an overflow ... */
-		gd->arch.tbu += now + TIMER_LOAD_VAL - gd->tbl;
+		gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
 	}
-	gd->tbl = now;
+	gd->arch.tbl = now;
 
 	return gd->arch.tbu;
 }

@@ -144,8 +144,8 @@ int timer_init(void)
 
 	/* Enable timer 0 */
 	writel(0x1, &panthtimers->cer);
-	/* init the gd->arch.tbu and gd->tbl value */
-	gd->tbl = read_timer();
+	/* init the gd->arch.tbu and gd->arch.tbl value */
+	gd->arch.tbl = read_timer();
 	gd->arch.tbu = 0;
 
 	return 0;

index 1dc7860..06ea65b 100644
@@ -38,7 +38,7 @@ static struct misc_regs *const misc_regs_p =
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp gd->tbl
+#define timestamp gd->arch.tbl
 #define lastdec gd->lastinc
 
 int timer_init(void)

index f58e151..be73b93 100644
@@ -44,7 +44,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp gd->tbl
+#define timestamp gd->arch.tbl
 #define lastdec gd->lastinc
 
 #define TIMER_ENABLE	(1 << 7)

index 9f8bc93..e321d53 100644
@@ -57,7 +57,7 @@ int timer_init(void)
 
 	/* reset time, capture current incrementer value time */
 	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
+	gd->arch.tbl = 0;	/* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -91,14 +91,15 @@ ulong get_timer_masked(void)
 	/* current tick value */
 	ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
 
-	if (now >= gd->lastinc)	/* normal mode (non roll) */
+	if (now >= gd->lastinc) {	/* normal mode (non roll) */
 		/* move stamp fordward with absoulte diff ticks */
-		gd->tbl += (now - gd->lastinc);
-	else	/* we have rollover of incrementer */
-		gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ))
-			     - gd->lastinc) + now;
+		gd->arch.tbl += (now - gd->lastinc);
+	} else {	/* we have rollover of incrementer */
+		gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK /
+				CONFIG_SYS_HZ)) - gd->lastinc) + now;
+	}
 	gd->lastinc = now;
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /*

index bb0e795..1566226 100644
@@ -106,7 +106,7 @@ void reset_timer_masked(void)
 
 	/* reset time */
 	gd->lastinc = readl(&timer->tcnto4);
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 }
 
 unsigned long get_timer_masked(void)

@@ -124,13 +124,13 @@ unsigned long get_current_tick(void)
 	unsigned long count_value = readl(&timer->tcntb4);
 
 	if (gd->lastinc >= now)
-		gd->tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->lastinc - now;
 	else
-		gd->tbl += gd->lastinc + count_value - now;
+		gd->arch.tbl += gd->lastinc + count_value - now;
 
 	gd->lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /*

index 321e9b4..a742121 100644
@@ -83,13 +83,13 @@ ulong get_timer_masked(void)
 	if (gd->lastinc >= now) {
 		/* normal mode (non roll) */
 		/* move stamp forward with absolute diff ticks */
-		gd->tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->lastinc - now;
 	} else {
 		/* we have overflow of the count down timer */
-		gd->tbl += TIMER_LOAD_VAL - gd->lastinc + now;
+		gd->arch.tbl += TIMER_LOAD_VAL - gd->lastinc + now;
 	}
 	gd->lastinc = now;
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /*

@@ -100,5 +100,5 @@ void reset_timer(void)
 	/* capture current decrementer value time */
 	gd->lastinc = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
 	/* start "advancing" time stamp from 0 */
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 }

index bb9165b..a20897b 100644
@@ -100,12 +100,14 @@ ulong get_timer_masked(void)
 	/* current tick value */
 	ulong now = TICKS_TO_HZ(READ_TIMER());
 
-	if (now >= gd->lastinc)	/* normal (non rollover) */
-		gd->tbl += (now - gd->lastinc);
-	else			/* rollover */
-		gd->tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + now;
+	if (now >= gd->lastinc) {	/* normal (non rollover) */
+		gd->arch.tbl += (now - gd->lastinc);
+	} else {			/* rollover */
+		gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc)
+				+ now;
+	}
 	gd->lastinc = now;
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /* Delay x useconds */

index 323e7b5..e126ebb 100644
@@ -85,7 +85,7 @@ int timer_init(void)
 	/* Reset time */
 	gd->lastinc = readl(&timer_base->counter) /
 					(TIMER_TICK_HZ / CONFIG_SYS_HZ);
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 
 	return 0;
 }

@@ -102,14 +102,14 @@ ulong get_timer_masked(void)
 
 	if (gd->lastinc >= now) {
 		/* Normal mode */
-		gd->tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->lastinc - now;
 	} else {
 		/* We have an overflow ... */
-		gd->tbl += gd->lastinc + TIMER_LOAD_VAL - now;
+		gd->arch.tbl += gd->lastinc + TIMER_LOAD_VAL - now;
 	}
 	gd->lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 void __udelay(unsigned long usec)

index a8f7462..7799c14 100644
@@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define	TIMER_LOAD_VAL	0xffffffff
 
-#define	timestamp	(gd->tbl)
+#define	timestamp	(gd->arch.tbl)
 #define	lastinc		(gd->lastinc)
 
 #if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)

index 034ea5a..dc9cc6c 100644
@@ -77,12 +77,12 @@ ulong get_timer_masked(void)
 
 	if (now >= gd->lastinc)	/* normal mode (non roll) */
 		/* move stamp forward with absolute diff ticks */
-		gd->tbl += (now - gd->lastinc);
+		gd->arch.tbl += (now - gd->lastinc);
 	else	/* we have rollover of incrementer */
-		gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
+		gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
 				- gd->lastinc) + now;
 	gd->lastinc = now;
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 /*

index b021903..de21e44 100644
@@ -48,7 +48,7 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp (gd->tbl)
+#define timestamp (gd->arch.tbl)
 #define lastinc (gd->lastinc)
 
 static inline unsigned long long tick_to_time(unsigned long long tick)

index 5d37061..41bef04 100644
@@ -38,6 +38,7 @@ struct arch_global_data {
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long timer_rate_hz;
 	unsigned long tbu;
+	unsigned long tbl;
 };
 
 /*

@@ -64,7 +65,6 @@ typedef	struct	global_data {
 #endif
 #ifdef CONFIG_ARM
 	/* "static data" needed by most of timer.c on ARM platforms */
-	unsigned long	tbl;
 	unsigned long long	timer_reset_value;
 	unsigned long	lastinc;
 #endif

index b6b3855..8ac8bf7 100644
@@ -35,7 +35,7 @@ void reset_timer_masked(void)
 {
 	/* reset time */
 	gd->lastinc = readl(&tcu->tcnt0);
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 }
 
 ulong get_timer_masked(void)

@@ -43,15 +43,15 @@ ulong get_timer_masked(void)
 	ulong now = readl(&tcu->tcnt0);
 
 	if (gd->lastinc <= now)
-		gd->tbl += now - gd->lastinc; /* normal mode */
+		gd->arch.tbl += now - gd->lastinc; /* normal mode */
 	else {
 		/* we have an overflow ... */
-		gd->tbl += TIMER_FDATA + now - gd->lastinc;
+		gd->arch.tbl += TIMER_FDATA + now - gd->lastinc;
 	}
 
 	gd->lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 void udelay_masked(unsigned long usec)

@@ -95,7 +95,7 @@ int timer_init(void)
 	writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
 
 	gd->lastinc = 0;
-	gd->tbl = 0;
+	gd->arch.tbl = 0;
 
 	return 0;
 }

@@ -112,7 +112,7 @@ ulong get_timer(ulong base)
 
 void set_timer(ulong t)
 {
-	gd->tbl = t;
+	gd->arch.tbl = t;
 }
 
 void __udelay(unsigned long usec)

index 7a377cc..1a7f71e 100644
@@ -115,12 +115,12 @@ unsigned long long get_ticks(void)
 {
 	ulong now = GPTCNT; /* current tick value */
 
-	if (now >= gd->lastinc)	/* normal mode (non roll) */
+	if (now >= gd->arch.lastinc)	/* normal mode (non roll) */
 		/* move stamp forward with absolut diff ticks */
-		gd->arch.tbl += (now - gd->lastinc);
+		gd->arch.tbl += (now - gd->arch.lastinc);
 	else			/* we have rollover of incrementer */
-		gd->arch.tbl += (0xFFFFFFFF - gd->lastinc) + now;
-	gd->lastinc = now;
+		gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+	gd->arch.lastinc = now;
 	return gd->arch.tbl;
 }
 

index c21ca3f..584ad15 100644
@@ -33,7 +33,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp	(gd->arch.tbl)
-#define lastinc		(gd->lastinc)
+#define lastinc		(gd->arch.lastinc)
 
 /* General purpose timers bitfields */
 #define GPTCR_SWR       (1<<15)	/* Software reset */

index e179bb5..53015cb 100644
@@ -51,7 +51,7 @@ int timer_init (void)
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val;	/* start timer */
 
 	/* reset time */
-	gd->lastinc = READ_TIMER;	/* capture current incrementer value */
+	gd->arch.lastinc = READ_TIMER;	/* capture current incrementer value */
 	gd->arch.tbl = 0;		/* start "advancing" time stamp */
 
 	return(0);

@@ -81,7 +81,7 @@ void __udelay (unsigned long usec)
 	tmp = get_timer (0);		/* get current timestamp */
 	if ((tmo + tmp + 1) < tmp) {	/* if setting this forward will roll */
 					/* time stamp, then reset time */
-		gd->lastinc = READ_TIMER;	/* capture incrementer value */
+		gd->arch.lastinc = READ_TIMER;	/* capture incrementer value */
 		gd->arch.tbl = 0;			/* start time stamp */
 	} else {
 		tmo	+= tmp;		/* else, set advancing stamp wake up time */

@@ -94,14 +94,14 @@ ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;		/* current tick value */
 
-	if (now >= gd->lastinc) {		/* normal mode (non roll) */
+	if (now >= gd->arch.lastinc) {		/* normal mode (non roll) */
 		/* move stamp fordward with absoulte diff ticks */
-		gd->arch.tbl += (now - gd->lastinc);
+		gd->arch.tbl += (now - gd->arch.lastinc);
 	} else {
 		/* we have rollover of incrementer */
-		gd->arch.tbl += (0xFFFFFFFF - gd->lastinc) + now;
+		gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 	return gd->arch.tbl;
 }
 

index 439ceab..8ce7584 100644
@@ -63,7 +63,7 @@ int timer_init(void)
 	writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
 
 	writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
-	gd->lastinc = 0;
+	gd->arch.lastinc = 0;
 	gd->arch.tbl = 0;
 
 	return 0;

@@ -89,14 +89,14 @@ ulong get_timer_raw(void)
 
 	now = readl(&tc->tc[0].cv) & 0x0000ffff;
 
-	if (now >= gd->lastinc) {
+	if (now >= gd->arch.lastinc) {
 		/* normal mode */
-		gd->arch.tbl += now - gd->lastinc;
+		gd->arch.tbl += now - gd->arch.lastinc;
 	} else {
 		/* we have an overflow ... */
-		gd->arch.tbl += now + TIMER_LOAD_VAL - gd->lastinc;
+		gd->arch.tbl += now + TIMER_LOAD_VAL - gd->arch.lastinc;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
 	return gd->arch.tbl;
 }

index eb2b8d0..d76bf18 100644
@@ -62,7 +62,7 @@ int timer_init(void)
 	/* auto load, start timer 4 */
 	tmr = (tmr & ~0x0700000) | 0x0500000;
 	writel(tmr, &timers->tcon);
-	gd->lastinc = 0;
+	gd->arch.lastinc = 0;
 	gd->arch.tbl = 0;
 
 	return 0;

@@ -128,14 +128,14 @@ unsigned long long get_ticks(void)
 	struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
 	ulong now = readl(&timers->tcnto4) & 0xffff;
 
-	if (gd->lastinc >= now) {
+	if (gd->arch.lastinc >= now) {
 		/* normal mode */
-		gd->arch.tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->arch.lastinc - now;
 	} else {
 		/* we have an overflow ... */
-		gd->arch.tbl += gd->lastinc + gd->arch.tbu - now;
+		gd->arch.tbl += gd->arch.lastinc + gd->arch.tbu - now;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
 	return gd->arch.tbl;
 }

index 41dc074..85e81e3 100644
@@ -87,7 +87,7 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE;
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp gd->arch.tbl
-#define lastdec gd->lastinc
+#define lastdec gd->arch.lastinc
 
 ulong get_timer_masked(void)
 {

index 1f1900e..c6486c1 100644
@@ -36,7 +36,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp gd->arch.tbl
-#define lastdec gd->lastinc
+#define lastdec gd->arch.lastinc
 
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {

index 8b5217f..f8bebcc 100644
@@ -45,7 +45,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp	(gd->arch.tbl)
-#define lastinc		(gd->lastinc)
+#define lastinc		(gd->arch.lastinc)
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,

index 06e3086..07e132a 100644
@@ -46,7 +46,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp	(gd->arch.tbl)
-#define lastinc		(gd->lastinc)
+#define lastinc		(gd->arch.lastinc)
 
 /*
  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,

index a12a7e3..3738411 100644
@@ -37,7 +37,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp (gd->arch.tbl)
-#define lastdec (gd->lastinc)
+#define lastdec (gd->arch.lastinc)
 
 /*
  * This driver uses 1kHz clock source.

index 71b8700..34ec7b2 100644
@@ -45,7 +45,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp gd->arch.tbl
-#define lastdec gd->lastinc
+#define lastdec gd->arch.lastinc
 
 int timer_init (void)
 {

index f69af71..f723351 100644
@@ -93,7 +93,7 @@ static inline ulong read_timer(void)
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp gd->arch.tbl
-#define lastdec gd->lastinc
+#define lastdec gd->arch.lastinc
 
 ulong get_timer_masked(void)
 {

index 06ea65b..de4ba7b 100644
@@ -39,7 +39,7 @@ static struct misc_regs *const misc_regs_p =
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp gd->arch.tbl
-#define lastdec gd->lastinc
+#define lastdec gd->arch.lastinc
 
 int timer_init(void)
 {

index be73b93..b36d6d9 100644
@@ -45,7 +45,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp gd->arch.tbl
-#define lastdec gd->lastinc
+#define lastdec gd->arch.lastinc
 
 #define TIMER_ENABLE	(1 << 7)
 #define TIMER_MODE_MSK	(1 << 6)

index e321d53..36bea5f 100644
@@ -56,7 +56,8 @@ int timer_init(void)
 		&timer_base->tclr);
 
 	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	gd->arch.lastinc = readl(&timer_base->tcrr) /
+					(TIMER_CLOCK / CONFIG_SYS_HZ);
 	gd->arch.tbl = 0;	/* start "advancing" time stamp from 0 */
 
 	return 0;

@@ -91,14 +92,14 @@ ulong get_timer_masked(void)
 	/* current tick value */
 	ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
 
-	if (now >= gd->lastinc) {	/* normal mode (non roll) */
+	if (now >= gd->arch.lastinc) {	/* normal mode (non roll) */
 		/* move stamp fordward with absoulte diff ticks */
-		gd->arch.tbl += (now - gd->lastinc);
+		gd->arch.tbl += (now - gd->arch.lastinc);
 	} else {	/* we have rollover of incrementer */
 		gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK /
-				CONFIG_SYS_HZ)) - gd->lastinc) + now;
+				CONFIG_SYS_HZ)) - gd->arch.lastinc) + now;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 	return gd->arch.tbl;
 }
 

index 1566226..e78c716 100644
@@ -105,7 +105,7 @@ void reset_timer_masked(void)
 	struct s5p_timer *const timer = s5p_get_base_timer();
 
 	/* reset time */
-	gd->lastinc = readl(&timer->tcnto4);
+	gd->arch.lastinc = readl(&timer->tcnto4);
 	gd->arch.tbl = 0;
 }
 

@@ -123,12 +123,12 @@ unsigned long get_current_tick(void)
 	unsigned long now = readl(&timer->tcnto4);
 	unsigned long count_value = readl(&timer->tcntb4);
 
-	if (gd->lastinc >= now)
-		gd->arch.tbl += gd->lastinc - now;
+	if (gd->arch.lastinc >= now)
+		gd->arch.tbl += gd->arch.lastinc - now;
 	else
-		gd->arch.tbl += gd->lastinc + count_value - now;
+		gd->arch.tbl += gd->arch.lastinc + count_value - now;
 
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
 	return gd->arch.tbl;
 }

index a742121..efa28c2 100644
@@ -80,15 +80,15 @@ ulong get_timer_masked(void)
 {
 	/* current tick value */
 	ulong now = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
-	if (gd->lastinc >= now) {
+	if (gd->arch.lastinc >= now) {
 		/* normal mode (non roll) */
 		/* move stamp forward with absolute diff ticks */
-		gd->arch.tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->arch.lastinc - now;
 	} else {
 		/* we have overflow of the count down timer */
-		gd->arch.tbl += TIMER_LOAD_VAL - gd->lastinc + now;
+		gd->arch.tbl += TIMER_LOAD_VAL - gd->arch.lastinc + now;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 	return gd->arch.tbl;
 }
 

@@ -98,7 +98,8 @@ ulong get_timer_masked(void)
 void reset_timer(void)
 {
 	/* capture current decrementer value time */
-	gd->lastinc = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
+	gd->arch.lastinc = read_timer() /
+				(CONFIG_TIMER_CLOCK_KHZ / CONFIG_SYS_HZ);
 	/* start "advancing" time stamp from 0 */
 	gd->arch.tbl = 0;
 }

index a20897b..a4b88f3 100644
@@ -100,13 +100,13 @@ ulong get_timer_masked(void)
 	/* current tick value */
 	ulong now = TICKS_TO_HZ(READ_TIMER());
 
-	if (now >= gd->lastinc) {	/* normal (non rollover) */
-		gd->arch.tbl += (now - gd->lastinc);
+	if (now >= gd->arch.lastinc) {	/* normal (non rollover) */
+		gd->arch.tbl += (now - gd->arch.lastinc);
 	} else {			/* rollover */
-		gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc)
-				+ now;
+		gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) -
+					gd->arch.lastinc) + now;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 	return gd->arch.tbl;
 }
 

index e126ebb..45b405a 100644
@@ -83,7 +83,7 @@ int timer_init(void)
 								emask);
 
 	/* Reset time */
-	gd->lastinc = readl(&timer_base->counter) /
+	gd->arch.lastinc = readl(&timer_base->counter) /
 					(TIMER_TICK_HZ / CONFIG_SYS_HZ);
 	gd->arch.tbl = 0;
 

@@ -100,14 +100,14 @@ ulong get_timer_masked(void)
 
 	now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ);
 
-	if (gd->lastinc >= now) {
+	if (gd->arch.lastinc >= now) {
 		/* Normal mode */
-		gd->arch.tbl += gd->lastinc - now;
+		gd->arch.tbl += gd->arch.lastinc - now;
 	} else {
 		/* We have an overflow ... */
-		gd->arch.tbl += gd->lastinc + TIMER_LOAD_VAL - now;
+		gd->arch.tbl += gd->arch.lastinc + TIMER_LOAD_VAL - now;
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
 	return gd->arch.tbl;
 }

index 087ddf8..0450b51 100644
@@ -70,13 +70,13 @@ unsigned long long get_ticks(void)
 
 	if (readl(IXP425_OSST) & IXP425_OSST_TIMER_TS_PEND) {
 		/* rollover of timestamp timer register */
-		gd->timestamp += (0xFFFFFFFF - gd->lastinc) + now + 1;
+		gd->timestamp += (0xFFFFFFFF - gd->arch.lastinc) + now + 1;
 		writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
 	} else {
 		/* move stamp forward with absolut diff ticks */
-		gd->timestamp += (now - gd->lastinc);
+		gd->timestamp += (now - gd->arch.lastinc);
 	}
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 	return gd->timestamp;
 }
 

@@ -84,7 +84,7 @@ unsigned long long get_ticks(void)
 void reset_timer_masked(void)
 {
 	/* capture current timestamp counter */
-	gd->lastinc = readl(IXP425_OSTS_B);
+	gd->arch.lastinc = readl(IXP425_OSTS_B);
 	/* start "advancing" time stamp from 0 */
 	gd->timestamp = 0;
 }

index 7799c14..212b31e 100644
@@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define	TIMER_LOAD_VAL	0xffffffff
 
 #define	timestamp	(gd->arch.tbl)
-#define	lastinc		(gd->lastinc)
+#define	lastinc		(gd->arch.lastinc)
 
 #if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 #define	TIMER_FREQ_HZ	3250000

index dc9cc6c..51902e9 100644
@@ -75,13 +75,13 @@ ulong get_timer_masked(void)
 	/* current tick value */
 	now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ);
 
-	if (now >= gd->lastinc)	/* normal mode (non roll) */
+	if (now >= gd->arch.lastinc)	/* normal mode (non roll) */
 		/* move stamp forward with absolute diff ticks */
-		gd->arch.tbl += (now - gd->lastinc);
+		gd->arch.tbl += (now - gd->arch.lastinc);
 	else	/* we have rollover of incrementer */
 		gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
-				- gd->lastinc) + now;
-	gd->lastinc = now;
+				- gd->arch.lastinc) + now;
+	gd->arch.lastinc = now;
 	return gd->arch.tbl;
 }
 

index de21e44..ab37d64 100644
@@ -49,7 +49,7 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
 DECLARE_GLOBAL_DATA_PTR;
 
 #define timestamp (gd->arch.tbl)
-#define lastinc (gd->lastinc)
+#define lastinc (gd->arch.lastinc)
 
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {

index 41bef04..7d7f3cf 100644
@@ -39,6 +39,7 @@ struct arch_global_data {
 	unsigned long timer_rate_hz;
 	unsigned long tbu;
 	unsigned long tbl;
+	unsigned long lastinc;
 };
 
 /*

@@ -66,7 +67,6 @@ typedef	struct	global_data {
 #ifdef CONFIG_ARM
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long long	timer_reset_value;
-	unsigned long	lastinc;
 #endif
 #ifdef CONFIG_IXP425
 	unsigned long	timestamp;

index 8ac8bf7..8c33d3c 100644
@@ -34,7 +34,7 @@ static struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
 void reset_timer_masked(void)
 {
 	/* reset time */
-	gd->lastinc = readl(&tcu->tcnt0);
+	gd->arch.lastinc = readl(&tcu->tcnt0);
 	gd->arch.tbl = 0;
 }
 

@@ -42,14 +42,14 @@ ulong get_timer_masked(void)
 {
 	ulong now = readl(&tcu->tcnt0);
 
-	if (gd->lastinc <= now)
-		gd->arch.tbl += now - gd->lastinc; /* normal mode */
+	if (gd->arch.lastinc <= now)
+		gd->arch.tbl += now - gd->arch.lastinc; /* normal mode */
 	else {
 		/* we have an overflow ... */
-		gd->arch.tbl += TIMER_FDATA + now - gd->lastinc;
+		gd->arch.tbl += TIMER_FDATA + now - gd->arch.lastinc;
 	}
 
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
 	return gd->arch.tbl;
 }

@@ -94,7 +94,7 @@ int timer_init(void)
 	writel(1 << TIMER_CHAN, &tcu->tscr); /* enable timer clock */
 	writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
 
-	gd->lastinc = 0;
+	gd->arch.lastinc = 0;
 	gd->arch.tbl = 0;
 
 	return 0;

index b620bf7..4142932 100644
@@ -61,7 +61,7 @@ int timer_init(void)
 	writel(TIMER_LOAD_VAL, &timer->prd34);
 	writel(2 << 22, &timer->tcr);
 	gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
-	gd->timer_reset_value = 0;
+	gd->arch.timer_reset_value = 0;
 
 	return(0);
 }

@@ -85,7 +85,7 @@ ulong get_timer(ulong base)
 {
 	unsigned long long timer_diff;
 
-	timer_diff = get_ticks() - gd->timer_reset_value;
+	timer_diff = get_ticks() - gd->arch.timer_reset_value;
 
 	return lldiv(timer_diff,
 		     (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;

index 7d7f3cf..95e23e1 100644
@@ -40,6 +40,7 @@ struct arch_global_data {
 	unsigned long tbu;
 	unsigned long tbl;
 	unsigned long lastinc;
+	unsigned long long timer_reset_value;
 };
 
 /*

@@ -64,10 +65,6 @@ typedef	struct	global_data {
 #ifdef CONFIG_FSL_ESDHC
 	unsigned long	sdhc_clk;
 #endif
-#ifdef CONFIG_ARM
-	/* "static data" needed by most of timer.c on ARM platforms */
-	unsigned long long	timer_reset_value;
-#endif
 #ifdef CONFIG_IXP425
 	unsigned long	timestamp;
 #endif

index 0450b51..663d989 100644
@@ -70,14 +70,14 @@ unsigned long long get_ticks(void)
 
 	if (readl(IXP425_OSST) & IXP425_OSST_TIMER_TS_PEND) {
 		/* rollover of timestamp timer register */
-		gd->timestamp += (0xFFFFFFFF - gd->arch.lastinc) + now + 1;
+		gd->arch.timestamp += (0xFFFFFFFF - gd->arch.lastinc) + now + 1;
 		writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
 	} else {
 		/* move stamp forward with absolut diff ticks */
-		gd->timestamp += (now - gd->arch.lastinc);
+		gd->arch.timestamp += (now - gd->arch.lastinc);
 	}
 	gd->arch.lastinc = now;
-	return gd->timestamp;
+	return gd->arch.timestamp;
 }
 
 

@@ -86,7 +86,7 @@ void reset_timer_masked(void)
 	/* capture current timestamp counter */
 	gd->arch.lastinc = readl(IXP425_OSTS_B);
 	/* start "advancing" time stamp from 0 */
-	gd->timestamp = 0;
+	gd->arch.timestamp = 0;
 }
 
 ulong get_timer_masked(void)

index 95e23e1..35d07d0 100644
@@ -41,6 +41,9 @@ struct arch_global_data {
 	unsigned long tbl;
 	unsigned long lastinc;
 	unsigned long long timer_reset_value;
+#ifdef CONFIG_IXP425
+	unsigned long timestamp;
+#endif
 };
 
 /*

@@ -65,9 +68,6 @@ typedef	struct	global_data {
 #ifdef CONFIG_FSL_ESDHC
 	unsigned long	sdhc_clk;
 #endif
-#ifdef CONFIG_IXP425
-	unsigned long	timestamp;
-#endif
 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
 	phys_size_t	ram_size;	/* RAM size */
 	unsigned long	mon_len;	/* monitor len */

index 475bb44..e693b01 100644
@@ -62,9 +62,6 @@ typedef	struct global_data {
 	unsigned long	mon_len;	/* monitor len */
 	unsigned long	irq_sp;		/* irq stack pointer */
 	unsigned long	start_addr_sp;	/* start_addr_stackpointer */
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-	unsigned long	tlb_addr;
-#endif
 
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */

index 91395ca..09feaf3 100644
@@ -207,17 +207,6 @@ void board_init_f(ulong bootflag)
 
 	addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
 
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-	/* reserve TLB table */
-	addr -= (4096 * 4);
-
-	/* round down to next 64 kB limit */
-	addr &= ~(0x10000 - 1);
-
-	gd->tlb_addr = addr;
-	debug("TLB table at: %08lx\n", addr);
-#endif
-
 	/* round down to next 4 kB limit */
 	addr &= ~(4096 - 1);
 	debug("Top of RAM usable for U-Boot at: %08lx\n", addr);

index 35d07d0..0d1ebfd 100644
@@ -44,6 +44,9 @@ struct arch_global_data {
 #ifdef CONFIG_IXP425
 	unsigned long timestamp;
 #endif
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+	unsigned long tlb_addr;
+#endif
 };
 
 /*

@@ -74,9 +77,6 @@ typedef	struct	global_data {
 	unsigned long	irq_sp;		/* irq stack pointer */
 	unsigned long	start_addr_sp;	/* start_addr_stackpointer */
 	unsigned long	reloc_off;
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-	unsigned long	tlb_addr;
-#endif
 	const void	*fdt_blob;	/* Our device tree, NULL if none */
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */

index 22a4d9c..637fb01 100644
@@ -358,7 +358,7 @@ void board_init_f(ulong bootflag)
 	/* round down to next 64 kB limit */
 	addr &= ~(0x10000 - 1);
 
-	gd->tlb_addr = addr;
+	gd->arch.tlb_addr = addr;
 	debug("TLB table at: %08lx\n", addr);
 #endif
 

index 939de10..5df6735 100644
@@ -52,7 +52,7 @@ static void cp_delay (void)
 
 static inline void dram_bank_mmu_setup(int bank)
 {
-	u32 *page_table = (u32 *)gd->tlb_addr;
+	u32 *page_table = (u32 *)gd->arch.tlb_addr;
 	bd_t *bd = gd->bd;
 	int	i;
 

@@ -67,7 +67,7 @@ static inline void dram_bank_mmu_setup(int bank)
 /* to activate the MMU we need to set up virtual memory: use 1M areas */
 static inline void mmu_setup(void)
 {
-	u32 *page_table = (u32 *)gd->tlb_addr;
+	u32 *page_table = (u32 *)gd->arch.tlb_addr;
 	int i;
 	u32 reg;
 

index 48cdd16..82a3693 100644
@@ -371,7 +371,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif
 	printf("baudrate    = %u bps\n", bd->bi_baudrate);
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-	print_num("TLB addr", gd->tlb_addr);
+	print_num("TLB addr", gd->arch.tlb_addr);
 #endif
 	print_num("relocaddr", gd->relocaddr);
 	print_num("reloc off", gd->reloc_off);

index 39c1acf..9a4f141 100644
@@ -61,7 +61,6 @@ struct global_data {
 	unsigned long	bus_clk;
 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
 	unsigned long	start_addr_sp;	/* start_addr_stackpointer */
-	unsigned long	gdt_addr;	/* Location of GDT */
 	phys_size_t	ram_size;	/* RAM size */
 	unsigned long	reset_status;	/* reset status register at boot */
 	const void	*fdt_blob;	/* Our device tree, NULL if none */

index 9a4f141..eded279 100644
@@ -28,6 +28,7 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
+	struct global_data *gd_addr;		/* Location of Global Data */
 };
 
 /*

@@ -44,8 +45,6 @@ typedef struct global_data gd_t;
 
 struct global_data {
 	struct arch_global_data arch;	/* architecture-specific data */
-	/* NOTE: gd_addr MUST be first member of struct global_data! */
-	gd_t *gd_addr;	/* Location of Global Data */
 	bd_t		*bd;
 	unsigned long	flags;
 	unsigned int	baudrate;

index 315e87a..6a23974 100644
@@ -100,7 +100,9 @@ void setup_gdt(gd_t *id, u64 *gdt_addr)
 	gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
 
 	/* FS: data, read/write, 4 GB, base (Global Data Pointer) */
-	gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093, (ulong)id, 0xfffff);
+	id->arch.gd_addr = id;
+	gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
+		     (ulong)&id->arch.gd_addr, 0xfffff);
 
 	/* 16-bit CS: code, read/execute, 64 kB, base 0 */
 	gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);

index eded279..06dd84f 100644
@@ -53,7 +53,6 @@ struct global_data {
 	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */
 #endif
 	unsigned long	reloc_off;	/* Relocation Offset */
-	unsigned long	load_off;	/* Load Offset */
 	unsigned long	env_addr;	/* Address  of Environment struct */
 	unsigned long	env_valid;	/* Checksum of Environment valid? */
 	unsigned long	cpu_clk;	/* CPU clock in Hz!		*/

@@ -61,7 +60,6 @@ struct global_data {
 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
 	unsigned long	start_addr_sp;	/* start_addr_stackpointer */
 	phys_size_t	ram_size;	/* RAM size */
-	unsigned long	reset_status;	/* reset status register at boot */
 	const void	*fdt_blob;	/* Our device tree, NULL if none */
 	void		**jt;		/* jump table */
 	char		env_buf[32];	/* buffer for getenv() before reloc. */

index 082957e..e5bfed1 100644
@@ -101,7 +101,7 @@ m8260_cpm_hostalloc(uint size, uint align)
  * Baud rate clocks are zero-based in the driver code (as that maps
  * to port numbers).  Documentation uses 1-based numbering.
  */
-#define BRG_INT_CLK	gd->brg_clk
+#define BRG_INT_CLK	gd->arch.brg_clk
 #define BRG_UART_CLK	(BRG_INT_CLK / 16)
 
 /* This function is used by UARTs, or anything else that uses a 16x

index 7382cba..b720b1f 100644
@@ -259,7 +259,7 @@ void i2c_init(int speed, int slaveadd)
 	 * divide BRGCLK by 1)
 	 */
 	debug("[I2C] Setting rate...\n");
-	i2c_setrate(gd->brg_clk, CONFIG_SYS_I2C_SPEED);
+	i2c_setrate(gd->arch.brg_clk, CONFIG_SYS_I2C_SPEED);
 
 	/* Set I2C controller in master mode */
 	i2c->i2c_i2com = 0x01;

index bb50dee..4ad1ec2 100644
@@ -145,7 +145,7 @@ int get_clocks (void)
 	gd->cpm_clk = gd->vco_out / 2;
 	gd->bus_clk = clkin;
 	gd->scc_clk = gd->vco_out / 4;
-	gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+	gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
 
 	if (cp->b2c_mult > 0) {
 		gd->cpu_clk = (clkin * cp->b2c_mult) / 2;

@@ -231,7 +231,7 @@ int prt_8260_clks (void)
 			plldf, pllmf, pcidf);
 
 	printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
-			gd->vco_out, gd->scc_clk, gd->brg_clk);
+			gd->vco_out, gd->scc_clk, gd->arch.brg_clk);
 
 	printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
 			gd->cpu_clk, gd->cpm_clk, gd->bus_clk);

index b8c05d1..21e8b0a 100644
@@ -496,7 +496,7 @@ int get_clocks(void)
 #endif
 #if defined(CONFIG_QE)
 	gd->qe_clk = qe_clk;
-	gd->brg_clk = brg_clk;
+	gd->arch.brg_clk = brg_clk;
 #endif
 #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
 	defined(CONFIG_MPC837x)

@@ -540,7 +540,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	printf("  Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
 #if defined(CONFIG_QE)
 	printf("  QE:                  %-4s MHz\n", strmhz(buf, gd->qe_clk));
-	printf("  BRG:                 %-4s MHz\n", strmhz(buf, gd->brg_clk));
+	printf("  BRG:                 %-4s MHz\n",
+	       strmhz(buf, gd->arch.brg_clk));
 #endif
 	printf("  Local Bus Controller:%-4s MHz\n", strmhz(buf, gd->lbiu_clk));
 	printf("  Local Bus:           %-4s MHz\n", strmhz(buf, gd->lclk_clk));

index 292b723..7f10476 100644
@@ -110,7 +110,7 @@ m8560_cpm_hostalloc(uint size, uint align)
  * Baud rate clocks are zero-based in the driver code (as that maps
  * to port numbers).  Documentation uses 1-based numbering.
  */
-#define BRG_INT_CLK	gd->brg_clk
+#define BRG_INT_CLK	gd->arch.brg_clk
 #define BRG_UART_CLK	((BRG_INT_CLK + 15) / 16)
 
 /* This function is used by UARTS, or anything else that uses a 16x

index 801ee07..8a581ef 100644
@@ -395,7 +395,7 @@ int get_clocks (void)
 
 #ifdef CONFIG_QE
 	gd->qe_clk = sys_info.freqQE;
-	gd->brg_clk = gd->qe_clk / 2;
+	gd->arch.brg_clk = gd->qe_clk / 2;
 #endif
 	/*
 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,

@@ -438,7 +438,7 @@ int get_clocks (void)
 	gd->vco_out = 2*sys_info.freqSystemBus;
 	gd->cpm_clk = gd->vco_out / 2;
 	gd->scc_clk = gd->vco_out / 4;
-	gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+	gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
 #endif
 
 	if(gd->cpu_clk != 0) return (0);

index 7130983..7edd7e4 100644
@@ -37,7 +37,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 		"clock-frequency", bd->bi_intfreq, 1);
 	do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
-		gd->brg_clk, 1);
+		gd->arch.brg_clk, 1);
 
 	/* Fixup ethernet MAC addresses */
 	fdt_fixup_ethernet(blob);

index 6e13e5d..091b49f 100644
@@ -192,7 +192,7 @@ void get_brgclk(uint sccr)
 			divider = 64;
 			break;
 	}
-	gd->brg_clk = gd->cpu_clk/divider;
+	gd->arch.brg_clk = gd->cpu_clk/divider;
 }
 
 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)

index df621da..ac348c6 100644
@@ -29,6 +29,15 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
+#if defined(CONFIG_8xx)
+	unsigned long brg_clk;
+#endif
+#if defined(CONFIG_CPM2)
+	unsigned long brg_clk;
+#endif
+#if defined(CONFIG_QE)
+	u32 brg_clk;
+#endif
 };
 
 /*

@@ -45,15 +54,11 @@ typedef	struct	global_data {
 	unsigned int	baudrate;
 	unsigned long	cpu_clk;	/* CPU clock in Hz! */
 	unsigned long	bus_clk;
-#if defined(CONFIG_8xx)
-	unsigned long	brg_clk;
-#endif
 #if defined(CONFIG_CPM2)
 	/* There are many clocks on the MPC8260 - see page 9-5 */
 	unsigned long	vco_out;
 	unsigned long	cpm_clk;
 	unsigned long	scc_clk;
-	unsigned long	brg_clk;
 #ifdef CONFIG_PCI
 	unsigned long	pci_clk;
 #endif

@@ -106,7 +111,6 @@ typedef	struct	global_data {
 #endif
 #if defined(CONFIG_QE)
 	u32 qe_clk;
-	u32 brg_clk;
 	uint mp_alloc_base;
 	uint mp_alloc_top;
 #endif /* CONFIG_QE */

index 1b051e1..4174a73 100644
@@ -581,7 +581,7 @@ void board_init_f(ulong bootflag)
 	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
 #if defined(CONFIG_CPM2)
 	bd->bi_cpmfreq = gd->cpm_clk;
-	bd->bi_brgfreq = gd->brg_clk;
+	bd->bi_brgfreq = gd->arch.brg_clk;
 	bd->bi_sccfreq = gd->scc_clk;
 	bd->bi_vco = gd->vco_out;
 #endif /* CONFIG_CPM2 */

index 1f59c1e..fdf9489 100644
@@ -453,7 +453,7 @@ static void prbrg (int n, uint val)
 #if defined(CONFIG_8xx)
 	ulong clock = gd->cpu_clk;
 #elif defined(CONFIG_8260)
-	ulong clock = gd->brg_clk;
+	ulong clock = gd->arch.brg_clk;
 #endif
 
 	printf ("BRG%d:", n);

index 73e9060..1a123b8 100644
@@ -77,13 +77,13 @@ void ft_qe_setup(void *blob)
 	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
 		"bus-frequency", gd->qe_clk, 1);
 	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
-		"brg-frequency", gd->brg_clk, 1);
+		"brg-frequency", gd->arch.brg_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe",
 		"clock-frequency", gd->qe_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe",
 		"bus-frequency", gd->qe_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe",
-		"brg-frequency", gd->brg_clk, 1);
+		"brg-frequency", gd->arch.brg_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
 		"clock-frequency", gd->qe_clk / 2, 1);
 	fdt_fixup_qe_firmware(blob);

index 345587b..72c585c 100644
@@ -220,7 +220,7 @@ void qe_assign_page(uint snum, uint para_ram_base)
    from CLKn pin, we have te change the function.
  */
 
-#define BRG_CLK		(gd->brg_clk)
+#define BRG_CLK		(gd->arch.brg_clk)
 
 int qe_set_brg(uint brg, uint rate)
 {

index ac348c6..8e3a726 100644
@@ -54,14 +54,13 @@ typedef	struct	global_data {
 	unsigned int	baudrate;
 	unsigned long	cpu_clk;	/* CPU clock in Hz! */
 	unsigned long	bus_clk;
+	/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
+	unsigned long	pci_clk;
 #if defined(CONFIG_CPM2)
 	/* There are many clocks on the MPC8260 - see page 9-5 */
 	unsigned long	vco_out;
 	unsigned long	cpm_clk;
 	unsigned long	scc_clk;
-#ifdef CONFIG_PCI
-	unsigned long	pci_clk;
-#endif
 #endif
 	unsigned long   mem_clk;
 #if defined(CONFIG_MPC83xx)

@@ -85,7 +84,6 @@ typedef	struct	global_data {
 	u32 enc_clk;
 	u32 lbiu_clk;
 	u32 lclk_clk;
-	u32 pci_clk;
 #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
 	defined(CONFIG_MPC837x)
 	u32 pciexp1_clk;

@@ -122,17 +120,14 @@ typedef	struct	global_data {
 #endif
 #if defined(CONFIG_MPC5xxx)
 	unsigned long	ipb_clk;
-	unsigned long	pci_clk;
 #endif
 #if defined(CONFIG_MPC512X)
 	u32 ips_clk;
 	u32 csb_clk;
-	u32 pci_clk;
 #endif /* CONFIG_MPC512X */
 #if defined(CONFIG_MPC8220)
 	unsigned long   bExtUart;
 	unsigned long   inp_clk;
-	unsigned long   pci_clk;
 	unsigned long   vco_clk;
 	unsigned long   pev_clk;
 	unsigned long   flb_clk;

index 4ad1ec2..7841e8a 100644
@@ -135,17 +135,17 @@ int get_clocks (void)
 	    (get_pvr () == PVR_8260_HIP7R1) ||
 	    (get_pvr () == PVR_8260_HIP7RA)) {
 		pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
-		gd->vco_out = clkin * (pllmf + 1);
+		gd->arch.vco_out = clkin * (pllmf + 1);
 	} else {                        /* HiP3, HiP4 */
 		pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
 		plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
-		gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
+		gd->arch.vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
 	}
 
-	gd->cpm_clk = gd->vco_out / 2;
+	gd->arch.cpm_clk = gd->arch.vco_out / 2;
 	gd->bus_clk = clkin;
-	gd->scc_clk = gd->vco_out / 4;
-	gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+	gd->arch.scc_clk = gd->arch.vco_out / 4;
+	gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
 
 	if (cp->b2c_mult > 0) {
 		gd->cpu_clk = (clkin * cp->b2c_mult) / 2;

@@ -173,7 +173,7 @@ int get_clocks (void)
 			pci_div = pcidf + 1;
 		}
 
-		gd->pci_clk = (gd->cpm_clk * 2) / pci_div;
+		gd->pci_clk = (gd->arch.cpm_clk * 2) / pci_div;
 	}
 #endif
 

@@ -231,10 +231,10 @@ int prt_8260_clks (void)
 			plldf, pllmf, pcidf);
 
 	printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
-			gd->vco_out, gd->scc_clk, gd->arch.brg_clk);
+			gd->arch.vco_out, gd->arch.scc_clk, gd->arch.brg_clk);
 
 	printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
-			gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
+			gd->cpu_clk, gd->arch.cpm_clk, gd->bus_clk);
 #ifdef CONFIG_PCI
 	printf (" - pci_clk %10ld\n", gd->pci_clk);
 #endif

index 8a581ef..c4ca481 100644
@@ -435,10 +435,10 @@ int get_clocks (void)
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
 #if defined(CONFIG_CPM2)
-	gd->vco_out = 2*sys_info.freqSystemBus;
-	gd->cpm_clk = gd->vco_out / 2;
-	gd->scc_clk = gd->vco_out / 4;
-	gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+	gd->arch.vco_out = 2*sys_info.freqSystemBus;
+	gd->arch.cpm_clk = gd->arch.vco_out / 2;
+	gd->arch.scc_clk = gd->arch.vco_out / 4;
+	gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
 #endif
 
 	if(gd->cpu_clk != 0) return (0);

index 8e3a726..7d0115d 100644
@@ -33,6 +33,10 @@ struct arch_global_data {
 	unsigned long brg_clk;
 #endif
 #if defined(CONFIG_CPM2)
+	/* There are many clocks on the MPC8260 - see page 9-5 */
+	unsigned long vco_out;
+	unsigned long cpm_clk;
+	unsigned long scc_clk;
 	unsigned long brg_clk;
 #endif
 #if defined(CONFIG_QE)

index 4174a73..517560a 100644
@@ -580,10 +580,10 @@ void board_init_f(ulong bootflag)
 	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
 	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
 #if defined(CONFIG_CPM2)
-	bd->bi_cpmfreq = gd->cpm_clk;
+	bd->bi_cpmfreq = gd->arch.cpm_clk;
 	bd->bi_brgfreq = gd->arch.brg_clk;
-	bd->bi_sccfreq = gd->scc_clk;
-	bd->bi_vco = gd->vco_out;
+	bd->bi_sccfreq = gd->arch.scc_clk;
+	bd->bi_vco = gd->arch.vco_out;
 #endif /* CONFIG_CPM2 */
 #if defined(CONFIG_MPC512X)
 	bd->bi_ipsfreq = gd->ips_clk;

index e64b0c3..cc20234 100644
@@ -122,7 +122,7 @@ int checkcpu(void)
 
 	printf(" at %s MHz, ", strmhz(buf, clock));
 
-	printf("CSB: %s MHz\n", strmhz(buf, gd->csb_clk));
+	printf("CSB: %s MHz\n", strmhz(buf, gd->arch.csb_clk));
 
 	return 0;
 }

index 1f54781..fe553a7 100644
@@ -118,7 +118,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 		"bus-frequency", bd->bi_busfreq, 1);
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
-		"clock-frequency", gd->core_clk, 1);
+		"clock-frequency", gd->arch.core_clk, 1);
 	do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
 		"bus-frequency", bd->bi_busfreq, 1);
 	do_fixup_by_compat_u32(blob, "fsl,soc",

index 52d4461..609b133 100644
@@ -286,8 +286,8 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg)
 	get_clocks();
 	/* Configure the PCIE controller core clock ratio */
 	out_le32(hose_cfg_base + PEX_GCLK_RATIO,
-		(((bus ? gd->pciexp2_clk : gd->pciexp1_clk) / 1000000) * 16)
-		/ 333);
+		(((bus ? gd->arch.pciexp2_clk : gd->arch.pciexp1_clk)
+			/ 1000000) * 16) / 333);
 	udelay(1000000);
 
 	/* Do Type 1 bridge configuration */

157 lines not on this page · raw message

98 lines not on this page · raw message

index 9b9832c..df2ab6d 100644
@@ -104,7 +104,7 @@ int checkcpu (void)
 		puts("CPU:   ");
 	}
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 	puts(cpu->name);
 	if (IS_E_PROCESSOR(svr))

index ab09330..6422e0f 100644
@@ -613,9 +613,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 		"bus-frequency", bd->bi_busfreq, 1);
 
 	do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
-		"bus-frequency", gd->lbc_clk, 1);
+		"bus-frequency", gd->arch.lbc_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,elbc",
-		"bus-frequency", gd->lbc_clk, 1);
+		"bus-frequency", gd->arch.lbc_clk, 1);
 #ifdef CONFIG_QE
 	ft_qe_setup(blob);
 	ft_fixup_qe_snum(blob);

index c4ca481..f3132fb 100644
@@ -391,7 +391,7 @@ int get_clocks (void)
 	gd->cpu_clk = sys_info.freqProcessor[0];
 	gd->bus_clk = sys_info.freqSystemBus;
 	gd->mem_clk = sys_info.freqDDRBus;
-	gd->lbc_clk = sys_info.freqLocalBus;
+	gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 #ifdef CONFIG_QE
 	gd->qe_clk = sys_info.freqQE;

index d2c8c78..c553415 100644
@@ -67,7 +67,7 @@ checkcpu(void)
 	}
 	puts("CPU:   ");
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 	puts(cpu->name);
 

index 2f955fe..26a65c5 100644
@@ -34,10 +34,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 #if defined(CONFIG_MPC8641)
 	do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
-			       "bus-frequency", gd->lbc_clk, 1);
+			       "bus-frequency", gd->arch.lbc_clk, 1);
 #endif
 	do_fixup_by_compat_u32(blob, "fsl,elbc",
-			       "bus-frequency", gd->lbc_clk, 1);
+			       "bus-frequency", gd->arch.lbc_clk, 1);
 
 	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 

index a2d0a8a..e5798ee 100644
@@ -120,7 +120,7 @@ int get_clocks(void)
 	get_sys_info(&sys_info);
 	gd->cpu_clk = sys_info.freqProcessor;
 	gd->bus_clk = sys_info.freqSystemBus;
-	gd->lbc_clk = sys_info.freqLocalBus;
+	gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 	/*
 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,

index e8613be..dcbb199 100644
@@ -146,7 +146,7 @@ struct cpu_type *identify_cpu(u32 ver)
 u32 cpu_mask(void)
 {
 	ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 
 	/* better to query feature reporting register than just assume 1 */
 	if (cpu == &cpu_type_unknown)

@@ -164,7 +164,7 @@ u32 cpu_mask(void)
  */
 int cpu_numcores(void)
 {
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 
 	/*
 	 * Report # of cores in terms of the cpu_mask if we haven't

@@ -194,7 +194,7 @@ int probecpu (void)
 	svr = get_svr();
 	ver = SVR_SOC_VER(svr);
 
-	gd->cpu = identify_cpu(ver);
+	gd->arch.cpu = identify_cpu(ver);
 
 	return 0;
 }

@@ -202,7 +202,7 @@ int probecpu (void)
 /* Once in memory, compute mask & # cores once and save them off */
 int fixup_cpu(void)
 {
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 
 	if (cpu->num_cores == 0) {
 		cpu->mask = cpu_mask();

index b7bb035..d924673 100644
@@ -76,6 +76,10 @@ struct arch_global_data {
 	u32 mem_sec_clk;
 # endif /* CONFIG_MPC8360 */
 #endif
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+	u32 lbc_clk;
+	void *cpu;
+#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
 };
 
 /*

@@ -98,10 +102,6 @@ typedef	struct	global_data {
 #if defined(CONFIG_FSL_ESDHC)
 	u32 sdhc_clk;
 #endif
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
-	u32 lbc_clk;
-	void *cpu;
-#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 	u32 i2c1_clk;
 	u32 i2c2_clk;

index 517560a..6315991 100644
@@ -649,10 +649,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
 
 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
 	/*
-	 * The gd->cpu pointer is set to an address in flash before relocation.
-	 * We need to update it to point to the same CPU entry in RAM.
+	 * The gd->arch.cpu pointer is set to an address in flash before
+	 * relocation.  We need to update it to point to the same CPU entry
+	 * in RAM.
 	 */
-	gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+	gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
 
 	/*
 	 * If we didn't know the cpu mask & # cores, we can save them of

index 2e0e55f..fe870b6 100644
@@ -59,7 +59,7 @@ int checkboard(void)
 {
 	struct cpu_type *cpu;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf("Board: %sRDB\n", cpu->name);
 
 	return 0;

index 21428e3..48f7155 100644
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int checkboard (void)
 {
 	u8 sw;
-	struct cpu_type *cpu = gd->cpu;
+	struct cpu_type *cpu = gd->arch.cpu;
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 	unsigned int i;
 	static const char * const freq[] = {"100", "125", "156.25", "212.5" };

index 6d00caf..49310bd 100644
@@ -99,7 +99,7 @@ unsigned long get_sdram_size(void)
 	struct cpu_type *cpu;
 	phys_size_t ddr_size;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1014 and it's derivatives support max 16it DDR width */
 	if (cpu->soc_ver == SVR_P1014)
 		ddr_size = (CONFIG_SYS_DRAM_SIZE / 2);

@@ -144,7 +144,7 @@ phys_size_t fixed_sdram(void)
 		panic("Unsupported DDR data rate %s MT/s data rate\n",
 					strmhz(buf, ddr_freq));
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1014 and it's derivatives support max 16bit DDR width */
 	if (cpu->soc_ver == SVR_P1014) {
 		ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;

@@ -237,7 +237,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 	popts->trwt_override = 1;
 	popts->trwt = 0;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1014 and it's derivatives support max 16it DDR width */
 	if (cpu->soc_ver == SVR_P1014)
 		popts->data_bus_width = DDR_DATA_BUS_WIDTH_16;

index dfeb86f..11e2e8a 100644
@@ -164,7 +164,7 @@ int checkboard(void)
 {
 	struct cpu_type *cpu;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf("Board: %sRDB\n", cpu->name);
 
 	return 0;

@@ -178,7 +178,7 @@ int board_eth_init(bd_t *bis)
 	struct cpu_type *cpu;
 	int num = 0;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 #ifdef CONFIG_TSEC1
 	SET_STD_TSEC_INFO(tsec_info[num], 1);

@@ -283,7 +283,7 @@ void ft_board_setup(void *blob, bd_t *bd)
 	phys_size_t size;
 	struct cpu_type *cpu;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 
 	ft_cpu_setup(blob, bd);
 

index 916439c..b16b8c8 100644
@@ -202,7 +202,7 @@ phys_size_t fixed_sdram (void)
 	struct cpu_type *cpu;
 	ulong ddr_freq, ddr_freq_mhz;
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	/* P1020 and it's derivatives support max 32bit DDR width */
 	if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) {
 		ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);

index 437eaf0..9c6683d 100644
@@ -108,7 +108,7 @@ int checkboard (void)
 	else
 		panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
 
-	cpu = gd->cpu;
+	cpu = gd->arch.cpu;
 	printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
 
 	setbits_be32(&pgpio->gpdir, GPIO_DIR);