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x86/microcode: Early load microcode

PATCH Superseded Fenghua Yu 4 participants 28 messages Dec 16, 2012 – Dec 18, 2012

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v3 of 5 Superseded Latest is v5 →

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Fenghua Yu

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v3 cover x86/microcode: Early load microcode

From: Fenghua Yu <[email protected]>

The problem in current microcode loading method is that we load a microcode way, way too late; ideally we should load it before turning paging on. This may only be practical on 32 bits since we can't get to 64-bit mode without paging on, but we should still do it as early as at all possible.

Similarly, we should load the microcode update as early as possible during AP bringup and when processors are brought back online after hotplug or S3/S4.

In order to do that, the microcode patch needs to be permanently present in kernel memory. Each individual patch is fairly small, so that is OK, but the entire blob with support for each CPU is too big. Since only CPU's with same model can be in the same platform, we store microcode with the same model as BSP. Later on APs can upload microcode from the saved microcodep patches.

Note, however, that Linux users have gotten used to being able to install a microcode patch in the field without having a reboot; we support that model too.

v3: Change .hex to .bin in 01/10 and 05/10 patches. Fix some compilation warnings. In x86_32 mode, access global varialbes by __pa_symobl() and fix static string issue in x86_vendor(). Call load_ucode_ap() in real mode as well. Add debug info.

v2: Detect vendor before loading microcode. Move some functions from microcode_intel_early.c to microcode_intel_lib.c. Change some early loading microcode dependencies in Kconfig. Reword doc.

Fenghua Yu (10):
Documentation/x86: Early load microcode x86/microcode_intel.h: Define functions and macros for early loading
ucode
x86/common.c: Make have_cpuid_p() a global function x86/microcode_core_early.c: Define interfaces for early loading ucode x86/microcode_intel_lib.c: Early update ucode on Intel's CPU x86/microcode_intel_early.c: Early update ucode on Intel's CPU x86/head_32.S: Early update ucode in 32-bit
x86/head64.c: Early update ucode in 64-bit
x86/mm/init.c: Copy ucode from initrd image to memory x86/Kconfig: Configurations to enable/disable the feature

 Documentation/x86/early-microcode.txt   |  43 ++
 arch/x86/Kconfig                        |  18 +
 arch/x86/include/asm/microcode.h        |  11 +
 arch/x86/include/asm/microcode_intel.h  |  82 ++++
 arch/x86/include/asm/processor.h        |   8 +
 arch/x86/kernel/Makefile                |   3 +
 arch/x86/kernel/cpu/common.c            |  17 +-
 arch/x86/kernel/head64.c                |   6 +
 arch/x86/kernel/head_32.S               |  12 +
 arch/x86/kernel/microcode_core.c        |   7 +-
 arch/x86/kernel/microcode_core_early.c  |  77 ++++
 arch/x86/kernel/microcode_intel.c       | 198 ++------
 arch/x86/kernel/microcode_intel_early.c | 775 ++++++++++++++++++++++++++++++++
 arch/x86/kernel/microcode_intel_lib.c   | 174 +++++++
 arch/x86/mm/init.c                      |  10 +
 15 files changed, 1264 insertions(+), 177 deletions(-)
 create mode 100644 Documentation/x86/early-microcode.txt
 create mode 100644 arch/x86/include/asm/microcode_intel.h
 create mode 100644 arch/x86/kernel/microcode_core_early.c
 create mode 100644 arch/x86/kernel/microcode_intel_early.c
 create mode 100644 arch/x86/kernel/microcode_intel_lib.c
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#1 lore raw

PATCH v3 1/10 Documentation/x86: Early load microcode

From: Fenghua Yu <[email protected]>

Documenation for early loading microcode methodology.

---
 Documentation/x86/early-microcode.txt | 43 +++++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/x86/early-microcode.txt
Documentation/x86/early-microcode.txt new file +43 -0
new file mode 100644
index 0000000..4aaf0df
@@ -0,0 +1,43 @@
+Early load microcode
+====================
+By Fenghua Yu <[email protected]>
+
+Kernel can update microcode in early phase of boot time. Loading microcode early
+can fix CPU issues before they are observed during kernel boot time.
+
+Microcode is stored in an initrd file. The microcode is read from the initrd
+file and loaded to CPUs during boot time.
+
+The format of the combined initrd image is microcode in cpio format followed by
+the initrd image (maybe compressed). Kernel parses the combined initrd image
+during boot time. The microcode file in cpio name space is:
+kernel/x86/microcode/GenuineIntel.bin
+
+During BSP boot (before SMP starts), if the kernel finds the microcode file in
+the initrd file, it parses the microcode and saves matching microcode in memory.
+If matching microcode is found, it will be uploaded in BSP and later on in all
+APs.
+
+The cached microcode patch is applied when CPUs resume from a sleep state.
+
+There are two legacy user space interfaces to load microcode, either through
+/dev/cpu/microcode or through /sys/devices/system/cpu/microcode/reload file
+in sysfs.
+
+In addition to these two legacy methods, the early loading method described
+here is the third method with which microcode can be uploaded to a system's
+CPUs.
+
+The following example script shows how to generate a new combined initrd file in
+/boot/initrd-3.5.0.ucode.img with original microcode microcode.bin and
+original initrd image /boot/initrd-3.5.0.img.
+
+mkdir initrd
+cd initrd
+mkdir kernel
+mkdir kernel/x86
+mkdir kernel/x86/microcode
+cp ../microcode.bin kernel/x86/microcode/GenuineIntel.bin
+find .|cpio -oc >../ucode.cpio
+cd ..
+cat ucode.cpio /boot/initrd-3.5.0.img >/boot/initrd-3.5.0.ucode.img
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#2 lore raw

PATCH v3 2/10 x86/microcode_intel.h: Define functions and macros for early loading ucode

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

Define some functions and macros that will be used in early loading ucode. Some of them are moved from microcode_intel.c driver in order to be called in early boot phase before module can be called.

---
 arch/x86/include/asm/microcode_intel.h |  82 ++++++++++++++
 arch/x86/kernel/Makefile               |   3 +
 arch/x86/kernel/microcode_core.c       |   7 +-
 arch/x86/kernel/microcode_intel.c      | 198 +++++----------------------------
 4 files changed, 119 insertions(+), 171 deletions(-)
 create mode 100644 arch/x86/include/asm/microcode_intel.h
arch/x86/include/asm/microcode_intel.h new file +82 -0
new file mode 100644
index 0000000..d1d517b
@@ -0,0 +1,82 @@
+#ifndef _ASM_X86_MICROCODE_INTEL_H
+#define _ASM_X86_MICROCODE_INTEL_H
+
+#include <asm/microcode.h>
+
+struct microcode_header_intel {
+	unsigned int            hdrver;
+	unsigned int            rev;
+	unsigned int            date;
+	unsigned int            sig;
+	unsigned int            cksum;
+	unsigned int            ldrver;
+	unsigned int            pf;
+	unsigned int            datasize;
+	unsigned int            totalsize;
+	unsigned int            reserved[3];
+};
+
+struct microcode_intel {
+	struct microcode_header_intel hdr;
+	unsigned int            bits[0];
+};
+
+/* microcode format is extended from prescott processors */
+struct extended_signature {
+	unsigned int            sig;
+	unsigned int            pf;
+	unsigned int            cksum;
+};
+
+struct extended_sigtable {
+	unsigned int            count;
+	unsigned int            cksum;
+	unsigned int            reserved[3];
+	struct extended_signature sigs[0];
+};
+
+#define DEFAULT_UCODE_DATASIZE	(2000)
+#define MC_HEADER_SIZE		(sizeof(struct microcode_header_intel))
+#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
+#define EXT_HEADER_SIZE		(sizeof(struct extended_sigtable))
+#define EXT_SIGNATURE_SIZE	(sizeof(struct extended_signature))
+#define DWSIZE			(sizeof(u32))
+
+#define get_totalsize(mc) \
+	(((struct microcode_intel *)mc)->hdr.totalsize ? \
+	 ((struct microcode_intel *)mc)->hdr.totalsize : \
+	 DEFAULT_UCODE_TOTALSIZE)
+
+#define get_datasize(mc) \
+	(((struct microcode_intel *)mc)->hdr.datasize ? \
+	 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
+
+#define sigmatch(s1, s2, p1, p2) \
+	(((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
+
+#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
+
+extern int
+get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev);
+extern int microcode_sanity_check(void *mc, int print_err);
+extern int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev);
+extern int
+update_match_revision(struct microcode_header_intel *mc_header, int rev);
+
+#ifdef CONFIG_MICROCODE_INTEL_EARLY
+extern void __init load_ucode_intel_bsp(char *real_mode_data);
+extern void __cpuinit load_ucode_intel_ap(void);
+extern void show_ucode_info_early(void);
+#else
+static inline __init void load_ucode_intel_bsp(char *real_mode_data) {}
+static inline __cpuinit void load_ucode_intel_ap(void) {}
+static inline void show_ucode_info_early(void) {}
+#endif
+
+#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
+extern int save_mc_for_early(u8 *mc);
+#else
+static inline int save_mc_for_early(u8 *mc) {}
+#endif
+
+#endif /* _ASM_X86_MICROCODE_INTEL_H */
arch/x86/kernel/Makefile +3 -0
index 34e923a..052abee 100644
@@ -88,6 +88,9 @@ obj-$(CONFIG_PARAVIRT_CLOCK)	+= pvclock.o
 
 obj-$(CONFIG_PCSPKR_PLATFORM)	+= pcspeaker.o
 
+obj-$(CONFIG_MICROCODE_EARLY)		+= microcode_core_early.o
+obj-$(CONFIG_MICROCODE_INTEL_EARLY)	+= microcode_intel_early.o
+obj-$(CONFIG_MICROCODE_INTEL_LIB)	+= microcode_intel_lib.o
 microcode-y				:= microcode_core.o
 microcode-$(CONFIG_MICROCODE_INTEL)	+= microcode_intel.o
 microcode-$(CONFIG_MICROCODE_AMD)	+= microcode_amd.o
arch/x86/kernel/microcode_core.c +4 -3
index 3a04b22..22db92b 100644
@@ -364,10 +364,7 @@ static struct attribute_group mc_attr_group = {
 
 static void microcode_fini_cpu(int cpu)
 {
-	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
-
 	microcode_ops->microcode_fini_cpu(cpu);
-	uci->valid = 0;
 }
 
 static enum ucode_state microcode_resume_cpu(int cpu)
@@ -383,6 +380,10 @@ static enum ucode_state microcode_resume_cpu(int cpu)
 static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
 {
 	enum ucode_state ustate;
+	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+
+	if (uci && uci->valid)
+		return UCODE_OK;
 
 	if (collect_cpu_info(cpu))
 		return UCODE_ERROR;
arch/x86/kernel/microcode_intel.c +30 -168

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#3 lore raw

PATCH v3 3/10 x86/common.c: Make have_cpuid_p() a global function

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

Remove static declaration in have_cpuid_p() to make it a global function. The function will be called in early loading microcode.

---
 arch/x86/include/asm/processor.h |  8 ++++++++
 arch/x86/kernel/cpu/common.c     | 17 +++++++++++------
 2 files changed, 19 insertions(+), 6 deletions(-)
arch/x86/include/asm/processor.h +8 -0
index 888184b..3d722fd 100644
@@ -190,6 +190,14 @@ extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
 extern void detect_extended_topology(struct cpuinfo_x86 *c);
 extern void detect_ht(struct cpuinfo_x86 *c);
 
+#ifdef CONFIG_X86_32
+extern int have_cpuid_p(void);
+#else
+static inline int have_cpuid_p(void)
+{
+	return 1;
+}
+#endif
 static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 				unsigned int *ecx, unsigned int *edx)
 {
arch/x86/kernel/cpu/common.c +11 -6
index 9c3ab43..d814772 100644
@@ -37,6 +37,8 @@
 #include <asm/mce.h>
 #include <asm/msr.h>
 #include <asm/pat.h>
+#include <asm/microcode.h>
+#include <asm/microcode_intel.h>
 
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/uv/uv.h>
@@ -213,7 +215,7 @@ static inline int flag_is_changeable_p(u32 flag)
 }
 
 /* Probe for the CPUID instruction */
-static int __cpuinit have_cpuid_p(void)
+int __cpuinit have_cpuid_p(void)
 {
 	return flag_is_changeable_p(X86_EFLAGS_ID);
 }
@@ -249,11 +251,6 @@ static inline int flag_is_changeable_p(u32 flag)
 {
 	return 1;
 }
-/* Probe for the CPUID instruction */
-static inline int have_cpuid_p(void)
-{
-	return 1;
-}
 static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 {
 }
@@ -1223,6 +1220,12 @@ void __cpuinit cpu_init(void)
 	int cpu;
 	int i;
 
+	/*
+	 * Load microcode on this cpu if a valid microcode is available.
+	 * This is early microcode loading procedure.
+	 */
+	load_ucode_ap();
+
 	cpu = stack_smp_processor_id();
 	t = &per_cpu(init_tss, cpu);
 	oist = &per_cpu(orig_ist, cpu);
@@ -1314,6 +1317,8 @@ void __cpuinit cpu_init(void)
 	struct tss_struct *t = &per_cpu(init_tss, cpu);
 	struct thread_struct *thread = &curr->thread;
 
+	show_ucode_info_early();
+
 	if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) {
 		printk(KERN_WARNING "CPU#%d already initialized!\n", cpu);
 		for (;;)
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#4 lore raw

PATCH v3 4/10 x86/microcode_core_early.c: Define interfaces for early loading ucode

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

Define interfaces load_ucode_bsp() and load_ucode_ap() to load ucode on BSP and AP in early boot time. These are generic interfaces. Internally they call vendor specific implementations.

---
 arch/x86/include/asm/microcode.h       | 11 +++++
 arch/x86/kernel/microcode_core_early.c | 77 ++++++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)
 create mode 100644 arch/x86/kernel/microcode_core_early.c
arch/x86/include/asm/microcode.h +11 -0
index 43d921b..91ed643 100644
@@ -57,4 +57,15 @@ static inline struct microcode_ops * __init init_amd_microcode(void)
 static inline void __exit exit_amd_microcode(void) {}
 #endif
 
+#ifdef CONFIG_MICROCODE_EARLY
+#define MAX_UCODE_COUNT 128
+extern void __init load_ucode_bsp(char *real_mode_data);
+extern __init void load_ucode_ap(void);
+extern int __init save_microcode_in_initrd(void);
+#else
+static inline void __init load_ucode_bsp(char *real_mode_data) {}
+static inline __init void load_ucode_ap(void) {}
+static inline int __init save_microcode_in_initrd(void) {}
+#endif
+
 #endif /* _ASM_X86_MICROCODE_H */
arch/x86/kernel/microcode_core_early.c new file +77 -0

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#5 lore raw

Re: [PATCH v3 04/10] x86/microcode_core_early.c: Define interfaces for early loading ucode

arch/x86/kernel/microcode_core_early.c line 33

Quoted 9 lines · Fenghua Yu
arch/x86/kernel/microcode_core_early.c new file +9 -0
+#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
+#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
+#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
+#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
+#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
+#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
+#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
+
+#define CPUID_IS(a, b, c) (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))

What, this macro is relying on external variable names and doesn't have them as its own macro arguments? Why? This is really fragile and very much prone to errors.

What's wrong with doing:

#define CPUID_IS(a, b, c, ebx, ecx, edx) (!(((ebx) ^ (a))|((edx) ^ (b))|((ecx) ^ (c))))

?

Signature · 5 lines
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--
#6 lore raw

RE: [PATCH v3 04/10] x86/microcode_core_early.c: Define interfaces for early loading ucode

Quoted 26 lines

-----Original Message-----
From: Borislav Petkov [mailto:[email protected]]
Sent: Sunday, December 16, 2012 9:57 AM
To: Yu, Fenghua
Cc: H Peter Anvin; Ingo Molnar; Thomas Gleixner; Mallick, Asit K; Tigran Aivazian; Andreas Herrmann; Borislav Petkov; Yinghai Lu; linux- kernel; x86
Subject: Re: [PATCH v3 04/10] x86/microcode_core_early.c: Define interfaces for early loading ucode

Quoted 1 line · Fenghua Yu

+#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) <<

24))

arch/x86/kernel/microcode_core_early.c line 33

Quoted 8 lines
arch/x86/kernel/microcode_core_early.c new file +8 -0
+#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
+#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
+#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
+#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
+#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
+#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
+
+#define CPUID_IS(a, b, c) (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))

What, this macro is relying on external variable names and doesn't have them as its own macro arguments? Why? This is really fragile and very much prone to errors.

Quoted 6 lines

What's wrong with doing:

#define CPUID_IS(a, b, c, ebx, ecx, edx) (!(((ebx) ^ (a))|((edx) ^ (b))|((ecx) ^ (c))))

?

Nothing wrong with taking the parameters. But CPUID_IS is only limited in this file. There is no other places to use it. I think either way is ok.

Thanks.

-Fenghua ���{.n�+�������+%�����ݶ��w��{.n�+����{��G�����{ay�ʇڙ�,j��f���h��������z_�(�階�ݢj"���m������G������?����&���~��iO��z��v�^�m���� ������?�I�

maintainer
#7 lore raw

Re: [PATCH v3 04/10] x86/microcode_core_early.c: Define interfaces for early loading ucode

Quoted 3 lines · Fenghua

Nothing wrong with taking the parameters. But CPUID_IS is only limited in this file. There is no other places to use it. I think either way is ok.

Please don't do this. Anything can happen, someone can copy it somewhere else and try to use it, unification, code movement can all of a sudden break things in the most mysterious ways.

However, if you make the macro definition self-contained. none of those issues will happen.

Thanks.

Signature · 5 lines
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--
author
#8 lore raw

PATCH v3 5/10 x86/microcode_intel_lib.c: Early update ucode on Intel's CPU

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

Define interfaces microcode_sanity_check() and get_matching_microcode(). They are called both in early boot time and in microcode Intel driver.

---
 arch/x86/kernel/microcode_intel_lib.c | 174 ++++++++++++++++++++++++++++++++++
 1 file changed, 174 insertions(+)
 create mode 100644 arch/x86/kernel/microcode_intel_lib.c
arch/x86/kernel/microcode_intel_lib.c new file +174 -0
new file mode 100644
index 0000000..ce69320
@@ -0,0 +1,174 @@
+/*
+ *	Intel CPU Microcode Update Driver for Linux
+ *
+ *	Copyright (C) 2012 Fenghua Yu <[email protected]>
+ *			   H Peter Anvin" <[email protected]>
+ *
+ *	This driver allows to upgrade microcode on Intel processors
+ *	belonging to IA-32 family - PentiumPro, Pentium II,
+ *	Pentium III, Xeon, Pentium 4, etc.
+ *
+ *	Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
+ *	Software Developer's Manual
+ *	Order Number 253668 or free download from:
+ *
+ *	http://developer.intel.com/Assets/PDF/manual/253668.pdf
+ *
+ *	For more information, go to http://www.urbanmyth.org/microcode
+ *
+ *	This program is free software; you can redistribute it and/or
+ *	modify it under the terms of the GNU General Public License
+ *	as published by the Free Software Foundation; either version
+ *	2 of the License, or (at your option) any later version.
+ *
+ */
+#include <linux/firmware.h>
+#include <linux/uaccess.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include <asm/microcode_intel.h>
+#include <asm/processor.h>
+#include <asm/msr.h>
+
+static inline int
+update_match_cpu(unsigned int csig, unsigned int cpf,
+		 unsigned int sig, unsigned int pf)
+{
+	return (!sigmatch(sig, csig, pf, cpf)) ? 0 : 1;
+}
+
+int
+update_match_revision(struct microcode_header_intel *mc_header, int rev)
+{
+	return (mc_header->rev <= rev) ? 0 : 1;
+}
+
+int microcode_sanity_check(void *mc, int print_err)
+{
+	unsigned long total_size, data_size, ext_table_size;
+	struct microcode_header_intel *mc_header = mc;
+	struct extended_sigtable *ext_header = NULL;
+	int sum, orig_sum, ext_sigcount = 0, i;
+	struct extended_signature *ext_sig;
+
+	total_size = get_totalsize(mc_header);
+	data_size = get_datasize(mc_header);
+
+	if (data_size + MC_HEADER_SIZE > total_size) {
+		if (print_err)
+			pr_err("error! Bad data size in microcode data file\n");
+		return -EINVAL;
+	}
+
+	if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
+		if (print_err)
+			pr_err("error! Unknown microcode update format\n");
+		return -EINVAL;
+	}
+	ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
+	if (ext_table_size) {
+		if ((ext_table_size < EXT_HEADER_SIZE)
+		 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
+			if (print_err)
+				pr_err("error! Small exttable size in microcode data file\n");
+			return -EINVAL;
+		}
+		ext_header = mc + MC_HEADER_SIZE + data_size;
+		if (ext_table_size != exttable_size(ext_header)) {
+			if (print_err)
+				pr_err("error! Bad exttable size in microcode data file\n");
+			return -EFAULT;
+		}
+		ext_sigcount = ext_header->count;
+	}
+
+	/* check extended table checksum */
+	if (ext_table_size) {
+		int ext_table_sum = 0;
+		int *ext_tablep = (int *)ext_header;
+
+		i = ext_table_size / DWSIZE;
+		while (i--)
+			ext_table_sum += ext_tablep[i];
+		if (ext_table_sum) {
+			if (print_err)
+				pr_warn("aborting, bad extended signature table checksum\n");
+			return -EINVAL;
+		}
+	}
+
+	/* calculate the checksum */
+	orig_sum = 0;
+	i = (MC_HEADER_SIZE + data_size) / DWSIZE;
+	while (i--)
+		orig_sum += ((int *)mc)[i];
+	if (orig_sum) {
+		if (print_err)
+			pr_err("aborting, bad checksum\n");
+		return -EINVAL;
+	}
+	if (!ext_table_size)
+		return 0;
+	/* check extended signature checksum */
+	for (i = 0; i < ext_sigcount; i++) {
+		ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
+			  EXT_SIGNATURE_SIZE * i;
+		sum = orig_sum
+			- (mc_header->sig + mc_header->pf + mc_header->cksum)
+			+ (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
+		if (sum) {
+			if (print_err)
+				pr_err("aborting, bad checksum\n");
+			return -EINVAL;
+		}
+	}
+	return 0;
+}
+EXPORT_SYMBOL_GPL(microcode_sanity_check);
+
+/*
+ * return 0 - no update found
+ * return 1 - found update
+ */
+int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev)
+{
+	struct microcode_header_intel *mc_header = mc;
+	struct extended_sigtable *ext_header;
+	unsigned long total_size = get_totalsize(mc_header);
+	int ext_sigcount, i;
+	struct extended_signature *ext_sig;
+
+	if (update_match_cpu(csig, cpf, mc_header->sig, mc_header->pf))
+		return 1;
+
+	/* Look for ext. headers: */
+	if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
+		return 0;
+
+	ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
+	ext_sigcount = ext_header->count;
+	ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
+
+	for (i = 0; i < ext_sigcount; i++) {
+		if (update_match_cpu(csig, cpf, ext_sig->sig, ext_sig->pf))
+			return 1;
+		ext_sig++;
+	}
+	return 0;
+}
+
+/*
+ * return 0 - no update found
+ * return 1 - found update
+ */
+int get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev)
+{
+	struct microcode_header_intel *mc_header = mc;
+
+	if (!update_match_revision(mc_header, rev))
+		return 0;
+
+	return get_matching_sig(csig, cpf, mc, rev);
+}
+EXPORT_SYMBOL_GPL(get_matching_microcode);
Signature · 1 line
1.8.0.1
author
#9 lore raw

PATCH v3 6/10 x86/microcode_intel_early.c: Early update ucode on Intel's CPU

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

Implementation of early update ucode on Intel's CPU.

load_ucode_intel_bsp() scans ucode in initrd image file which is a cpio format ucode followed by ordinary initrd image file. The binary ucode file is stored in kernel/x86/microcode/GenuineIntel.bin in the cpio data. All ucode patches with the same model as BSP are saved in memory. A matching ucode patch is updated on BSP.

load_ucode_intel_ap() reads saved ucoded patches and updates ucode on AP.

---
 arch/x86/kernel/microcode_intel_early.c | 775 ++++++++++++++++++++++++++++++++
 1 file changed, 775 insertions(+)
 create mode 100644 arch/x86/kernel/microcode_intel_early.c
arch/x86/kernel/microcode_intel_early.c new file +775 -0
new file mode 100644
index 0000000..6a8e04b
@@ -0,0 +1,775 @@
+/*
+ *	Intel CPU microcode early update for Linux
+ *
+ *	Copyright (C) 2012 Fenghua Yu <[email protected]>
+ *			   H Peter Anvin" <[email protected]>
+ *
+ *	This allows to early upgrade microcode on Intel processors
+ *	belonging to IA-32 family - PentiumPro, Pentium II,
+ *	Pentium III, Xeon, Pentium 4, etc.
+ *
+ *	Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
+ *	Software Developer's Manual.
+ *
+ *	This program is free software; you can redistribute it and/or
+ *	modify it under the terms of the GNU General Public License
+ *	as published by the Free Software Foundation; either version
+ *	2 of the License, or (at your option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/earlycpio.h>
+#include <linux/initrd.h>
+#include <linux/cpu.h>
+#include <asm/msr.h>
+#include <asm/microcode_intel.h>
+#include <asm/processor.h>
+
+unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
+struct mc_saved_data {
+	unsigned int mc_saved_count;
+	struct microcode_intel **mc_saved;
+} mc_saved_data;
+
+static enum ucode_state __cpuinit
+generic_load_microcode_early(struct microcode_intel **mc_saved_p,
+			     unsigned int mc_saved_count,
+			     struct ucode_cpu_info *uci)
+{
+	struct microcode_intel *ucode_ptr, *new_mc = NULL;
+	int new_rev = uci->cpu_sig.rev;
+	enum ucode_state state = UCODE_OK;
+	unsigned int mc_size;
+	struct microcode_header_intel *mc_header;
+	unsigned int csig = uci->cpu_sig.sig;
+	unsigned int cpf = uci->cpu_sig.pf;
+	int i;
+
+	for (i = 0; i < mc_saved_count; i++) {
+		ucode_ptr = mc_saved_p[i];
+
+		mc_header = (struct microcode_header_intel *)ucode_ptr;
+		mc_size = get_totalsize(mc_header);
+		if (get_matching_microcode(csig, cpf, ucode_ptr, new_rev)) {
+			new_rev = mc_header->rev;
+			new_mc  = ucode_ptr;
+		}
+	}
+
+	if (!new_mc) {
+		state = UCODE_NFOUND;
+		goto out;
+	}
+
+	uci->mc = (struct microcode_intel *)new_mc;
+out:
+	return state;
+}
+
+static void __cpuinit
+microcode_pointer(struct microcode_intel **mc_saved,
+		  unsigned long *mc_saved_in_initrd,
+		  unsigned long initrd_start, int mc_saved_count)
+{
+	int i;
+
+	for (i = 0; i < mc_saved_count; i++)
+		mc_saved[i] = (struct microcode_intel *)
+			      (mc_saved_in_initrd[i] + initrd_start);
+}
+
+#ifdef CONFIG_X86_32
+static void __cpuinit
+microcode_phys(struct microcode_intel **mc_saved_tmp,
+	       struct mc_saved_data *mc_saved_data)
+{
+	int i;
+	struct microcode_intel ***mc_saved;
+
+	mc_saved = (struct microcode_intel ***)
+		   __pa_symbol(&mc_saved_data->mc_saved);
+	for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
+		struct microcode_intel *p;
+
+		p = *(struct microcode_intel **)
+			__pa(mc_saved_data->mc_saved + i);
+		mc_saved_tmp[i] = (struct microcode_intel *)__pa(p);
+	}
+}
+#endif
+
+static enum ucode_state __cpuinit
+load_microcode(struct mc_saved_data *mc_saved_data,
+	       unsigned long *mc_saved_in_initrd,
+	       unsigned long initrd_start,
+	       struct ucode_cpu_info *uci)
+{
+	struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
+	unsigned int count = mc_saved_data->mc_saved_count;
+
+	if (!mc_saved_data->mc_saved) {
+		microcode_pointer(mc_saved_tmp, mc_saved_in_initrd,
+				  initrd_start, count);
+
+		return generic_load_microcode_early(mc_saved_tmp, count, uci);
+	} else {
+#ifdef CONFIG_X86_32
+		microcode_phys(mc_saved_tmp, mc_saved_data);
+		return generic_load_microcode_early(mc_saved_tmp, count, uci);
+#else
+		return generic_load_microcode_early(mc_saved_data->mc_saved,
+						    count, uci);
+#endif
+	}
+}
+
+static u8 get_x86_family(unsigned long sig)
+{
+	u8 x86;
+
+	x86 = (sig >> 8) & 0xf;
+
+	if (x86 == 0xf)
+		x86 += (sig >> 20) & 0xff;
+
+	return x86;
+}
+
+static u8 get_x86_model(unsigned long sig)
+{
+	u8 x86, x86_model;
+
+	x86 = get_x86_family(sig);
+	x86_model = (sig >> 4) & 0xf;
+
+	if (x86 == 0x6 || x86 == 0xf)
+		x86_model += ((sig >> 16) & 0xf) << 4;
+
+	return x86_model;
+}
+
+/*
+ * Given CPU signature and a microcode patch, this function finds if the
+ * microcode patch has matching family and model with the CPU.
+ */
+static enum ucode_state
+matching_model_microcode(struct microcode_header_intel *mc_header,
+			unsigned long sig)
+{
+	u8 x86, x86_model;
+	u8 x86_ucode, x86_model_ucode;
+	struct extended_sigtable *ext_header;
+	unsigned long total_size = get_totalsize(mc_header);
+	unsigned long data_size = get_datasize(mc_header);
+	int ext_sigcount, i;
+	struct extended_signature *ext_sig;
+
+	x86 = get_x86_family(sig);
+	x86_model = get_x86_model(sig);
+
+	x86_ucode = get_x86_family(mc_header->sig);
+	x86_model_ucode = get_x86_model(mc_header->sig);
+
+	if (x86 == x86_ucode && x86_model == x86_model_ucode)
+		return UCODE_OK;
+
+	/* Look for ext. headers: */
+	if (total_size <= data_size + MC_HEADER_SIZE)
+		return UCODE_NFOUND;
+
+	ext_header = (struct extended_sigtable *)
+		     mc_header + data_size + MC_HEADER_SIZE;
+	ext_sigcount = ext_header->count;
+	ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
+
+	for (i = 0; i < ext_sigcount; i++) {
+		x86_ucode = get_x86_family(ext_sig->sig);
+		x86_model_ucode = get_x86_model(ext_sig->sig);
+
+		if (x86 == x86_ucode && x86_model == x86_model_ucode)
+			return UCODE_OK;
+
+		ext_sig++;
+	}
+
+	return UCODE_NFOUND;
+}
+
+static int
+save_microcode(struct mc_saved_data *mc_saved_data,
+	       struct microcode_intel **mc_saved_src,
+	       unsigned int mc_saved_count)
+{
+	int i, j;
+	struct microcode_intel **mc_saved_p;
+	int ret;
+
+	if (!mc_saved_count)
+		return -EINVAL;
+
+	/*
+	 * Copy new microcode data.
+	 */
+	mc_saved_p = kmalloc(mc_saved_count*sizeof(struct microcode_intel *),
+			     GFP_KERNEL);
+	if (!mc_saved_p)
+		return -ENOMEM;
+
+	for (i = 0; i < mc_saved_count; i++) {
+		struct microcode_intel *mc = mc_saved_src[i];
+		struct microcode_header_intel *mc_header = &mc->hdr;
+		unsigned long mc_size = get_totalsize(mc_header);
+		mc_saved_p[i] = kmalloc(mc_size, GFP_KERNEL);
+		if (!mc_saved_p[i]) {
+			ret = -ENOMEM;
+			goto err;
+		}
+		if (!mc_saved_src[i]) {
+			ret = -EINVAL;
+			goto err;
+		}
+		memcpy(mc_saved_p[i], mc, mc_size);
+	}
+
+	/*
+	 * Point to newly saved microcode.
+	 */
+	mc_saved_data->mc_saved = mc_saved_p;
+	mc_saved_data->mc_saved_count = mc_saved_count;
+
+	return 0;
+
+err:
+	for (j = 0; j <= i; j++)
+		kfree(mc_saved_p[j]);
+	kfree(mc_saved_p);
+
+	return ret;
+}
+
+/*
+ * A microcode patch in ucode_ptr is saved into mc_saved
+ * - if it has matching signature and newer revision compared to an existing
+ *   patch mc_saved.
+ * - or if it is a newly discovered microcode patch.
+ *
+ * The microcode patch should have matching model with CPU.
+ */
+static void _save_mc(struct microcode_intel **mc_saved, u8 *ucode_ptr,
+		     unsigned int *mc_saved_count_p)
+{
+	int i;
+	int found = 0;
+	unsigned int mc_saved_count = *mc_saved_count_p;
+	struct microcode_header_intel *mc_header;
+
+	mc_header = (struct microcode_header_intel *)ucode_ptr;
+	for (i = 0; i < mc_saved_count; i++) {
+		unsigned int sig, pf;
+		unsigned int new_rev;
+		struct microcode_header_intel *mc_saved_header =
+			     (struct microcode_header_intel *)mc_saved[i];
+		sig = mc_saved_header->sig;
+		pf = mc_saved_header->pf;
+		new_rev = mc_header->rev;
+
+		if (get_matching_sig(sig, pf, ucode_ptr, new_rev)) {
+			found = 1;
+			if (update_match_revision(mc_header, new_rev)) {
+				/*
+				 * Found an older ucode saved before.
+				 * Replace the older one with this newer
+				 * one.
+				 */
+				mc_saved[i] =
+					(struct microcode_intel *)ucode_ptr;
+				break;
+			}
+		}
+	}
+	if (i >= mc_saved_count && !found)
+		/*
+		 * This ucode is first time discovered in ucode file.
+		 * Save it to memory.
+		 */
+		mc_saved[mc_saved_count++] =
+				 (struct microcode_intel *)ucode_ptr;
+
+	*mc_saved_count_p = mc_saved_count;
+}
+
+/*
+ * Get microcode matching with BSP's model. Only CPUs with the same model as
+ * BSP can stay in the platform.
+ */
+static enum ucode_state __init
+get_matching_model_microcode(int cpu, unsigned long start,
+			     void *data, size_t size,
+			     struct mc_saved_data *mc_saved_data,
+			     unsigned long *mc_saved_in_initrd,
+			     struct ucode_cpu_info *uci)
+{
+	u8 *ucode_ptr = data;
+	unsigned int leftover = size;
+	enum ucode_state state = UCODE_OK;
+	unsigned int mc_size;
+	struct microcode_header_intel *mc_header;
+	struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
+	unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
+	int i;
+
+	while (leftover) {
+		mc_header = (struct microcode_header_intel *)ucode_ptr;
+
+		mc_size = get_totalsize(mc_header);
+		if (!mc_size || mc_size > leftover ||
+			microcode_sanity_check(ucode_ptr, 0) < 0)
+			break;
+
+		leftover -= mc_size;
+
+		/*
+		 * Since APs with same family and model as the BSP may boot in
+		 * the platform, we need to find and save microcode patches
+		 * with the same family and model as the BSP.
+		 */
+		if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
+			 UCODE_OK) {
+			ucode_ptr += mc_size;
+			continue;
+		}
+
+		_save_mc(mc_saved_tmp, ucode_ptr, &mc_saved_count);
+
+		ucode_ptr += mc_size;
+	}
+
+	if (leftover) {
+		state = UCODE_ERROR;
+		goto out;
+	}
+
+	if (mc_saved_count == 0) {
+		state = UCODE_NFOUND;
+		goto out;
+	}
+
+	for (i = 0; i < mc_saved_count; i++)
+		mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
+
+	mc_saved_data->mc_saved_count = mc_saved_count;
+out:
+	return state;
+}
+
+#define native_rdmsr(msr, val1, val2)		\
+do {						\
+	u64 __val = native_read_msr((msr));	\
+	(void)((val1) = (u32)__val);		\
+	(void)((val2) = (u32)(__val >> 32));	\
+} while (0)
+
+#define native_wrmsr(msr, low, high)		\
+	native_write_msr(msr, low, high);
+
+static int __cpuinit collect_cpu_info_early(struct ucode_cpu_info *uci)
+{
+	unsigned int val[2];
+	u8 x86, x86_model;
+	struct cpu_signature csig;
+	unsigned int eax, ebx, ecx, edx;
+
+	csig.sig = 0;
+	csig.pf = 0;
+	csig.rev = 0;
+
+	memset(uci, 0, sizeof(*uci));
+
+	eax = 0x00000001;
+	ecx = 0;
+	native_cpuid(&eax, &ebx, &ecx, &edx);
+	csig.sig = eax;
+
+	x86 = get_x86_family(csig.sig);
+	x86_model = get_x86_model(csig.sig);
+
+	if ((x86_model >= 5) || (x86 > 6)) {
+		/* get processor flags from MSR 0x17 */
+		native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
+		csig.pf = 1 << ((val[1] >> 18) & 7);
+	}
+	native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
+
+	/* As documented in the SDM: Do a CPUID 1 here */
+	sync_core();
+
+	/* get the current revision from MSR 0x8B */
+	native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
+
+	csig.rev = val[1];
+
+	uci->cpu_sig = csig;
+	uci->valid = 1;
+
+	return 0;
+}
+
+#ifdef DEBUG
+static void __ref show_saved_mc(void)
+{
+	int i, j;
+	unsigned int sig, pf, rev, total_size, data_size, date;
+	struct ucode_cpu_info uci;
+
+	if (mc_saved_data.mc_saved_count == 0) {
+		pr_debug("no micorcode data saved.\n");
+		return;
+	}
+	pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
+
+	collect_cpu_info_early(&uci);
+
+	sig = uci.cpu_sig.sig;
+	pf = uci.cpu_sig.pf;
+	rev = uci.cpu_sig.rev;
+	pr_debug("CPU%d: sig=0x%x, pf=0x%x, rev=0x%x\n",
+		 smp_processor_id(), sig, pf, rev);
+
+	for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
+		struct microcode_header_intel *mc_saved_header;
+		struct extended_sigtable *ext_header;
+		int ext_sigcount;
+		struct extended_signature *ext_sig;
+
+		mc_saved_header = (struct microcode_header_intel *)
+				  mc_saved_data.mc_saved[i];
+		sig = mc_saved_header->sig;
+		pf = mc_saved_header->pf;
+		rev = mc_saved_header->rev;
+		total_size = get_totalsize(mc_saved_header);
+		data_size = get_datasize(mc_saved_header);
+		date = mc_saved_header->date;
+
+		pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
+			 i, sig, pf, rev, total_size,
+			 date & 0xffff,
+			 date >> 24,
+			 (date >> 16) & 0xff);
+
+		/* Look for ext. headers: */
+		if (total_size <= data_size + MC_HEADER_SIZE)
+			continue;
+
+		ext_header = (struct extended_sigtable *)
+			     mc_saved_header + data_size + MC_HEADER_SIZE;
+		ext_sigcount = ext_header->count;
+		ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
+
+		for (j = 0; j < ext_sigcount; j++) {
+			sig = ext_sig->sig;
+			pf = ext_sig->pf;
+
+			pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
+				 j, sig, pf);
+
+			ext_sig++;
+		}
+
+	}
+}
+#else
+static inline void show_saved_mc(void)
+{
+}
+#endif
+
+#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
+/*
+ * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
+ * hot added or resumes.
+ *
+ * Please make sure this mc should be a valid microcode patch before calling
+ * this function.
+ */
+int save_mc_for_early(u8 *mc)
+{
+	struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
+	unsigned int mc_saved_count_init;
+	unsigned int mc_saved_count;
+	struct microcode_intel **mc_saved;
+	int ret = 0;
+	int i;
+
+	/*
+	 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
+	 * hotplug.
+	 */
+	cpu_hotplug_driver_lock();
+
+	mc_saved_count_init = mc_saved_data.mc_saved_count;
+	mc_saved_count = mc_saved_data.mc_saved_count;
+	mc_saved = mc_saved_data.mc_saved;
+
+	if (mc_saved && mc_saved_count)
+		memcpy(mc_saved_tmp, mc_saved,
+		       mc_saved_count * sizeof(struct mirocode_intel *));
+	/*
+	 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
+	 * version.
+	 */
+
+	_save_mc(mc_saved_tmp, mc, &mc_saved_count);
+
+	/*
+	 * Save the mc_save_tmp in global mc_saved_data.
+	 */
+	ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
+	if (ret) {
+		pr_err("Can not save microcode patch.\n");
+		goto out;
+	}
+
+	show_saved_mc();
+
+	/*
+	 * Free old saved microcod data.
+	 */
+	if (mc_saved) {
+		for (i = 0; i < mc_saved_count_init; i++)
+			kfree(mc_saved[i]);
+		kfree(mc_saved);
+	}
+
+out:
+	cpu_hotplug_driver_unlock();
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(save_mc_for_early);
+#endif
+
+static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
+static __init enum ucode_state
+scan_microcode(unsigned long start, unsigned long end,
+		struct mc_saved_data *mc_saved_data,
+		unsigned long *mc_saved_in_initrd,
+		struct ucode_cpu_info *uci)
+{
+	unsigned int size = end - start + 1;
+	struct cpio_data cd;
+	long offset = 0;
+	char *p = (char *)__pa_symbol(&ucode_name);
+
+	cd.data = NULL;
+	cd.size = 0;
+
+	cd = find_cpio_data(p, (void *)start, size, &offset);
+	if (!cd.data)
+		return UCODE_ERROR;
+
+
+	return get_matching_model_microcode(0, start, cd.data, cd.size,
+					    mc_saved_data, mc_saved_in_initrd,
+					    uci);
+}
+
+/*
+ * Print ucode update info.
+ */
+static void __cpuinit
+print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
+{
+	int cpu = smp_processor_id();
+
+	pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
+		cpu,
+		uci->cpu_sig.rev,
+		date & 0xffff,
+		date >> 24,
+		(date >> 16) & 0xff);
+}
+
+#ifdef CONFIG_X86_32
+
+static int delay_ucode_info;
+static int current_mc_date;
+
+/*
+ * Print early updated ucode info after printk works. This is delayed info dump.
+ */
+void __cpuinit show_ucode_info_early(void)
+{
+	struct ucode_cpu_info uci;
+
+	if (delay_ucode_info) {
+		collect_cpu_info_early(&uci);
+		print_ucode_info(&uci, current_mc_date);
+		delay_ucode_info = 0;
+	}
+}
+
+/*
+ * At this point, we can not call printk() yet. Keep microcode patch number in
+ * mc_saved_data.mc_saved and delay printing microcode info in
+ * show_ucode_info_early() until printk() works.
+ */
+static void __cpuinit print_ucode(struct ucode_cpu_info *uci)
+{
+	struct microcode_intel *mc_intel;
+	int *delay_ucode_info_p;
+	int *current_mc_date_p;
+
+	mc_intel = uci->mc;
+	if (mc_intel == NULL)
+		return;
+
+	delay_ucode_info_p = (int *)__pa_symbol(&delay_ucode_info);
+	current_mc_date_p = (int *)__pa_symbol(&current_mc_date);
+
+	*delay_ucode_info_p = 1;
+	*current_mc_date_p = mc_intel->hdr.date;
+}
+#else
+static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci)
+{
+	struct microcode_intel *mc_intel;
+
+	mc_intel = uci->mc;
+	if (mc_intel == NULL)
+		return;
+
+	print_ucode_info(uci, mc_intel->hdr.date);
+}
+#endif
+
+static int apply_microcode_early(struct mc_saved_data *mc_saved_data,
+				 struct ucode_cpu_info *uci)
+{
+	struct microcode_intel *mc_intel;
+	unsigned int val[2];
+
+	mc_intel = uci->mc;
+	if (mc_intel == NULL)
+		return 0;
+
+	/* write microcode via MSR 0x79 */
+	native_wrmsr(MSR_IA32_UCODE_WRITE,
+	      (unsigned long) mc_intel->bits,
+	      (unsigned long) mc_intel->bits >> 16 >> 16);
+	native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
+
+	/* As documented in the SDM: Do a CPUID 1 here */
+	sync_core();
+
+	/* get the current revision from MSR 0x8B */
+	native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
+	if (val[1] != mc_intel->hdr.rev)
+		return -1;
+
+	uci->cpu_sig.rev = val[1];
+
+	print_ucode(uci);
+
+	return 0;
+}
+
+/*
+ * This function converts microcode patch offsets previously stored in
+ * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
+ */
+int __init save_microcode_in_initrd(void)
+{
+	unsigned int count = mc_saved_data.mc_saved_count;
+	struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
+	int ret = 0;
+
+	if (count == 0)
+		return ret;
+
+	microcode_pointer(mc_saved, mc_saved_in_initrd, initrd_start, count);
+	ret = save_microcode(&mc_saved_data, mc_saved, count);
+	if (ret)
+		pr_err("Can not save microcod patches from initrd");
+
+	show_saved_mc();
+
+	return ret;
+}
+
+static void __init
+_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
+		      unsigned long *mc_saved_in_initrd,
+		      unsigned long initrd_start_early,
+		      unsigned long initrd_end_early,
+		      struct ucode_cpu_info *uci)
+{
+	collect_cpu_info_early(uci);
+	scan_microcode(initrd_start_early, initrd_end_early, mc_saved_data,
+		       mc_saved_in_initrd, uci);
+	load_microcode(mc_saved_data, mc_saved_in_initrd,
+		       initrd_start_early, uci);
+	apply_microcode_early(mc_saved_data, uci);
+}
+
+void __init
+load_ucode_intel_bsp(char *real_mode_data)
+{
+	u64 ramdisk_image, ramdisk_size, ramdisk_end;
+	unsigned long initrd_start_early, initrd_end_early;
+	struct boot_params *boot_params;
+	struct ucode_cpu_info	uci;
+
+	boot_params = (struct boot_params *)real_mode_data;
+	ramdisk_image = boot_params->hdr.ramdisk_image;
+	ramdisk_size  = boot_params->hdr.ramdisk_size;
+
+#ifdef CONFIG_X86_64
+	ramdisk_end  = PAGE_ALIGN(ramdisk_image + ramdisk_size);
+	initrd_start_early = ramdisk_image + PAGE_OFFSET;
+	initrd_end_early = initrd_start_early + ramdisk_size;
+	_load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd,
+			      initrd_start_early, initrd_end_early, &uci);
+#else
+	ramdisk_end  = ramdisk_image + ramdisk_size;
+	initrd_start_early = ramdisk_image;
+	initrd_end_early = initrd_start_early + ramdisk_size;
+	_load_ucode_intel_bsp(
+		(struct mc_saved_data *)__pa_symbol(&mc_saved_data),
+		(unsigned long *)__pa_symbol(&mc_saved_in_initrd),
+		initrd_start_early, initrd_end_early, &uci);
+#endif
+}
+
+void __cpuinit load_ucode_intel_ap(void)
+{
+	struct mc_saved_data *mc_saved_data_p;
+	struct ucode_cpu_info uci;
+	unsigned long *mc_saved_in_initrd_p;
+	unsigned long initrd_start_addr;
+
+#ifdef CONFIG_X86_64
+	mc_saved_data_p = &mc_saved_data;
+	mc_saved_in_initrd_p = mc_saved_in_initrd;
+	initrd_start_addr = initrd_start;
+#else
+	unsigned long *initrd_start_p;
+
+	mc_saved_in_initrd_p =
+		(unsigned long *)__pa_symbol(mc_saved_in_initrd);
+	mc_saved_data_p = (struct mc_saved_data *)__pa_symbol(&mc_saved_data);
+	initrd_start_p = (unsigned long *)__pa_symbol(&initrd_start);
+	initrd_start_addr = (unsigned long)__pa_symbol(*initrd_start_p);
+#endif
+	/*
+	 * If there is no valid ucode previously saved in memory, no need to
+	 * update ucode on this AP.
+	 */
+	if (mc_saved_data_p->mc_saved_count == 0)
+		return;
+
+	collect_cpu_info_early(&uci);
+	load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
+		       initrd_start_addr, &uci);
+	apply_microcode_early(mc_saved_data_p, &uci);
+}
Signature · 1 line
1.8.0.1
author
#10 lore raw

PATCH v3 7/10 x86/head_32.S: Early update ucode in 32-bit

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

This updates ucode in 32-bit kernel. At this point, there is no paging and no virtual address yet.

---
 arch/x86/kernel/head_32.S | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/x86/kernel/head_32.S +12 -0
index 8e7f655..fdc11f6 100644
@@ -144,6 +144,12 @@ ENTRY(startup_32)
 	movl %eax, pa(olpc_ofw_pgd)
 #endif
 
+#ifdef CONFIG_MICROCODE_EARLY
+	/* Early load ucode on BSP. */
+	movl $pa(boot_params), %eax
+	call load_ucode_bsp
+#endif
+
 /*
  * Initialize page tables.  This creates a PDE and a set of page
  * tables, which are located immediately beyond __brk_base.  The variable
@@ -299,6 +305,12 @@ ENTRY(startup_32_smp)
 	movl %eax,%ss
 	leal -__PAGE_OFFSET(%ecx),%esp
 
+#ifdef CONFIG_MICROCODE_EARLY
+	/* Early load ucode on AP. */
+	call load_ucode_ap
+#endif
+
+
 default_entry:
 /*
  *	New page tables may be in 4Mbyte page mode and may
Signature · 1 line
1.8.0.1
author
#11 lore raw

PATCH v3 8/10 x86/head64.c: Early update ucode in 64-bit

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

This updates ucode in 64-bit mode. Paging and virtual address are working now.

---
 arch/x86/kernel/head64.c | 6 ++++++
 1 file changed, 6 insertions(+)
arch/x86/kernel/head64.c +6 -0
index 037df57..a512f56 100644
@@ -25,6 +25,7 @@
 #include <asm/kdebug.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/microcode.h>
 
 static void __init zap_identity_mappings(void)
 {
@@ -73,6 +74,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
 	/* clear bss before set_intr_gate with early_idt_handler */
 	clear_bss();
 
+	/*
+	 * Load microcode early on BSP.
+	 */
+	load_ucode_bsp(real_mode_data);
+
 	/* Make NULL pointers segfault */
 	zap_identity_mappings();
 
Signature · 1 line
1.8.0.1
#12 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 23 lines · Fenghua Yu

From: Fenghua Yu <[email protected]>

This updates ucode in 64-bit mode. Paging and virtual address are working now.

---
 arch/x86/kernel/head64.c | 6 ++++++
 1 file changed, 6 insertions(+)
arch/x86/kernel/head64.c +1 -0
index 037df57..a512f56 100644
@@ -25,6 +25,7 @@
 #include <asm/kdebug.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/microcode.h>
 
 static void __init zap_identity_mappings(void)
 {
@@ -73,6 +74,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
        /* clear bss before set_intr_gate with early_idt_handler */

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char * real_mode_data) · line 84

Quoted 10 lines
arch/x86/kernel/head64.c +5 -0
        clear_bss();
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(real_mode_data);
+
        /* Make NULL pointers segfault */
        zap_identity_mappings();
 

So this patchset is after #PF handler set early page table version?

then load_ucode_bsp() should be after

   load_idt((const struct desc_ptr *)&idt_descr);

otherwise it will not work.

Yinghai

#13 lore raw

RE: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 50 lines

-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Yinghai Lu
Sent: Sunday, December 16, 2012 9:59 AM
To: Yu, Fenghua
Cc: H Peter Anvin; Ingo Molnar; Thomas Gleixner; Mallick, Asit K; Tigran Aivazian; Andreas Herrmann; Borislav Petkov; linux-kernel; x86
Subject: Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64- bit

Quoted 3 lines · Fenghua Yu

From: Fenghua Yu <[email protected]>

This updates ucode in 64-bit mode. Paging and virtual address are

working now.

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char *

Quoted 19 lines
---
 arch/x86/kernel/head64.c | 6 ++++++
 1 file changed, 6 insertions(+)
arch/x86/kernel/head64.c +1 -0
index 037df57..a512f56 100644
@@ -25,6 +25,7 @@
 #include <asm/kdebug.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/microcode.h>
 
 static void __init zap_identity_mappings(void)
 {
@@ -73,6 +74,11 @@ void __init x86_64_start_kernel(char *

real_mode_data)

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char * real_mode_data) · line 84

Quoted 11 lines
arch/x86/kernel/head64.c +5 -0
        /* clear bss before set_intr_gate with early_idt_handler */
        clear_bss();
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(real_mode_data);
+
        /* Make NULL pointers segfault */
        zap_identity_mappings();
 

So this patchset is after #PF handler set early page table version?

Quoted 7 lines

then load_ucode_bsp() should be after

   load_idt((const struct desc_ptr *)&idt_descr);

otherwise it will not work.

Yinghai

load_ucode_bsp() only accesses initrd image, a few global variables. It doesn't call any other kernel functions (e.g. printk or kmalloc()). It is like this mainly because it works on both 32 and 64 bit.

So there is no PF and idt should not impact the function, right?

Thanks.

-Fenghua

#14 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

In reply to Yinghai Lu
Quoted 27 lines · Yinghai Lu
Quoted 14 lines
arch/x86/kernel/head64.c +1 -0
index 037df57..a512f56 100644
@@ -25,6 +25,7 @@
 #include <asm/kdebug.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/microcode.h>
 
 static void __init zap_identity_mappings(void)
 {
@@ -73,6 +74,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
        /* clear bss before set_intr_gate with early_idt_handler */

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char * real_mode_data) · line 84

Quoted 10 lines
arch/x86/kernel/head64.c +5 -0
        clear_bss();
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(real_mode_data);
+
        /* Make NULL pointers segfault */
        zap_identity_mappings();
 

So this patchset is after #PF handler set early page table version?

Quoted 4 lines

then load_ucode_bsp() should be after

   load_idt((const struct desc_ptr *)&idt_descr);

This patchset isn't before the #PF handler version (you can tell because it has zap_identity_mappings()), but it does make sense to load the IDT first.

-hpa

#15 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 28 lines · H. Peter Anvin
Quoted 27 lines · Yinghai Lu
Quoted 14 lines
arch/x86/kernel/head64.c +1 -0
index 037df57..a512f56 100644
@@ -25,6 +25,7 @@
 #include <asm/kdebug.h>
 #include <asm/e820.h>
 #include <asm/bios_ebda.h>
+#include <asm/microcode.h>
 
 static void __init zap_identity_mappings(void)
 {
@@ -73,6 +74,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
        /* clear bss before set_intr_gate with early_idt_handler */

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char * real_mode_data) · line 84

Quoted 10 lines
arch/x86/kernel/head64.c +5 -0
        clear_bss();
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(real_mode_data);
+
        /* Make NULL pointers segfault */
        zap_identity_mappings();
 

So this patchset is after #PF handler set early page table version?

Quoted 8 lines
Quoted 4 lines

then load_ucode_bsp() should be after

   load_idt((const struct desc_ptr *)&idt_descr);

This patchset isn't before the #PF handler version (you can tell because it has zap_identity_mappings()), but it does make sense to load the IDT first.

it has to be rebased after #PF handler version. otherwise it can not handle for framdisk
that is loaded after 1G.

Fenghua,

can you post your boot log with 64bit with your patch?

Yinghai

#16 lore raw

RE: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 11 lines
Quoted 2 lines

This patchset isn't before the #PF handler version (you can tell

because

Quoted 1 line

it has zap_identity_mappings()), but it does make sense to load the

IDT

Quoted 1 line

first.

it has to be rebased after #PF handler version. otherwise it can not handle for framdisk
that is loaded after 1G.

Quoted 5 lines

Fenghua,

can you post your boot log with 64bit with your patch?

Yinghai

Attached is dmesg with the patches.

Thanks.

-Fenghua

#17 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 5 lines · Fenghua
Quoted 5 lines

it has to be rebased after #PF handler version. otherwise it can not handle for framdisk
that is loaded after 1G.

Quoted 8 lines
Quoted 5 lines

Fenghua,

can you post your boot log with 64bit with your patch?

Yinghai

Attached is dmesg with the patches.

yes, your laptop only have 1G ram, and

[    0.000000] e820: BIOS-provided physical RAM map:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable
[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000d2000-0x00000000000d3fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000003e6affff] usable
[    0.000000] BIOS-e820: [mem 0x000000003e6b0000-0x000000003e6ccfff] ACPI data
[    0.000000] BIOS-e820: [mem 0x000000003e6cd000-0x000000003e6fffff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x000000003e700000-0x000000003effffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed14000-0x00000000fed19fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved

ramdisk is at

     RAMDISK: [mem 0x27608000-0x2fafbfff]

and current kernel default set 1G to kernel mapping. so it happens to work with your patchset.

please find one sytem with 4G or more to test it.

and you may need to rebase your patches on top of my for-x86-boot branch with working
#PF handler set page table patch.

git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
for-x86-boot

Thanks

Yinghai

#18 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 40 lines · Yinghai Lu
Quoted 5 lines · Fenghua
Quoted 5 lines

it has to be rebased after #PF handler version. otherwise it can not handle for framdisk
that is loaded after 1G.

Quoted 8 lines
Quoted 5 lines

Fenghua,

can you post your boot log with 64bit with your patch?

Yinghai

Attached is dmesg with the patches.

yes, your laptop only have 1G ram, and

[    0.000000] e820: BIOS-provided physical RAM map:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable
[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000d2000-0x00000000000d3fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000003e6affff] usable
[    0.000000] BIOS-e820: [mem 0x000000003e6b0000-0x000000003e6ccfff] ACPI data
[    0.000000] BIOS-e820: [mem 0x000000003e6cd000-0x000000003e6fffff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x000000003e700000-0x000000003effffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed14000-0x00000000fed19fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved

ramdisk is at

     RAMDISK: [mem 0x27608000-0x2fafbfff]

and current kernel default set 1G to kernel mapping. so it happens to work with your patchset.

Quoted 8 lines

please find one sytem with 4G or more to test it.

and you may need to rebase your patches on top of my for-x86-boot branch with working
#PF handler set page table patch.

git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
for-x86-boot

also you did not consider initrd relocating....

please check attached fix, and see if you can fold in into you next posting.

Thanks

Yinghai

---
 arch/x86/kernel/microcode_intel_early.c |  101 ++++++++++++++++----------------
 arch/x86/kernel/setup.c                 |   11 +++
 2 files changed, 64 insertions(+), 48 deletions(-)
arch/x86/kernel/microcode_intel_early.c +53 -48
Index: linux-2.6/arch/x86/kernel/microcode_intel_early.c
===================================================================
@@ -20,9 +20,11 @@
 #include <linux/vmalloc.h>
 #include <linux/mm.h>
 #include <linux/earlycpio.h>
+
 #include <asm/msr.h>
 #include <asm/microcode_intel.h>
 #include <asm/processor.h>
+#include <asm/setup.h>
 
 struct microcode_intel __initdata *mc_saved_in_initrd[MAX_UCODE_COUNT];
 struct mc_saved_data mc_saved_data;
@@ -290,12 +292,44 @@ static int __cpuinit collect_cpu_info_ea
 	return 0;
 }
 
+#ifdef CONFIG_X86_64
+void __init update_mc_saved_data(unsigned long pa_offset)
+{
+	int i;
+	unsigned long addr;
+
+	if (!pa_offset || !mc_saved_data.mc_saved)
+		return;
+
+	for (i = 0; i< mc_saved_data.mc_saved_count; i++)
+		mc_saved_data.mc_saved[i] += pa_offset;
+}
+#else
+void __init update_mc_saved_data(unsigned long pa_offset)
+{
+	int i;
+
+	if (mc_saved_data.mc_saved) {
+		mc_saved_data.mc_saved = __va(mc_saved_data.mc_saved);
+		for (i = 0; i < mc_saved_data.mc_saved_count; i++)
+			mc_saved_data.mc_saved[i] =
+					 __va(mc_saved_data.mc_saved[i] + pa_offset);
+
+	}
+
+	mc_saved_data.ucode_cpu_info = __va(mc_saved_data.ucode_cpu_info);
+	if (mc_saved_data.ucode_cpu_info->mc)
+		mc_saved_data.ucode_cpu_info->mc =
+				 __va(mc_saved_data.ucode_cpu_info->mc);
+}
+
+#endif
+
 static __init enum ucode_state
-scan_microcode(unsigned long start, unsigned long end,
+scan_microcode(unsigned long start, unsigned long size,
 		struct mc_saved_data *mc_saved_data,
 		struct microcode_intel **mc_saved_in_initrd)
 {
-	unsigned int size = end - start + 1;
 	struct cpio_data cd = { 0, 0 };
 	char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
 	long offset = 0;
@@ -308,7 +342,7 @@ scan_microcode(unsigned long start, unsi
 					 mc_saved_in_initrd, SYSTEM_BOOTING);
 }
 
-static int __init
+static int __cpuinit
 apply_microcode_early(struct mc_saved_data *mc_saved_data, int cpu)
 {
 	struct ucode_cpu_info *uci = mc_saved_data->ucode_cpu_info + cpu;
@@ -339,32 +373,6 @@ apply_microcode_early(struct mc_saved_da
 	return 0;
 }
 
-#ifdef CONFIG_X86_32
-static void __init map_mc_saved(struct mc_saved_data *mc_saved_data,
-				struct microcode_intel **mc_saved_in_initrd)
-{
-	int i;
-
-	if (mc_saved_data->mc_saved) {
-		for (i = 0; i < mc_saved_data->mc_saved_count; i++)
-			mc_saved_data->mc_saved[i] =
-					 __va(mc_saved_data->mc_saved[i]);
-
-		mc_saved_data->mc_saved = __va(mc_saved_data->mc_saved);
-	}
-
-	if (mc_saved_data->ucode_cpu_info->mc)
-		mc_saved_data->ucode_cpu_info->mc =
-				 __va(mc_saved_data->ucode_cpu_info->mc);
-	mc_saved_data->ucode_cpu_info = __va(mc_saved_data->ucode_cpu_info);
-}
-#else
-static inline void __init map_mc_saved(struct mc_saved_data *mc_saved_data,
-				struct microcode_intel **mc_saved_in_initrd)
-{
-}
-#endif
-
 void __init save_microcode_in_initrd(struct mc_saved_data *mc_saved_data,
 		 struct microcode_intel **mc_saved_in_initrd)
 {
@@ -376,7 +384,7 @@ void __init save_microcode_in_initrd(str
 static void __init
 _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
 		      struct microcode_intel **mc_saved_in_initrd,
-		      unsigned long initrd_start, unsigned long initrd_end)
+		      unsigned long initrd_start, unsigned long initrd_size)
 {
 	int cpu = 0;
 
@@ -387,37 +395,34 @@ _load_ucode_intel_bsp(struct mc_saved_da
 			(struct ucode_cpu_info *)__pa(ucode_cpu_info_early);
 #endif
 	collect_cpu_info_early(mc_saved_data->ucode_cpu_info + cpu);
-	scan_microcode(initrd_start, initrd_end, mc_saved_data,
+	scan_microcode(initrd_start, initrd_size, mc_saved_data,
 		       mc_saved_in_initrd);
 	load_microcode(mc_saved_data, cpu);
 	apply_microcode_early(mc_saved_data, cpu);
-	map_mc_saved(mc_saved_data, mc_saved_in_initrd);
 }
 
 void __init
 load_ucode_intel_bsp(char *real_mode_data)
 {
-	u64 ramdisk_image, ramdisk_size, ramdisk_end;
-	unsigned long initrd_start, initrd_end;
-	struct boot_params *boot_params;
-
-	boot_params = (struct boot_params *)real_mode_data;
-	ramdisk_image = boot_params->hdr.ramdisk_image;
-	ramdisk_size  = boot_params->hdr.ramdisk_size;
+	u64 ramdisk_image, ramdisk_size;
 
 #ifdef CONFIG_X86_64
-	ramdisk_end  = PAGE_ALIGN(ramdisk_image + ramdisk_size);
-	initrd_start = ramdisk_image + PAGE_OFFSET;
-	initrd_end = initrd_start + ramdisk_size;
+	ramdisk_image = boot_params.hdr.ramdisk_image;
+	ramdisk_size  = boot_params.hdr.ramdisk_size;
+	if (!ramdisk_image || !ramdisk_size)
+		return;
 	_load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd,
-			      initrd_start, initrd_end);
+			      ramdisk_image, ramdisk_size);
 #else
-	ramdisk_end  = ramdisk_image + ramdisk_size;
-	initrd_start = ramdisk_image;
-	initrd_end = initrd_start + ramdisk_size;
+	struct boot_params *boot_params = (struct boot_params *)real_mode_data;
+
+	ramdisk_image = boot_params->hdr.ramdisk_image;
+	ramdisk_size  = boot_params->hdr.ramdisk_size;
+	if (!ramdisk_image || !ramdisk_size)
+		return;
 	_load_ucode_intel_bsp((struct mc_saved_data *)__pa(&mc_saved_data),
-			(struct microcode_intel **)__pa(mc_saved_in_initrd),
-			initrd_start, initrd_end);
+			      (struct microcode_intel **)__pa(mc_saved_in_initrd),
+			      ramdisk_image, ramdisk_size);
 #endif
 }
 
arch/x86/kernel/setup.c +11 -0
Index: linux-2.6/arch/x86/kernel/setup.c
===================================================================
@@ -309,6 +309,14 @@ static u64 __init get_mem_size(unsigned
 
 #ifdef CONFIG_BLK_DEV_INITRD
 
+#ifdef CONFIG_MICROCODE_INTEL_EARLY
+void update_mc_saved_data(unsigned long pa_offset);
+#else
+static inline void update_mc_saved_data(unsigned long pa_offset)
+{
+}
+#endif
+
 static u64 __init get_ramdisk_image(void)
 {
 	u64 ramdisk_image = boot_params.hdr.ramdisk_image;
@@ -376,6 +384,8 @@ static void __init relocate_initrd(void)
 		" [mem %#010llx-%#010llx]\n",
 		ramdisk_image, ramdisk_image + ramdisk_size - 1,
 		ramdisk_here, ramdisk_here + ramdisk_size - 1);
+
+	update_mc_saved_data(ramdisk_here - ramdisk_image);
 }
 
 static void __init early_reserve_initrd(void)
@@ -419,6 +429,7 @@ static void __init reserve_initrd(void)
 		/* All are mapped, easy case */
 		initrd_start = ramdisk_image + PAGE_OFFSET;
 		initrd_end = initrd_start + ramdisk_size;
+		update_mc_saved_data(0);
 		return;
 	}
 
#19 lore raw

RE: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 79 lines

-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Yinghai Lu
Sent: Sunday, December 16, 2012 6:02 PM
To: Yu, Fenghua
Cc: H. Peter Anvin; Ingo Molnar; Thomas Gleixner; Mallick, Asit K; Tigran Aivazian; Andreas Herrmann; Borislav Petkov; linux-kernel; x86
Subject: Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64- bit

Quoted 1 line · Yinghai Lu

On Sun, Dec 16, 2012 at 3:59 PM, Yu, Fenghua <[email protected]>

Quoted 2 lines · wrote:
Quoted 2 lines
Quoted 2 lines

it has to be rebased after #PF handler version. otherwise it can

not

Quoted 8 lines
Quoted 8 lines
Quoted 7 lines

handle for framdisk that is loaded after 1G.

Fenghua,

can you post your boot log with 64bit with your patch?

Yinghai

Quoted 7 lines
Quoted 2 lines

Attached is dmesg with the patches.

yes, your laptop only have 1G ram, and

[    0.000000] e820: BIOS-provided physical RAM map:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff]

usable

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000000d2000-0x00000000000d3fff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000003e6affff]

usable

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x000000003e6b0000-0x000000003e6ccfff]

ACPI data

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x000000003e6cd000-0x000000003e6fffff]

ACPI NVS

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x000000003e700000-0x000000003effffff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000fed14000-0x00000000fed19fff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff]

reserved

Quoted 1 line
[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff]

reserved

Quoted 7 lines

ramdisk is at

     RAMDISK: [mem 0x27608000-0x2fafbfff]

and current kernel default set 1G to kernel mapping. so it happens to work with your patchset.

Quoted 6 lines

please find one sytem with 4G or more to test it.

and you may need to rebase your patches on top of my for-x86-boot branch with working #PF handler set page table patch.

git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-

yinghai.gi

Quoted 2 lines

t
for-x86-boot

Quoted 8 lines

also you did not consider initrd relocating....

please check attached fix, and see if you can fold in into you next posting.

Thanks

Yinghai

Your fix is based on old v2 patchset.

Today's v3 patchset fixes this issue already. Basically it uses offset instead of pointer in initrd image and converts offset to pointer when it accesses the microcode in initrd image. It uses pointers after boot time.

Thanks.

-Fenghua

#20 lore raw

RE: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

In reply to Yinghai Lu
Quoted 74 lines

-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Yinghai Lu
Sent: Sunday, December 16, 2012 4:42 PM
To: Yu, Fenghua
Cc: H. Peter Anvin; Ingo Molnar; Thomas Gleixner; Mallick, Asit K; Tigran Aivazian; Andreas Herrmann; Borislav Petkov; linux-kernel; x86
Subject: Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64- bit

Quoted 5 lines · Fenghua
Quoted 5 lines

it has to be rebased after #PF handler version. otherwise it can not handle for framdisk
that is loaded after 1G.

Quoted 8 lines
Quoted 5 lines

Fenghua,

can you post your boot log with 64bit with your patch?

Yinghai

Attached is dmesg with the patches.

yes, your laptop only have 1G ram, and

[    0.000000] e820: BIOS-provided physical RAM map:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff]
usable
[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000000d2000-0x00000000000d3fff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff]
reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000003e6affff]
usable
[    0.000000] BIOS-e820: [mem 0x000000003e6b0000-0x000000003e6ccfff]
ACPI data
[    0.000000] BIOS-e820: [mem 0x000000003e6cd000-0x000000003e6fffff]
ACPI NVS
[    0.000000] BIOS-e820: [mem 0x000000003e700000-0x000000003effffff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000f0000000-0x00000000f3ffffff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec0ffff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed003ff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed14000-0x00000000fed19fff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed8ffff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff]
reserved
[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff]

reserved

ramdisk is at

     RAMDISK: [mem 0x27608000-0x2fafbfff]

and current kernel default set 1G to kernel mapping. so it happens to work with your patchset.

please find one sytem with 4G or more to test it.

and you may need to rebase your patches on top of my for-x86-boot branch with working
#PF handler set page table patch.

Quoted 6 lines

git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
for-x86-boot

Thanks

Yinghai

OSV may need the patchset based on old kernel. So I'll have the patchset ready. Is this the right place to call load_ucode_bsp() in the upstream kernel?

arch/x86/kernel/head64.c +5 -0
index a512f56..e94b90e 100644
@@ -93,6 +88,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
        }
        load_idt((const struct desc_ptr *)&idt_descr);
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(__va(real_mode_data));
+
        if (console_loglevel == 10)
                early_printk("Kernel alive\n");
 
#21 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 9 lines · Fenghua

OSV may need the patchset based on old kernel. So I'll have the patchset ready. Is this the right place to call load_ucode_bsp() in the upstream kernel?

arch/x86/kernel/head64.c +0 -0
index a512f56..e94b90e 100644
@@ -93,6 +88,11 @@ void __init x86_64_start_kernel(char * real_mode_data)
        }

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char * real_mode_data) · line 98

Quoted 10 lines
arch/x86/kernel/head64.c +5 -0
        load_idt((const struct desc_ptr *)&idt_descr);
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(__va(real_mode_data));
+
        if (console_loglevel == 10)
                early_printk("Kernel alive\n");
 

it has to be after #PF handler set page table patch...

otherwise when ramdisk is above 1G, customer will get early PF exception.

#22 lore raw

RE: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 5 lines
Quoted 1 line

it has to be after #PF handler set page table patch...

otherwise when ramdisk is above 1G, customer will get early PF exception.

In old kernel, where can I put load_ucode_bsp()? Is calling load_ucode_bsp() after relocate_initrd() earliest place?

Thanks.

-Fenghua

#23 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 7 lines · Fenghua
Quoted 5 lines
Quoted 1 line

it has to be after #PF handler set page table patch...

otherwise when ramdisk is above 1G, customer will get early PF exception.

In old kernel, where can I put load_ucode_bsp()? Is calling load_ucode_bsp() after relocate_initrd() earliest place?

after init_memory_mapping.

#24 lore raw

RE: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

In reply to Yinghai Lu
Quoted 26 lines

From: [email protected] [mailto:[email protected]] On Behalf Of Yinghai Lu

Quoted 2 lines · Fenghua

OSV may need the patchset based on old kernel. So I'll have the

patchset ready. Is this the right place to call load_ucode_bsp() in the upstream kernel?

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char *

Quoted 6 lines
arch/x86/kernel/head64.c +0 -0
index a512f56..e94b90e 100644
@@ -93,6 +88,11 @@ void __init x86_64_start_kernel(char *

real_mode_data)

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char * real_mode_data) · line 98

Quoted 11 lines
arch/x86/kernel/head64.c +5 -0
        }
        load_idt((const struct desc_ptr *)&idt_descr);
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(__va(real_mode_data));
+
        if (console_loglevel == 10)
                early_printk("Kernel alive\n");
 
Quoted 4 lines

it has to be after #PF handler set page table patch...

otherwise when ramdisk is above 1G, customer will get early PF exception.

If based on your for_x86_boot tree, is load_ucode_bsp() called afer load_idt()?

Thanks.

-Fenghua

#25 lore raw

Re: [PATCH v3 08/10] x86/head64.c: Early update ucode in 64-bit

Quoted 26 lines · Fenghua
Quoted 26 lines

From: [email protected] [mailto:[email protected]] On Behalf Of Yinghai Lu

Quoted 2 lines · Fenghua

OSV may need the patchset based on old kernel. So I'll have the

patchset ready. Is this the right place to call load_ucode_bsp() in the upstream kernel?

arch/x86/kernel/head64.c void __init x86_64_start_kernel(char *

Quoted 6 lines
arch/x86/kernel/head64.c +0 -0
index a512f56..e94b90e 100644
@@ -93,6 +88,11 @@ void __init x86_64_start_kernel(char *

real_mode_data)

Quoted 11 lines
arch/x86/kernel/head64.c +5 -0
        }
        load_idt((const struct desc_ptr *)&idt_descr);
 
+       /*
+        * Load microcode early on BSP.
+        */
+       load_ucode_bsp(__va(real_mode_data));
+
        if (console_loglevel == 10)
                early_printk("Kernel alive\n");
 
Quoted 7 lines
Quoted 4 lines

it has to be after #PF handler set page table patch...

otherwise when ramdisk is above 1G, customer will get early PF exception.

If based on your for_x86_boot tree, is load_ucode_bsp() called afer load_idt()?

yes.

Please do try your patches on system with more than 4G ram.

Thanks

Yinghai

author
#26 lore raw

PATCH v3 9/10 x86/mm/init.c: Copy ucode from initrd image to memory

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

Before initrd image is freed, copy valid ucode patches from initrd image to kernel virtual memory. The saved ucode will be used to update AP in resume or hotplug.

---
 arch/x86/mm/init.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/x86/mm/init.c +10 -0
index d7aea41..e5e7973 100644
@@ -16,6 +16,7 @@
 #include <asm/tlb.h>
 #include <asm/proto.h>
 #include <asm/dma.h>		/* for MAX_DMA_PFN */
+#include <asm/microcode.h>
 
 unsigned long __initdata pgt_buf_start;
 unsigned long __meminitdata pgt_buf_end;
@@ -391,6 +392,15 @@ void free_initmem(void)
 #ifdef CONFIG_BLK_DEV_INITRD
 void __init free_initrd_mem(unsigned long start, unsigned long end)
 {
+#ifdef CONFIG_MICROCODE_EARLY
+	/*
+	 * Remember, initrd memory may contain microcode or other useful things.
+	 * Before we lose initrd mem, we need to find a place to hold them
+	 * now that normal virtual memory is enabled.
+	 */
+	save_microcode_in_initrd();
+#endif
+
 	/*
 	 * end could be not aligned, and We can not align that,
 	 * decompresser could be confused by aligned initrd_end
Signature · 1 line
1.8.0.1
author
#27 lore raw

PATCH v3 10/10 x86/Kconfig: Configurations to enable/disable the feature

In reply to Fenghua Yu

From: Fenghua Yu <[email protected]>

MICROCODE_INTEL_LIB, MICROCODE_INTEL_EARLY, and MICROCODE_EARLY are three new configurations to enable or disable the feature.

---
 arch/x86/Kconfig | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/x86/Kconfig +18 -0
index 65a872b..edf6fd2 100644
@@ -1028,6 +1028,24 @@ config MICROCODE_OLD_INTERFACE
 	def_bool y
 	depends on MICROCODE
 
+config MICROCODE_INTEL_LIB
+	def_bool y
+	depends on MICROCODE_INTEL
+
+config MICROCODE_INTEL_EARLY
+	bool "Early load microcode"
+	depends on MICROCODE_INTEL && BLK_DEV_INITRD
+	default y
+	help
+	  This option provides functionality to read additional microcode data
+	  at the beginning of initrd image. The data tells kernel to load
+	  microcode to CPU's as early as possible. No functional change if no
+	  microcode data is glued to the initrd, therefore it's safe to say Y.
+
+config MICROCODE_EARLY
+	def_bool y
+	depends on MICROCODE_INTEL_EARLY
+
 config X86_MSR
 	tristate "/dev/cpu/*/msr - Model-specific register support"
 	---help---
Signature · 1 line
1.8.0.1