ARM: cache-l2x0: Manage the errata at run time

Make it possible to manage the errata by its own by using the l2x0 ID register. This relieves the platforms from choosing the Errata's at compile time

---
 arch/arm/include/asm/hardware/cache-l2x0.h |    1 +
 arch/arm/mm/cache-l2x0.c                   |   72 +++++++++++++--------------
 2 files changed, 36 insertions(+), 37 deletions(-)

index 49ac638..ab76131 100644
@@ -134,6 +134,7 @@ struct l2x0_regs {
 };
 
 extern struct l2x0_regs l2x0_saved_regs;
+extern u32 l2x0_revision;
 
 #endif /* __ASSEMBLY__ */
 

1.7.2.dirty