irqchip: Renesas INTC External IRQ pin v2 update

@@ -57,13 +57,13 @@ struct intc_irqpin_iomem {
 	unsigned long (*read)(void __iomem *iomem);
 	void (*write)(void __iomem *iomem, unsigned long data);
 	int width;
-};  
+};
 
 struct intc_irqpin_irq {
 	int hw_irq;
 	int irq;
 	struct intc_irqpin_priv *p;
-};  
+};
 
 struct intc_irqpin_priv {
 	struct intc_irqpin_iomem iomem[INTC_IRQPIN_REG_NR];

@@ -99,6 +99,7 @@ static inline unsigned long intc_irqpin_
 					     int reg)
 {
 	struct intc_irqpin_iomem *i = &p->iomem[reg];
+
 	return i->read(i->iomem);
 }
 

@@ -106,6 +107,7 @@ static inline void intc_irqpin_write(str
 				     int reg, unsigned long data)
 {
 	struct intc_irqpin_iomem *i = &p->iomem[reg];
+
 	i->write(i->iomem, data);
 }
 

@@ -405,7 +407,7 @@ static int intc_irqpin_probe(struct plat
 			dev_warn(&pdev->dev, "irq base mismatch (%d/%d)\n",
 				 p->config.irq_base, k);
 	}
-	
+
 	return 0;
 
 err3:

@@ -61,7 +61,8 @@ struct intc_irqpin_iomem {
 
 struct intc_irqpin_irq {
 	int hw_irq;
-	int irq;
+	int requested_irq;
+	int domain_irq;
 	struct intc_irqpin_priv *p;
 };
 

@@ -171,8 +172,7 @@ static int intc_irqpin_set_sense(struct
 static void intc_irqpin_dbg(struct intc_irqpin_irq *i, char *str)
 {
 	dev_dbg(&i->p->pdev->dev, "%s (%d:%d:%d)\n",
-		str, i->irq, i->hw_irq,
-		irq_find_mapping(i->p->irq_domain, i->hw_irq));
+		str, i->requested_irq, i->hw_irq, i->domain_irq);
 }
 
 static void intc_irqpin_irq_enable(struct irq_data *d)

@@ -196,7 +196,7 @@ static void intc_irqpin_irq_disable(stru
 static void intc_irqpin_irq_enable_force(struct irq_data *d)
 {
 	struct intc_irqpin_priv *p = irq_data_get_irq_chip_data(d);
-	int irq = p->irq[irqd_to_hwirq(d)].irq;
+	int irq = p->irq[irqd_to_hwirq(d)].requested_irq;
 
 	intc_irqpin_irq_enable(d);
 	irq_get_chip(irq)->irq_unmask(irq_get_irq_data(irq));

@@ -205,7 +205,7 @@ static void intc_irqpin_irq_enable_force
 static void intc_irqpin_irq_disable_force(struct irq_data *d)
 {
 	struct intc_irqpin_priv *p = irq_data_get_irq_chip_data(d);
-	int irq = p->irq[irqd_to_hwirq(d)].irq;
+	int irq = p->irq[irqd_to_hwirq(d)].requested_irq;
 
 	irq_get_chip(irq)->irq_mask(irq_get_irq_data(irq));
 	intc_irqpin_irq_disable(d);

@@ -246,7 +246,7 @@ static irqreturn_t intc_irqpin_irq_handl
 	if (intc_irqpin_read(p, INTC_IRQPIN_REG_SOURCE) & bit) {
 		intc_irqpin_write(p, INTC_IRQPIN_REG_SOURCE, ~bit);
 		intc_irqpin_dbg(i, "demux2");
-		generic_handle_irq(irq_find_mapping(p->irq_domain, i->hw_irq));
+		generic_handle_irq(i->domain_irq);
 		return IRQ_HANDLED;
 	}
 	return IRQ_NONE;

@@ -257,6 +257,9 @@ static int intc_irqpin_irq_domain_map(st
 {
 	struct intc_irqpin_priv *p = h->host_data;
 
+	p->irq[hw].domain_irq = virq;
+	p->irq[hw].hw_irq = hw;
+
 	intc_irqpin_dbg(&p->irq[hw], "map");
 	irq_set_chip_data(virq, h->host_data);
 	irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);

@@ -314,9 +317,8 @@ static int intc_irqpin_probe(struct plat
 		if (!irq)
 			break;
 
-		p->irq[k].hw_irq = k;
 		p->irq[k].p = p;
-		p->irq[k].irq = irq->start;
+		p->irq[k].requested_irq = irq->start;
 	}
 
 	p->number_of_irqs = k;

@@ -389,7 +391,8 @@ static int intc_irqpin_probe(struct plat
 
 	/* request and set priority on interrupts one by one */
 	for (k = 0; k < p->number_of_irqs; k++) {
-		if (request_irq(p->irq[k].irq, intc_irqpin_irq_handler,
+		if (request_irq(p->irq[k].requested_irq,
+				intc_irqpin_irq_handler,
 				0, name, &p->irq[k])) {
 			dev_err(&pdev->dev, "failed to request low IRQ\n");
 			ret = -ENOENT;

@@ -402,17 +405,16 @@ static int intc_irqpin_probe(struct plat
 
 	/* warn in case of mismatch if irq base is specified */
 	if (p->config.irq_base) {
-		k = irq_find_mapping(p->irq_domain, 0);
-		if (p->config.irq_base != k)
+		if (p->config.irq_base != p->irq[0].domain_irq)
 			dev_warn(&pdev->dev, "irq base mismatch (%d/%d)\n",
-				 p->config.irq_base, k);
+				 p->config.irq_base, p->irq[0].domain_irq);
 	}
 
 	return 0;
 
 err3:
 	for (; k >= 0; k--)
-		free_irq(p->irq[k - 1].irq, &p->irq[k - 1]);
+		free_irq(p->irq[k - 1].requested_irq, &p->irq[k - 1]);
 
 	irq_domain_remove(p->irq_domain);
 err2:

@@ -430,7 +432,7 @@ static int intc_irqpin_remove(struct pla
 	int k;
 
 	for (k = 0; k < p->number_of_irqs; k++)
-		free_irq(p->irq[k].irq, &p->irq[k]);
+		free_irq(p->irq[k].requested_irq, &p->irq[k]);
 
 	irq_domain_remove(p->irq_domain);
 

@@ -199,6 +199,11 @@ static void intc_irqpin_irq_enable_force
 	int irq = p->irq[irqd_to_hwirq(d)].requested_irq;
 
 	intc_irqpin_irq_enable(d);
+
+	/* enable interrupt through parent interrupt controller,
+	 * assumes non-shared interrupt with 1:1 mapping
+	 * needed for busted IRQs on some SoCs like sh73a0
+	 */
 	irq_get_chip(irq)->irq_unmask(irq_get_irq_data(irq));
 }
 

@@ -207,6 +212,10 @@ static void intc_irqpin_irq_disable_forc
 	struct intc_irqpin_priv *p = irq_data_get_irq_chip_data(d);
 	int irq = p->irq[irqd_to_hwirq(d)].requested_irq;
 
+	/* disable interrupt through parent interrupt controller,
+	 * assumes non-shared interrupt with 1:1 mapping
+	 * needed for busted IRQs on some SoCs like sh73a0
+	 */
 	irq_get_chip(irq)->irq_mask(irq_get_irq_data(irq));
 	intc_irqpin_irq_disable(d);
 }

@@ -294,7 +294,7 @@ static int intc_irqpin_probe(struct plat
 	int ret;
 	int k;
 
-	p = kzalloc(sizeof(*p), GFP_KERNEL);
+	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
 	if (!p) {
 		dev_err(&pdev->dev, "failed to allocate driver data\n");
 		ret = -ENOMEM;

@@ -316,7 +316,7 @@ static int intc_irqpin_probe(struct plat
 		if (!io[k]) {
 			dev_err(&pdev->dev, "not enough IOMEM resources\n");
 			ret = -EINVAL;
-			goto err1;
+			goto err0;
 		}
 	}
 

@@ -334,7 +334,7 @@ static int intc_irqpin_probe(struct plat
 	if (p->number_of_irqs < 1) {
 		dev_err(&pdev->dev, "not enough IRQ resources\n");
 		ret = -EINVAL;
-		goto err1;
+		goto err0;
 	}
 
 	/* ioremap IOMEM and setup read/write callbacks */

@@ -355,14 +355,15 @@ static int intc_irqpin_probe(struct plat
 		default:
 			dev_err(&pdev->dev, "IOMEM size mismatch\n");
 			ret = -EINVAL;
-			goto err2;
+			goto err0;
 		}
 
-		i->iomem = ioremap_nocache(io[k]->start, resource_size(io[k]));
+		i->iomem = devm_ioremap_nocache(&pdev->dev, io[k]->start,
+						resource_size(io[k]));
 		if (!i->iomem) {
 			dev_err(&pdev->dev, "failed to remap IOMEM\n");
 			ret = -ENXIO;
-			goto err2;
+			goto err0;
 		}
 	}
 

@@ -395,17 +396,17 @@ static int intc_irqpin_probe(struct plat
 	if (!p->irq_domain) {
 		ret = -ENXIO;
 		dev_err(&pdev->dev, "cannot initialize irq domain\n");
-		goto err2;
+		goto err0;
 	}
 
 	/* request and set priority on interrupts one by one */
 	for (k = 0; k < p->number_of_irqs; k++) {
-		if (request_irq(p->irq[k].requested_irq,
-				intc_irqpin_irq_handler,
-				0, name, &p->irq[k])) {
+		if (devm_request_irq(&pdev->dev, p->irq[k].requested_irq,
+				     intc_irqpin_irq_handler,
+				     0, name, &p->irq[k])) {
 			dev_err(&pdev->dev, "failed to request low IRQ\n");
 			ret = -ENOENT;
-			goto err3;
+			goto err1;
 		}
 		intc_irqpin_mask_unmask_prio(p, k, 0);
 	}

@@ -421,16 +422,8 @@ static int intc_irqpin_probe(struct plat
 
 	return 0;
 
-err3:
-	for (; k >= 0; k--)
-		free_irq(p->irq[k - 1].requested_irq, &p->irq[k - 1]);
-
-	irq_domain_remove(p->irq_domain);
-err2:
-	for (k = 0; k < INTC_IRQPIN_REG_NR; k++)
-		iounmap(p->iomem[k].iomem);
 err1:
-	kfree(p);
+	irq_domain_remove(p->irq_domain);
 err0:
 	return ret;
 }

@@ -438,17 +431,9 @@ err0:
 static int intc_irqpin_remove(struct platform_device *pdev)
 {
 	struct intc_irqpin_priv *p = platform_get_drvdata(pdev);
-	int k;
-
-	for (k = 0; k < p->number_of_irqs; k++)
-		free_irq(p->irq[k].requested_irq, &p->irq[k]);
 
 	irq_domain_remove(p->irq_domain);
 
-	for (k = 0; k < INTC_IRQPIN_REG_NR; k++)
-		iounmap(p->iomem[k].iomem);
-
-	kfree(p);
 	return 0;
 }
 

@@ -1,3 +1,22 @@
+/*
+ * Renesas INTC External IRQ Pin Driver
+ *
+ *  Copyright (C) 2013 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
 #ifndef __IRQ_RENESAS_INTC_IRQPIN_H__
 #define __IRQ_RENESAS_INTC_IRQPIN_H__