Consolidate bool type
Subsystems (14)
PATCH v7 1/1 Consolidate bool type
'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0.
Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files.
Signed-off-by York Sun <[email protected]>
Acked-by Allen Martin <[email protected]>
---
Change since v1:
Move 'false' and 'true' to the common header file.
Change since v2:
Use stdbool.h
Consolidate all TRUE, FALSE, True, False, true, false
Change since v3:
Fix boolean_t which was missed in v2.
Change since v4:
Replace FALSE, False with false. Replace TRUE, True with true.
Change since v5:
Revert changes for *.py, *.php, lib/* files.
Revert change to type conversions.
Revert comment-only changes. (Not sure about if we should replace the comments). Fix many coding style issues but left drivers/net/npe alone (way too many issues).
Change since v6:
Remove RFC from subject.
Acked-by Allen Martin <[email protected]>
This patch doesn't address the white space issue where TRUE/FALSE is repalced.
arch/arm/cpu/arm926ejs/spear/spear600.c | 37 +++-- arch/arm/cpu/arm926ejs/spear/spl_boot.c | 2 +- arch/blackfin/include/asm/posix_types.h | 3 - arch/m68k/lib/interrupts.c | 2 +- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 2 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c | 71 +++++---- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 201 ++++++++++++------------- arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c | 15 +- board/Marvell/db64360/mv_eth.h | 7 - board/Marvell/db64460/mv_eth.h | 7 - board/Marvell/include/core.h | 5 - board/amcc/bamboo/bamboo.c | 22 +-- board/amcc/bamboo/bamboo.h | 3 - board/amcc/yucca/yucca.c | 3 - board/bf533-ezkit/flash-defines.h | 2 - board/bf533-ezkit/flash.c | 4 +- board/bf533-stamp/video.h | 3 - board/esd/common/lcd.c | 10 +- board/esd/common/lcd.h | 5 - board/esd/cpci750/mv_eth.h | 7 - board/esd/dasa_sim/cmd_dasa_sim.c | 6 +- board/esd/pmc440/fpga.c | 16 +- board/evb64260/eth_addrtbl.c | 11 +- board/gen860t/fpga.c | 8 +- board/mpl/common/isa.c | 13 +- board/mpl/mip405/mip405.c | 5 +- board/mpl/pip405/pip405.c | 10 +- board/prodrive/p3mx/mv_eth.h | 7 - board/sacsng/clkinit.c | 4 +- board/sacsng/clkinit.h | 5 - board/spear/x600/fpga.c | 8 +- board/teejet/mt_ventoux/mt_ventoux.c | 4 +- board/xilinx/common/xbasic_types.c | 2 +- board/xilinx/common/xbasic_types.h | 8 - board/xilinx/common/xversion.c | 8 +- common/bedbug.c | 63 ++++---- common/cmd_bedbug.c | 4 +- common/cmd_fdc.c | 117 +++++++------- common/cmd_scsi.c | 18 +-- drivers/bios_emulator/atibios.c | 8 +- drivers/bios_emulator/x86emu/debug.c | 2 +- drivers/block/ahci.c | 6 +- drivers/block/sata_dwc.c | 34 ++--- drivers/block/sata_dwc.h | 7 - drivers/block/sym53c8xx.c | 14 +- drivers/fpga/ACEX1K.c | 14 +- drivers/fpga/altera.c | 4 +- drivers/fpga/cyclon2.c | 6 +- drivers/fpga/lattice.c | 4 +- drivers/fpga/spartan2.c | 58 +++---- drivers/fpga/spartan3.c | 60 ++++---- drivers/fpga/virtex2.c | 34 ++--- drivers/fpga/xilinx.c | 4 +- drivers/mtd/nand/mxc_nand.c | 2 - drivers/net/armada100_fec.c | 6 +- drivers/net/armada100_fec.h | 7 - drivers/net/e1000.c | 120 +++++++-------- drivers/net/e1000.h | 55 +++---- drivers/net/e1000_spi.c | 34 ++--- drivers/net/ne2000_base.h | 4 - drivers/net/npe/IxEthAcc.c | 10 +- drivers/net/npe/IxEthAccCommon.c | 26 ++-- drivers/net/npe/IxEthAccDataPlane.c | 16 +- drivers/net/npe/IxEthAccMac.c | 72 ++++----- drivers/net/npe/IxEthDBAPI.c | 26 ++-- drivers/net/npe/IxEthDBAPISupport.c | 42 +++--- drivers/net/npe/IxEthDBCore.c | 8 +- drivers/net/npe/IxEthDBEvents.c | 22 +-- drivers/net/npe/IxEthDBFeatures.c | 18 +-- drivers/net/npe/IxEthDBFirewall.c | 2 +- drivers/net/npe/IxEthDBNPEAdaptor.c | 2 +- drivers/net/npe/IxEthDBPortUpdate.c | 22 +-- drivers/net/npe/IxEthDBReports.c | 10 +- drivers/net/npe/IxEthDBSearch.c | 16 +- drivers/net/npe/IxEthDBUtil.c | 6 +- drivers/net/npe/IxEthMii.c | 22 +-- drivers/net/npe/IxFeatureCtrl.c | 18 +-- drivers/net/npe/IxNpeDl.c | 26 ++-- drivers/net/npe/IxNpeDlImageMgr.c | 16 +- drivers/net/npe/IxNpeDlNpeMgr.c | 10 +- drivers/net/npe/IxNpeMh.c | 6 +- drivers/net/npe/IxNpeMhConfig.c | 6 +- drivers/net/npe/IxNpeMhSend.c | 2 +- drivers/net/npe/IxOsalOsSemaphore.c | 4 +- drivers/net/npe/IxQMgrDispatcher.c | 24 +-- drivers/net/npe/IxQMgrInit.c | 6 +- drivers/net/npe/IxQMgrQCfg.c | 30 ++-- drivers/net/npe/include/IxEthAcc_p.h | 4 +- drivers/net/npe/include/IxEthDB_p.h | 22 +-- drivers/net/npe/include/IxOsalTypes.h | 16 -- drivers/net/npe/include/IxQMgrAqmIf_p.h | 22 +-- drivers/net/npe/npe.c | 14 +- drivers/rtc/ds1374.c | 29 ++-- drivers/usb/musb-new/linux-compat.h | 2 - fs/ext4/ext4_common.h | 2 - fs/ext4/ext4_journal.c | 8 +- include/at91rm9200_net.h | 4 - include/bedbug/ppc.h | 5 - include/fpga.h | 8 - include/galileo/core.h | 5 - include/linux/types.h | 1 + include/scsi.h | 8 - include/sym53c8xx.h | 7 - include/xyzModem.h | 8 - 104 files changed, 820 insertions(+), 1024 deletions(-)
arch/arm/cpu/arm926ejs/spear/spear600.c +17 -20
@@ -28,9 +28,6 @@#include <asm/arch/spr_misc.h> #include <asm/arch/spr_defs.h> -#define FALSE 0 -#define TRUE (!FALSE) -static void sel_1v8 (void ) {struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE ;
@@ -133,8 +130,8 @@ void soc_init(void)/* * xxx_boot_selected: * -* return TRUE if the particular booting option is selected -* return FALSE otherwise +* return true if the particular booting option is selected +* return false otherwise */ static u32 read_bootstrap (void ) {
@@ -150,18 +147,18 @@ int snor_boot_selected(void)/* Check whether SNOR boot is selected */ if ((bootstrap &CONFIG_SPEAR_ONLYSNORBOOT ) ==CONFIG_SPEAR_ONLYSNORBOOT ) -return TRUE; +return true;if ((bootstrap &CONFIG_SPEAR_NORNANDBOOT ) ==CONFIG_SPEAR_NORNAND8BOOT ) -return TRUE; +return true;if ((bootstrap &CONFIG_SPEAR_NORNANDBOOT ) ==CONFIG_SPEAR_NORNAND16BOOT ) -return TRUE; +return true; } -return FALSE; +return false; }int nand_boot_selected (void )
@@ -172,20 +169,20 @@ int nand_boot_selected(void)/* Check whether NAND boot is selected */ if ((bootstrap &CONFIG_SPEAR_NORNANDBOOT ) ==CONFIG_SPEAR_NORNAND8BOOT ) -return TRUE; +return true;if ((bootstrap &CONFIG_SPEAR_NORNANDBOOT ) ==CONFIG_SPEAR_NORNAND16BOOT ) -return TRUE; +return true; } -return FALSE; +return false; }int pnor_boot_selected (void ) {/* Parallel NOR boot is not selected in any SPEAr600 revision */ -return FALSE; +return false; }int usb_boot_selected (void )
@@ -195,39 +192,39 @@ int usb_boot_selected(void)if (USB_BOOT_SUPPORTED ) {/* Check whether USB boot is selected */ if (!(bootstrap &CONFIG_SPEAR_USBBOOT )) -return TRUE; +return true; } -return FALSE; +return false; }int tftp_boot_selected (void ) {/* TFTP boot is not selected in any SPEAr600 revision */ -return FALSE; +return false; }int uart_boot_selected (void ) {/* UART boot is not selected in any SPEAr600 revision */ -return FALSE; +return false; }int spi_boot_selected (void ) {/* SPI boot is not selected in any SPEAr600 revision */ -return FALSE; +return false; }int i2c_boot_selected (void ) {/* I2C boot is not selected in any SPEAr600 revision */ -return FALSE; +return false; }int mmc_boot_selected (void ) { -return FALSE; +return false; }void plat_late_init (void )
arch/arm/cpu/arm926ejs/spear/spl_boot.c +1 -1
@@ -120,7 +120,7 @@ u32 spl_boot(void)/* * All the supported booting devices are listed here. Each of * the booting type supported by the platform would define the -* macro xxx_BOOT_SUPPORTED to TRUE. +* macro xxx_BOOT_SUPPORTED to true. */ if (SNOR_BOOT_SUPPORTED &&snor_boot_selected ()) {
arch/blackfin/include/asm/posix_types.h +0 -3
@@ -61,9 +61,6 @@ typedef unsigned int __kernel_gid32_t;typedef unsigned short __kernel_old_uid_t ;typedef unsigned short __kernel_old_gid_t ; -#define BOOL_WAS_DEFINED -typedef enum { false =0 , true =1 }bool ; -#ifdef __GNUC__typedef long long __kernel_loff_t ;#endif
arch/m68k/lib/interrupts.c +1 -1
@@ -96,7 +96,7 @@ int disable_interrupts (void) sr =get_sr ();set_sr (sr |0x0700 ); -return ((sr &0x0700 ) ==0 );/* return TRUE, if interrupts were enabled before */ +return ((sr &0x0700 ) ==0 );/* return true, if interrupts were enabled before */ }void int_handler (struct pt_regs *fp)
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +1 -1
@@ -517,7 +517,7 @@ void fsl_serdes_init(void)size_t arglen;#endif #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001 -int need_serdes_a001;/* TRUE == need work-around for SERDES A001 */ +int need_serdes_a001;/* true == need work-around for SERDES A001 */ #endif #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8 char buffer[HWCONFIG_BUFFER_SIZE ];
arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c +34 -37
204 lines not on this page · raw message
arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +99 -102
482 lines not on this page · raw message
arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c +4 -11
@@ -53,13 +53,6 @@/*-----------------------------------------------------------------------------+ * Defines *-----------------------------------------------------------------------------*/ -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -#define MAXDIMMS 2#define MAXRANKS 2
@@ -279,7 +272,7 @@ static void get_spd_info(unsigned long dimm_ranks[], unsigned long num_dimm_banks) {unsigned long dimm_num; -unsigned long dimm_found = FALSE; +unsigned long dimm_found = false;unsigned long const max_ranks_per_dimm = (1 == num_dimm_banks) ?2 :1 ;unsigned char num_of_bytes;unsigned char total_size;
@@ -334,7 +327,7 @@ static void get_spd_info(unsigned long dimm_ranks[], "\n\n");spd_ddr_init_hang (); } - dimm_found = TRUE; + dimm_found = true;debug ("DIMM slot %lu: populated with %lu-rank DDR2 DIMM" "\n" , dimm_num, ranks_on_dimm);if (ranks_on_dimm > max_ranks_per_dimm) {
@@ -355,7 +348,7 @@ static void get_spd_info(unsigned long dimm_ranks[],debug ("DIMM slot %lu: Not populated\n" , dimm_num); } } -if (dimm_found == FALSE) { +if (dimm_found == false) {printf ("ERROR: No memory installed.\n" );printf ("Install at least one DDR2 DIMM.\n\n" );spd_ddr_init_hang ();
@@ -882,7 +875,7 @@ static void program_ddr0_22(unsigned long dimm_ranks[],/* Check for ECC */ if (0 == (spd_read (iic0_dimm_addr[dimm_num],11 ) &0x02 )) { - ecc_available = FALSE; + ecc_available = false; } } }
board/Marvell/db64360/mv_eth.h +0 -7
@@ -46,13 +46,6 @@************************************************************************** ************************************************************************** *************************************************************************/ -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */ #ifndef MAX_SKB_FRAGS #define MAX_SKB_FRAGS 0
board/Marvell/db64460/mv_eth.h +0 -7
@@ -47,13 +47,6 @@************************************************************************** ************************************************************************** *************************************************************************/ -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */ #ifndef MAX_SKB_FRAGS #define MAX_SKB_FRAGS 0
board/Marvell/include/core.h +0 -5
@@ -91,11 +91,6 @@ extern unsigned int INTERNAL_REG_BASE_ADDR;#define _1G 0x40000000#define _2G 0x80000000 -#ifndef BOOL_WAS_DEFINED -#define BOOL_WAS_DEFINED -typedef enum _bool {false,true}bool ; -#endif -/* Little to Big endian conversion macros */ #ifdef LE /* Little Endian */
board/amcc/bamboo/bamboo.c +11 -11
@@ -477,16 +477,16 @@ int is_powerpc440ep_pass1(void) pvr =get_pvr ();if (pvr ==PVR_POWERPC_440EP_PASS1 ) -return TRUE; +return true;else if (pvr ==PVR_POWERPC_440EP_PASS2 ) -return FALSE; +return false;else {printf ("brdutil error 3\n" );for (;;) ; } -return (FALSE); +return false; }/*----------------------------------------------------------------------------+
@@ -495,9 +495,9 @@ int is_powerpc440ep_pass1(void)int is_nand_selected (void ) {#ifdef CONFIG_BAMBOO_NAND -return TRUE; +return true;#else -return FALSE; +return false;#endif }
@@ -507,7 +507,7 @@ int is_nand_selected(void)unsigned char config_on_ebc_cs4_is_small_flash (void ) {/* Not implemented yet => returns constant value */ -return TRUE; +return true; }/*----------------------------------------------------------------------------+
@@ -561,7 +561,7 @@ void ext_bus_cntlr_init(void)/*-------------------------------------------------------------------------+ | PPC440EP Pass1 +-------------------------------------------------------------------------*/ -if (is_powerpc440ep_pass1 () == TRUE) { +if (is_powerpc440ep_pass1 () == true) {switch (bootstrap_settings) {case SDR0_PSTRP0_BOOTSTRAP_SETTINGS0 :/* Default Strap Settings 0 : CPU 400 - PLB 133 - Boot EBC 8 bit 33MHz */
@@ -738,7 +738,7 @@ void ext_bus_cntlr_init(void)/*------------------------------------------------------------------------- */ ebc0_cs0_bnap_value =EBC0_BNAP_SMALL_FLASH ; ebc0_cs0_bncr_value =EBC0_BNCR_SMALL_FLASH_CS0 ; -if ((is_nand_selected ()) == TRUE) { +if ((is_nand_selected ()) == true) {/* NAND Flash */ ebc0_cs1_bnap_value =EBC0_BNAP_NAND_FLASH ; ebc0_cs1_bncr_value =EBC0_BNCR_NAND_FLASH_CS1 ;
@@ -765,7 +765,7 @@ void ext_bus_cntlr_init(void)/*------------------------------------------------------------------------- */ ebc0_cs0_bnap_value =EBC0_BNAP_LARGE_FLASH_OR_SRAM ; ebc0_cs0_bncr_value =EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0 ; -if ((is_nand_selected ()) == TRUE) { +if ((is_nand_selected ()) == true) {/* NAND Flash */ ebc0_cs1_bnap_value =EBC0_BNAP_NAND_FLASH ; ebc0_cs1_bncr_value =EBC0_BNCR_NAND_FLASH_CS1 ;
@@ -812,7 +812,7 @@ void ext_bus_cntlr_init(void) ebc0_cs0_bnap_value =0 ; ebc0_cs0_bncr_value =0 ; -if ((is_nand_selected ()) == TRUE) { +if ((is_nand_selected ()) == true) {/* NAND Flash */ ebc0_cs1_bnap_value =EBC0_BNAP_NAND_FLASH ; ebc0_cs1_bncr_value =EBC0_BNCR_NAND_FLASH_CS1 ;
@@ -830,7 +830,7 @@ void ext_bus_cntlr_init(void) ebc0_cs3_bncr_value =0 ; } -if ((config_on_ebc_cs4_is_small_flash ()) == TRUE) { +if ((config_on_ebc_cs4_is_small_flash ()) == true) {/* Small Flash */ ebc0_cs4_bnap_value =EBC0_BNAP_SMALL_FLASH ; ebc0_cs4_bncr_value =EBC0_BNCR_SMALL_FLASH_CS4 ;
board/amcc/bamboo/bamboo.h +0 -3
@@ -250,9 +250,6 @@#define PVR_POWERPC_440EP_PASS1 0x42221850#define PVR_POWERPC_440EP_PASS2 0x422218D3 -#define TRUE 1 -#define FALSE 0 -#define GPIO0 0#define GPIO1 1
board/amcc/yucca/yucca.c +0 -3
@@ -47,9 +47,6 @@ void fpga_init (void); #define DEBUGF(fmt,args...)#endif -#define FALSE 0 -#define TRUE 1 -int board_early_init_f (void ) {/*----------------------------------------------------------------------------+
board/bf533-ezkit/flash-defines.h +0 -2
@@ -32,8 +32,6 @@#define V_ULONG (a) (*(volatile unsigned long *)( a ))#define V_BYTE (a) (*(volatile unsigned char *)( a )) -#define TRUE 0x1 -#define FALSE 0x0#define BUFFER_SIZE 0x80000#define NO_COMMAND 0#define GET_CODES 1
board/bf533-ezkit/flash.c +2 -2
@@ -309,7 +309,7 @@ int read_flash(long nOffset, int *pnValue) nValue = *(volatile unsigned short *)addr;SSYNC (); *pnValue = nValue; -return TRUE; +return true; }int poll_toggle_bit (long lOffset)
@@ -398,7 +398,7 @@ int erase_block_flash(int nBlock, unsigned long address)long ulSectorOff =0x0 ;if ((nBlock <0 ) || (nBlock > AFP_NumSectors)) -return FALSE; +return false; ulSectorOff = (address -CONFIG_SYS_FLASH_BASE );
board/bf533-stamp/video.h +0 -3
@@ -9,9 +9,6 @@#define YELLOW (0xD292D210)/* yellow pixel pattern */ #define WHITE (0xFE80FE80)/* white pixel pattern */ -#define true 1 -#define false 0 - typedef struct { unsigned int sav; unsigned int eav;
board/esd/common/lcd.c +5 -5
@@ -260,7 +260,7 @@ int lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,/* * Big epson detected */ - reg_byte_swap = FALSE; + reg_byte_swap = false; palette_index =0x1e2 ; palette_value =0x1e4 ; lcd_depth =16 ;
@@ -269,7 +269,7 @@ int lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,/* * Big epson detected (with register swap bug) */ - reg_byte_swap = TRUE; + reg_byte_swap = true; palette_index =0x1e3 ; palette_value =0x1e5 ; lcd_depth =16 ;
@@ -278,7 +278,7 @@ int lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,/* * Small epson detected (704) */ - reg_byte_swap = FALSE; + reg_byte_swap = false; palette_index =0x15 ; palette_value =0x17 ; lcd_depth =8 ;
@@ -287,7 +287,7 @@ int lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,/* * Small epson detected (705) */ - reg_byte_swap = FALSE; + reg_byte_swap = false; palette_index =0x15 ; palette_value =0x17 ; lcd_depth =8 ;
@@ -300,7 +300,7 @@ int lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,/* * S1D13505 detected */ - reg_byte_swap = TRUE; + reg_byte_swap = true; palette_index =0x25 ; palette_value =0x27 ; lcd_depth =16 ;
board/esd/common/lcd.h +0 -5
@@ -35,11 +35,6 @@#define LOAD_LONG (data) SWAP_LONG(data)#define LOAD_SHORT (data) SWAP_SHORT(data) -#ifndef FALSE -#define FALSE 0 -#define TRUE (!FALSE) -#endif -#define S1D_WRITE_PALETTE (p,i,r,g,b) \ { \ out_8(&((uchar*)(p))[palette_index], (uchar)(i)); \
board/esd/cpci750/mv_eth.h +0 -7
@@ -47,13 +47,6 @@************************************************************************** ************************************************************************** *************************************************************************/ -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */ #ifndef MAX_SKB_FRAGS #define MAX_SKB_FRAGS 0
board/esd/dasa_sim/cmd_dasa_sim.c +1 -5
@@ -30,10 +30,6 @@#define OK 0#define ERROR (-1) -#define TRUE 1 -#define FALSE 0 - -extern u_long pci9054_iobase;
@@ -97,7 +93,7 @@ static int PciEepromWriteLongVPD (int offs, unsigned int value) } } -return TRUE; +return true; }
board/esd/pmc440/fpga.c +8 -8
@@ -113,7 +113,7 @@ void fpga_serialslave_init(void) {debug ("%s:%d: Initialize serial slave interface\n" , __FUNCTION__, __LINE__); -fpga_pgm_fn (FALSE, FALSE,0 );/* make sure program pin is inactive */ +fpga_pgm_fn (false, false,0 );/* make sure program pin is inactive */ }
@@ -188,7 +188,7 @@ int fpga_done_fn(int cookie)int fpga_pre_config_fn (int cookie) {debug ("%s:%d: FPGA pre-configuration\n" , __FUNCTION__, __LINE__); -fpga_reset (TRUE); +fpga_reset (true);/* release init# */ out_be32 ((void *)GPIO0_OR ,in_be32 ((void *)GPIO0_OR ) |GPIO0_FPGA_FORCEINIT );
@@ -213,9 +213,9 @@ int fpga_post_config_fn(int cookie)/* enable PLD0..7 pins */ out_be32 ((void *)GPIO1_OR ,in_be32 ((void *)GPIO1_OR ) & ~GPIO1_IOEN_N ); -fpga_reset (TRUE); +fpga_reset (true);udelay (100 ); -fpga_reset (FALSE); +fpga_reset (false);udelay (100 );FPGA_OUT32 (&fpga->status, (gd->board_type <<STATUS_HWREV_SHIFT ) &STATUS_HWREV_MASK );
@@ -296,7 +296,7 @@ void ngcc_fpga_serialslave_init(void) __FUNCTION__, __LINE__);/* make sure program pin is inactive */ -ngcc_fpga_pgm_fn (FALSE, FALSE,0 ); +ngcc_fpga_pgm_fn (false, false,0 ); }/*
@@ -382,10 +382,10 @@ int ngcc_fpga_pre_config_fn(int cookie)pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA ;debug ("%s:%d: FPGA pre-configuration\n" , __FUNCTION__, __LINE__); -ngcc_fpga_reset (TRUE); +ngcc_fpga_reset (true);FPGA_CLRBITS (&fpga->ctrla,0xfffffe00 ); -ngcc_fpga_reset (TRUE); +ngcc_fpga_reset (true);return 0 ; }
@@ -401,7 +401,7 @@ int ngcc_fpga_post_config_fn(int cookie)debug ("%s:%d: NGCC FPGA post configuration\n" , __FUNCTION__, __LINE__);udelay (100 ); -ngcc_fpga_reset (FALSE); +ngcc_fpga_reset (false);FPGA_SETBITS (&fpga->ctrla,0x29f8c000 );
board/evb64260/eth_addrtbl.c +4 -7
@@ -6,9 +6,6 @@#include "eth.h" #include "eth_addrtbl.h" -#define TRUE 1 -#define FALSE 0 -#define PRINTF printf#ifdef CONFIG_GT_USE_MAC_HASH_TABLE
@@ -160,8 +157,8 @@ u32 hashTableFunction (u32 macH, u32 macL, u32 HashSize, u32 hash_mode)* rd - the RD field in the address table. * Outputs * address table entry is added. -* TRUE if success. -* FALSE if table full +* true if success. +* false if table full */ int addAddressTableEntry (u32 port,u32 macH,u32 macL,u32 rd,u32 skip) {
@@ -206,7 +203,7 @@ int addAddressTableEntry (u32 port, u32 macH, u32 macL, u32 rd, u32 skip)if (i ==HOP_NUMBER ) {PRINTF ("addGT64260addressTableEntry: table section is full\n" ); -return (FALSE); +return false; }/*
@@ -215,7 +212,7 @@ int addAddressTableEntry (u32 port, u32 macH, u32 macL, u32 rd, u32 skip) entry->hi = newHi; entry->lo = newLo;DCACHE_FLUSH_N_SYNC ((u32 ) entry,MAC_ENTRY_SIZE ); - return (TRUE); + return true; }#endif /* CONFIG_GT_USE_MAC_HASH_TABLE */
board/gen860t/fpga.c +4 -4
@@ -182,7 +182,7 @@ void fpga_selectmap_init (void) {PRINTF ("%s:%d: Initialize SelectMap interface\n" , __FUNCTION__, __LINE__); -fpga_pgm_fn (FALSE, FALSE,0 );/* make sure program pin is inactive */ +fpga_pgm_fn (false, false,0 );/* make sure program pin is inactive */ }
@@ -314,7 +314,7 @@ int fpga_abort_fn (int cookie)int fpga_pre_config_fn (int cookie) {PRINTF ("%s:%d: FPGA pre-configuration\n" , __FUNCTION__, __LINE__); -fpga_reset (TRUE); +fpga_reset (true);return 0 ; }
@@ -328,9 +328,9 @@ int fpga_post_config_fn (int cookie)int rc;PRINTF ("%s:%d: FPGA post configuration\n" , __FUNCTION__, __LINE__); -fpga_reset (TRUE); +fpga_reset (true);udelay (1000 ); -fpga_reset (FALSE); +fpga_reset (false);udelay (1000 );/*
board/mpl/common/isa.c +3 -10
@@ -41,13 +41,6 @@ #define PRINTF(fmt,args...)#endif -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -#if defined(CONFIG_PIP405 )extern int drv_isa_kbd_init (void );
@@ -116,9 +109,9 @@ unsigned char open_cfg_super_IO(int address)out8 (CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x55 );/* open config */ out8 (CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x20 );/* set address to DEV ID */ if (in8 (CONFIG_SYS_ISA_IO_BASE_ADDRESS | address |0x1 )==0x40 )/* ok Device ID is correct */ -return TRUE; +return true;else -return FALSE; +return false; }void close_cfg_super_IO (int address)
@@ -179,7 +172,7 @@ void isa_sio_loadtable(void)void isa_sio_setup (void ) { -if (open_cfg_super_IO (SIO_CFG_PORT )==TRUE) +if (open_cfg_super_IO (SIO_CFG_PORT ) == true) {isa_sio_loadtable ();close_cfg_super_IO (0x3F0 );
board/mpl/mip405/mip405.c +2 -3
@@ -77,8 +77,6 @@ DECLARE_GLOBAL_DATA_PTR;#undef SDRAM_DEBUG#define ENABLE_ECC /* for ecc boards */ -#define FALSE 0 -#define TRUE 1/* stdlib.h causes some compatibility problems; should fixe these! -- wd */ #ifndef __ldiv_t_defined
@@ -771,7 +769,8 @@ int last_stage_init (void)int overwrite_console (void ) { -return ((in8 (PLD_EXT_CONF_REG ) &0x1 )==0 );/* return TRUE if console should be overwritten */ +/* return true if console should be overwritten */ +return ((in8 (PLD_EXT_CONF_REG ) &0x1 ) ==0 ); }
board/mpl/pip405/pip405.c +4 -6
@@ -36,9 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;#undef SDRAM_DEBUG -#define FALSE 0 -#define TRUE 1 -/* stdlib.h causes some compatibility problems; should fixe these! -- wd */ #ifndef __ldiv_t_defined typedef struct {
@@ -700,7 +697,8 @@ int misc_init_r (void)int overwrite_console (void ) { -return (in8 (CONFIG_PORT_ADDR ) &0x1 );/* return TRUE if console should be overwritten */ +/* return true if console should be overwritten */ +return in8 (CONFIG_PORT_ADDR ) &0x1 ; }
@@ -945,7 +943,7 @@ void print_pip405_info (void)void user_led0 (unsigned char on) { -if (on == TRUE) +if (on == true)out8 (PLD_LED_USER_REG , (in8 (PLD_LED_USER_REG ) |0x1 ));else out8 (PLD_LED_USER_REG , (in8 (PLD_LED_USER_REG ) &0xfe ));
@@ -953,7 +951,7 @@ void user_led0 (unsigned char on)void user_led1 (unsigned char on) { -if (on == TRUE) +if (on == true)out8 (PLD_LED_USER_REG , (in8 (PLD_LED_USER_REG ) |0x2 ));else out8 (PLD_LED_USER_REG , (in8 (PLD_LED_USER_REG ) &0xfd ));
board/prodrive/p3mx/mv_eth.h +0 -7
@@ -47,13 +47,6 @@************************************************************************** ************************************************************************** *************************************************************************/ -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */ #ifndef MAX_SKB_FRAGS #define MAX_SKB_FRAGS 0
board/sacsng/clkinit.c +2 -2
@@ -94,11 +94,11 @@ uint Daq_BRG_Get_Div16(uint brg)if (*brg_ptr &CPM_BRG_DIV16 ) {/* DIV16 active */ -return (TRUE); +return true; }else {/* DIV16 inactive */ -return (FALSE); +return false; } }
board/sacsng/clkinit.h +0 -5
@@ -22,11 +22,6 @@* MA 02111-1307 USA */ -#ifndef FALSE -#define FALSE 0 -#define TRUE (!FALSE) -#endif -#define SLRCLK_EN_MASK 0x00040000/* PA13 - SLRCLK_EN* */ #define MIN_SAMPLE_RATE 4000/* Minimum sample rate */
board/spear/x600/fpga.c +4 -4
@@ -113,7 +113,7 @@ static int fpga_done_fn(int cookie)static int fpga_pre_config_fn (int cookie) {debug ("%s:%d: FPGA pre-configuration\n" , __func__, __LINE__); -fpga_reset (TRUE); +fpga_reset (true);return 0 ; }
@@ -128,9 +128,9 @@ static int fpga_post_config_fn(int cookie)debug ("%s:%d: FPGA post configuration\n" , __func__, __LINE__); -fpga_reset (TRUE); +fpga_reset (true);udelay (100 ); -fpga_reset (FALSE); +fpga_reset (false);udelay (100 );return rc;
@@ -200,7 +200,7 @@ static Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {static void fpga_serialslave_init (void ) {debug ("%s:%d: Initialize serial slave interface\n" , __func__, __LINE__); -fpga_pgm_fn (FALSE, FALSE,0 );/* make sure program pin is inactive */ +fpga_pgm_fn (false, false,0 );/* make sure program pin is inactive */ }static int expi_setup (int freq)
board/teejet/mt_ventoux/mt_ventoux.c +2 -2
@@ -177,9 +177,9 @@ int fpga_post_config_fn(int cookie) {debug ("%s:%d: FPGA post-configuration\n" , __func__, __LINE__); -fpga_reset (TRUE); +fpga_reset (true);udelay (100 ); -fpga_reset (FALSE); +fpga_reset (false);return 0 ; }
board/xilinx/common/xbasic_types.c +1 -1
@@ -77,7 +77,7 @@ unsigned int XAssertStatus;* such that it does not wait infinitely. Use the debugger to disable the * waiting during testing of asserts. */ -u32 XWaitInAssert = TRUE; +u32 XWaitInAssert = true;/* The callback function to be invoked when an assert is taken */ static XAssertCallback XAssertCallbackRoutine = (XAssertCallback )NULL ;
board/xilinx/common/xbasic_types.h +0 -8
@@ -68,14 +68,6 @@/***************************** Include Files *********************************/ /************************** Constant Definitions *****************************/ - -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -#ifndef NULL #define NULL 0#endif
board/xilinx/common/xversion.c +4 -4
@@ -187,14 +187,14 @@ XVersion_IsEqual(XVersion * InstancePtr, XVersion * VersionPtr)*/ for (Index =0 ; Index <sizeof (XVersion); Index++) {if (Version1[Index] != Version2[Index]) { -return FALSE; +return false; } }/* No byte was found to be different between the versions, so indicate * the versions are equal */ -return TRUE; +return true; }/*****************************************************************************
@@ -343,8 +343,8 @@ IsVersionStringValid(s8 * StringPtr) (StringPtr[XVE_MINOR_ONES_CHAR] > '9') || (StringPtr[XVE_COMP_CHAR] < 'a') || (StringPtr[XVE_COMP_CHAR] > 'z')) { -return FALSE; +return false; } -return TRUE; +return true; }
common/bedbug.c +32 -31
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common/cmd_bedbug.c +2 -2
@@ -292,7 +292,7 @@ int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])return 1 ; } -if (!find_next_address ((unsigned char *) &addr, FALSE, bug_ctx.regs)) +if (!find_next_address ((unsigned char *) &addr, false, bug_ctx.regs))return 1 ;if (bug_ctx.set)
@@ -323,7 +323,7 @@ int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])return 1 ; } -if (!find_next_address ((unsigned char *) &addr, TRUE, bug_ctx.regs)) +if (!find_next_address ((unsigned char *) &addr, true, bug_ctx.regs))return 1 ;if (bug_ctx.set)
common/cmd_fdc.c +56 -61
336 lines not on this page · raw message
common/cmd_scsi.c +9 -9
@@ -110,7 +110,7 @@ void scsi_scan(int mode) scsi_dev_desc[i].vendor[0 ]=0 ; scsi_dev_desc[i].product[0 ]=0 ; scsi_dev_desc[i].revision[0 ]=0 ; - scsi_dev_desc[i].removable=FALSE; + scsi_dev_desc[i].removable = false; scsi_dev_desc[i].if_type=IF_TYPE_SCSI ; scsi_dev_desc[i].dev=i; scsi_dev_desc[i].part_type=PART_TYPE_UNKNOWN ;
@@ -125,7 +125,7 @@ void scsi_scan(int mode) pccb->pdata=(unsigned char *)&tempbuff; pccb->datalen=512 ;scsi_setup_inquiry (pccb); -if (scsi_exec (pccb)!=TRUE) { +if (scsi_exec (pccb) != true) {if (pccb->contr_stat==SCSI_SEL_TIME_OUT ) {debug ("Selection timeout ID %d\n" ,pccb->target);continue ;/* selection timeout => assuming no device present */
@@ -139,7 +139,7 @@ void scsi_scan(int mode)continue ;/* skip unknown devices */ }if ((modi&0x80 )==0x80 )/* drive is removable */ - scsi_dev_desc[scsi_max_devs].removable=TRUE; + scsi_dev_desc[scsi_max_devs].removable=true;/* get info for this device */ scsi_ident_cpy ((unsigned char *)&scsi_dev_desc[scsi_max_devs].vendor[0 ], &tempbuff[8 ],8 );
@@ -152,8 +152,8 @@ void scsi_scan(int mode) pccb->datalen=0 ;scsi_setup_test_unit_ready (pccb); -if (scsi_exec (pccb)!=TRUE) { -if (scsi_dev_desc[scsi_max_devs].removable==TRUE) { +if (scsi_exec (pccb) != true) { +if (scsi_dev_desc[scsi_max_devs].removable == true) { scsi_dev_desc[scsi_max_devs].type=perq; goto removable; }
@@ -404,7 +404,7 @@ static ulong scsi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)debug ("scsi_read_ext: startblk " LBAF ", blccnt %x buffer %lx\n" , start, smallblks, buf_addr); -if (scsi_exec (pccb)!=TRUE) { +if (scsi_exec (pccb) != true) {scsi_print_error (pccb); blkcnt-=blks;break ;
@@ -458,7 +458,7 @@ static ulong scsi_write(int device, ulong blknr, }debug ("%s: startblk " LBAF ", blccnt %x buffer %lx\n" , __func__, start, smallblks, buf_addr); -if (scsi_exec (pccb) != TRUE) { +if (scsi_exec (pccb) != true) {scsi_print_error (pccb); blkcnt -= blks;break ;
@@ -521,7 +521,7 @@ int scsi_read_capacity(ccb *pccb, lbaint_t *capacity, unsigned long *blksz) pccb->msgout[0 ] =SCSI_IDENTIFY ;/* NOT USED */ pccb->datalen =8 ; -if (scsi_exec (pccb) != TRUE) +if (scsi_exec (pccb) != true)return 1 ; *capacity = ((lbaint_t)pccb->pdata[0] << 24) |
@@ -547,7 +547,7 @@ int scsi_read_capacity(ccb *pccb, lbaint_t *capacity, unsigned long *blksz) pccb->msgout[0 ] =SCSI_IDENTIFY ;/* NOT USED */ pccb->datalen =16 ; -if (scsi_exec (pccb) != TRUE) +if (scsi_exec (pccb) != true)return 1 ; *capacity = ((uint64_t)pccb->pdata[0] << 56) |
drivers/bios_emulator/atibios.c +2 -6
@@ -52,10 +52,6 @@/* Length of the BIOS image */ #define MAX_BIOSLEN (128 * 1024L) -/* Define some useful types and macros */ -#define true 1 -#define false 0 -/* Place to save PCI BAR's that we change and later restore */ static u32 saveROMBaseAddress;static u32 saveBaseAddress10;
@@ -242,7 +238,7 @@ pcidev - PCI device info for the video card on the bus to boot VGAInfo - BIOS emulator VGA info structure RETURNS: -True if successfully initialised, false if not. +true if successfully initialised, false if not. REMARKS: Loads and POST's the display controllers BIOS, directly from the BIOS
@@ -295,7 +291,7 @@ static int PCI_postController(pci_dev_t pcidev, BE_VGAInfo * VGAInfo) PARAMETERS: pcidev - PCI device info for the video card on the bus to boot pVGAInfo - Place to return VGA info structure is requested -cleanUp - True to clean up on exit, false to leave emulator active +cleanUp - true to clean up on exit, false to leave emulator active REMARKS: Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
drivers/bios_emulator/x86emu/debug.c +1 -1
@@ -309,7 +309,7 @@ void x86emu_single_step(void)case 'P' : noDecode = (noDecode) ?0 :1 ;printk ("Toggled decoding to %s\n" , - (noDecode) ?"FALSE" :"TRUE" ); + (noDecode) ?"false" :"true" );break ;case 't' :case 0 :
drivers/block/ahci.c +3 -3
@@ -865,14 +865,14 @@ int scsi_exec(ccb *pccb)break ;default :printf ("Unsupport SCSI command 0x%02x\n" , pccb->cmd[0 ]); -return FALSE; +return false; }if (ret) {debug ("SCSI command 0x%02x ret errno %d\n" , pccb->cmd[0 ], ret); -return FALSE; +return false; } -return TRUE; +return true; }
drivers/block/sata_dwc.c +17 -17
@@ -360,7 +360,7 @@ int init_sata(int dev)if (status ==0x7f ) {printf ("Hard Disk not found.\n" ); dev_state =SATA_NODEVICE ; - rc = FALSE; + rc = false;return rc; }
@@ -381,7 +381,7 @@ int init_sata(int dev)printf ("** TimeOUT **\n" ); dev_state =SATA_NODEVICE ; - rc = FALSE; + rc = false;return rc; }if ((i >=100 ) && ((i %100 ) ==0 ))
@@ -458,7 +458,7 @@ static int sata_dwc_softreset(struct ata_port *ap) }else {printf ("No device found\n" ); dev_state =SATA_NODEVICE ; -return FALSE; +return false; } tmp =ATA_DEVICE_OBS ;
@@ -737,7 +737,7 @@ static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, status =ata_busy_wait (ap,ATA_BUSY ,30000 );if (status &ATA_BUSY ) {printf ("BSY = 0 check. timeout.\n" ); - rc = FALSE; + rc = false;return rc; }
@@ -987,7 +987,7 @@ unsigned ata_exec_internal(struct ata_device *dev, status =ata_busy_wait (ap,ATA_BUSY ,300000 );if (status &ATA_BUSY ) {printf ("BSY = 0 check. timeout.\n" ); - rc = FALSE; + rc = false;return rc; }
@@ -997,7 +997,7 @@ unsigned ata_exec_internal(struct ata_device *dev, tag =ATA_TAG_INTERNAL ;if (test_and_set_bit (tag, &ap->qc_allocated)) { - rc = FALSE; + rc = false;return rc; }
@@ -1656,14 +1656,14 @@ static int check_sata_dev_state(void) ret =ata_dev_read_sectors (pdata, datalen,0 ,1 ); -if (ret == TRUE) +if (ret == true)break ; i++;if (i > (ATA_RESET_TIME *100 )) {printf ("** TimeOUT **\n" ); dev_state =SATA_NODEVICE ; -return FALSE; +return false; }if ((i >=100 ) && ((i %100 ) ==0 ))
@@ -1672,7 +1672,7 @@ static int check_sata_dev_state(void) dev_state =SATA_READY ; -return TRUE; +return true; } static unsigned int ata_dev_set_feature(struct ata_device *dev,
@@ -1772,7 +1772,7 @@ ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer) blks =0 ; } -if (ata_dev_read_sectors (pdata, datalen, block, n_block) != TRUE) { +if (ata_dev_read_sectors (pdata, datalen, block, n_block) != true) {printf ("sata_dwc : Hard disk read error.\n" ); blkcnt -= blks;break ;
@@ -1795,7 +1795,7 @@ static int ata_dev_read_sectors(unsigned char *pdata, unsigned long datalen,int may_fallback =1 ;if (dev_state ==SATA_ERROR ) -return FALSE; +return false;ata_dev_select (ap, dev->devno,1 ,1 );
@@ -1893,11 +1893,11 @@ retry: goto err_out; } -return TRUE; +return true; err_out:printf ("failed to READ SECTORS (%s, err_mask=0x%x)\n" , reason, err_mask); -return FALSE; +return false; }#if defined(CONFIG_SATA_DWC ) && !defined(CONFIG_LBA48 )
@@ -1946,7 +1946,7 @@ ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, const void *buffer) blks =0 ; } -if (ata_dev_write_sectors (pdata, datalen, block, n_block) != TRUE) { +if (ata_dev_write_sectors (pdata, datalen, block, n_block) != true) {printf ("sata_dwc : Hard disk read error.\n" ); blkcnt -= blks;break ;
@@ -1969,7 +1969,7 @@ static int ata_dev_write_sectors(unsigned char* pdata, unsigned long datalen,int may_fallback =1 ;if (dev_state ==SATA_ERROR ) -return FALSE; +return false;ata_dev_select (ap, dev->devno,1 ,1 );
@@ -2068,9 +2068,9 @@ retry: goto err_out; } -return TRUE; +return true; err_out:printf ("failed to WRITE SECTORS (%s, err_mask=0x%x)\n" , reason, err_mask); -return FALSE; +return false; }
drivers/block/sata_dwc.h +0 -7
@@ -467,11 +467,4 @@ struct ata_port { unsigned char *pdata; }; -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -#endif
drivers/block/sym53c8xx.c +7 -7
@@ -764,9 +764,9 @@ int scsi_exec(ccb *pccb) retry:scsi_issue (pccb);if (pccb->contr_stat!=SIR_COMPLETE ) -return FALSE; +return false;if (pccb->status==S_GOOD ) -return TRUE; +return true;if (pccb->status==S_CHECK_COND ) {/* check condition */ for (i=0 ;i<16 ;i++) tmpcmd[i]=pccb->cmd[i];
@@ -797,12 +797,12 @@ retry:case SENSE_NO_SENSE :case SENSE_RECOVERED_ERROR :/* seems to be ok */ -return TRUE; +return true;break ;case SENSE_NOT_READY :if ((pccb->sense_buf[12 ]!=0x04 )||(pccb->sense_buf[13 ]!=0x01 )) {/* if device is not in process of becoming ready */ -return FALSE; +return false;break ; }/* else fall through */ case SENSE_UNIT_ATTENTION :
@@ -814,13 +814,13 @@ retry: goto retry; }PRINTF ("Target %d not ready, %d retried\n" ,pccb->target,retrycnt); -return FALSE; +return false;default : -return FALSE; +return false; } }PRINTF ("Status = %X\n" ,pccb->status); -return FALSE; +return false; }
drivers/fpga/ACEX1K.c +7 -7
@@ -140,7 +140,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize) }/* Establish the initial state */ - (*fn->config) (TRUE, TRUE, cookie);/* Assert nCONFIG */ + (*fn->config) (true, true, cookie);/* Assert nCONFIG */ udelay (2 );/* T_cfg > 2us */
@@ -152,7 +152,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)return FPGA_FAIL ; } - (*fn->config) (FALSE, TRUE, cookie);/* Deassert nCONFIG */ + (*fn->config) (false, true, cookie);/* Deassert nCONFIG */ udelay (2 );/* T_cf2st1 < 4us */ /* Wait for nSTATUS to be released (i.e. deasserted) */
@@ -192,13 +192,13 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize) i =8 ; do { /* Deassert the clock */ - (*fn->clk) (FALSE, TRUE, cookie); + (*fn->clk) (false, true, cookie); CONFIG_FPGA_DELAY (); /* Write data */ - (*fn->data) ( (val & 0x01), TRUE, cookie); + (*fn->data) ((val & 0x01), true, cookie); CONFIG_FPGA_DELAY (); /* Assert the clock */ - (*fn->clk) (TRUE, TRUE, cookie); + (*fn->clk) (true, true, cookie); CONFIG_FPGA_DELAY (); val >>= 1; i --;
@@ -232,9 +232,9 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)for (i =0 ; i <12 ; i++) {CONFIG_FPGA_DELAY (); - (*fn->clk) (TRUE, TRUE, cookie);/* Assert the clock pin */ + (*fn->clk) (true, true, cookie);/* Assert the clock pin */ CONFIG_FPGA_DELAY (); - (*fn->clk) (FALSE, TRUE, cookie);/* Deassert the clock pin */ + (*fn->clk) (false, true, cookie);/* Deassert the clock pin */ } ret_val =FPGA_SUCCESS ;
drivers/fpga/altera.c +2 -2
@@ -215,7 +215,7 @@ int altera_info( Altera_desc *desc )static int altera_validate (Altera_desc * desc,const char *fn) { -int ret_val = FALSE; +int ret_val = false;if (desc) { if ((desc->family > min_altera_type) &&
@@ -223,7 +223,7 @@ static int altera_validate (Altera_desc * desc, const char *fn)if ((desc->iface > min_altera_iface_type) && (desc->iface < max_altera_iface_type)) {if (desc->size) { - ret_val = TRUE; + ret_val = true; }else {printf ("%s: NULL part size\n" , fn); }
drivers/fpga/cyclon2.c +3 -3
@@ -144,9 +144,9 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize) }/* Establish the initial state */ - (*fn->config) (FALSE, TRUE, cookie);/* De-assert nCONFIG */ + (*fn->config) (false, true, cookie);/* De-assert nCONFIG */ udelay (100 ); - (*fn->config) (TRUE, TRUE, cookie);/* Assert nCONFIG */ + (*fn->config) (true, true, cookie);/* Assert nCONFIG */ udelay (2 );/* T_cfg > 2us */
@@ -164,7 +164,7 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)/* Get ready for the burn */ CONFIG_FPGA_DELAY (); - ret = (*fn->write) (buf, bsize, TRUE, cookie); + ret = (*fn->write) (buf, bsize, true, cookie);if (ret) {puts ("** Write failed.\n" ); (*fn->abort) (cookie);
drivers/fpga/lattice.c +2 -2
@@ -275,7 +275,7 @@ signed char ispVM(void)static int lattice_validate (Lattice_desc *desc,const char *fn) { -int ret_val = FALSE; +int ret_val = false;if (desc) { if ((desc->family > min_lattice_type) &&
@@ -283,7 +283,7 @@ static int lattice_validate(Lattice_desc *desc, const char *fn)if ((desc->iface > min_lattice_iface_type) && (desc->iface < max_lattice_iface_type)) {if (desc->size) { - ret_val = TRUE; + ret_val = true; }else {printf ("%s: NULL part size\n" , fn); }
drivers/fpga/spartan2.c +29 -29
151 lines not on this page · raw message
drivers/fpga/spartan3.c +30 -30
161 lines not on this page · raw message
drivers/fpga/virtex2.c +17 -17
@@ -221,7 +221,7 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)* There is no maximum value for the pulse width. Check to make * sure that INIT_B goes low after assertion of PROG_B */ - (*fn->pgm) (TRUE, TRUE, cookie); + (*fn->pgm) (true, true, cookie);udelay (10 ); ts =get_timer (0 ); do {
@@ -234,9 +234,9 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) } }while (!(*fn->init) (cookie)); - (*fn->pgm) (FALSE, TRUE, cookie); + (*fn->pgm) (false, true, cookie);CONFIG_FPGA_DELAY (); - (*fn->clk) (TRUE, TRUE, cookie); + (*fn->clk) (true, true, cookie);/* * Start a timer and wait for INIT_B to go high
@@ -253,8 +253,8 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) } }while ((*fn->init) (cookie) && (*fn->busy) (cookie)); - (*fn->wr) (TRUE, TRUE, cookie); - (*fn->cs) (TRUE, TRUE, cookie); + (*fn->wr) (true, true, cookie); + (*fn->cs) (true, true, cookie);udelay (10000 );
@@ -286,15 +286,15 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) }#endif - (*fn->wdata) (data[bytecount++], TRUE, cookie); + (*fn->wdata) (data[bytecount++], true, cookie);CONFIG_FPGA_DELAY ();/* * Cycle the clock pin */ - (*fn->clk) (FALSE, TRUE, cookie); + (*fn->clk) (false, true, cookie);CONFIG_FPGA_DELAY (); - (*fn->clk) (TRUE, TRUE, cookie); + (*fn->clk) (true, true, cookie);#ifdef CONFIG_SYS_FPGA_CHECK_BUSY ts =get_timer (0 );
@@ -319,8 +319,8 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)* Finished writing the data; deassert FPGA CS_B and WRITE_B signals. */ CONFIG_FPGA_DELAY (); - (*fn->cs) (FALSE, TRUE, cookie); - (*fn->wr) (FALSE, TRUE, cookie); + (*fn->cs) (false, true, cookie); + (*fn->wr) (false, true, cookie);#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n' );
@@ -381,8 +381,8 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)printf ("Starting Dump of FPGA Device %d...\n" , cookie); - (*fn->cs) (TRUE, TRUE, cookie); - (*fn->clk) (TRUE, TRUE, cookie); + (*fn->cs) (true, true, cookie); + (*fn->clk) (true, true, cookie);while (bytecount < bsize) {#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
@@ -394,8 +394,8 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)/* * Cycle the clock and read the data */ - (*fn->clk) (FALSE, TRUE, cookie); - (*fn->clk) (TRUE, TRUE, cookie); + (*fn->clk) (false, true, cookie); + (*fn->clk) (true, true, cookie); (*fn->rdata) (&(data[bytecount++]), cookie);#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % (bsize /40 ) ==0 )
@@ -406,9 +406,9 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)/* * Deassert CS_B and cycle the clock to deselect the device. */ - (*fn->cs) (FALSE, FALSE, cookie); - (*fn->clk) (FALSE, TRUE, cookie); - (*fn->clk) (TRUE, TRUE, cookie); + (*fn->cs) (false, false, cookie); + (*fn->clk) (false, true, cookie); + (*fn->clk) (true, true, cookie);#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n' );
drivers/fpga/xilinx.c +2 -2
@@ -242,7 +242,7 @@ int xilinx_info (Xilinx_desc * desc)static int xilinx_validate (Xilinx_desc * desc,char *fn) { -int ret_val = FALSE; +int ret_val = false;if (desc) { if ((desc->family > min_xilinx_type) &&
@@ -250,7 +250,7 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn)if ((desc->iface > min_xilinx_iface_type) && (desc->iface < max_xilinx_iface_type)) {if (desc->size) { - ret_val = TRUE; + ret_val = true; }else printf ("%s: NULL part size\n" , fn); }else
drivers/mtd/nand/mxc_nand.c +0 -2
@@ -29,8 +29,6 @@#define DRIVER_NAME "mxc_nand" -typedef enum {false, true}bool ; -struct mxc_nand_host {struct mtd_info mtd;struct nand_chip *nand;
drivers/net/armada100_fec.c +3 -3
@@ -100,7 +100,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg, }/* wait for the SMI register to become available */ -if (armdfec_phy_timeout (®s->smi,SMI_BUSY , FALSE)) { +if (armdfec_phy_timeout (®s->smi,SMI_BUSY , false)) {printf ("ARMD100 FEC: (%s) PHY busy timeout\n" , __func__);return -1 ; }
@@ -108,7 +108,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,writel ((phy_addr <<16 ) | (phy_reg <<21 ) |SMI_OP_R , ®s->smi);/* now wait for the data to be valid */ -if (armdfec_phy_timeout (®s->smi,SMI_R_VALID , TRUE)) { +if (armdfec_phy_timeout (®s->smi,SMI_R_VALID , true)) { val =readl (®s->smi);printf ("ARMD100 FEC: (%s) PHY Read timeout, val=0x%x\n" , __func__, val);
@@ -143,7 +143,7 @@ static int smi_reg_write(const char *devname, }/* wait for the SMI register to become available */ -if (armdfec_phy_timeout (®s->smi,SMI_BUSY , FALSE)) { +if (armdfec_phy_timeout (®s->smi,SMI_BUSY , false)) {printf ("ARMD100 FEC: (%s) PHY busy timeout\n" , __func__);return -1 ; }
drivers/net/armada100_fec.h +0 -7
@@ -29,13 +29,6 @@#ifndef __ARMADA100_FEC_H__#define __ARMADA100_FEC_H__ -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif -#define PORT_NUM 0x0/* RX & TX descriptor command */
drivers/net/e1000.c +60 -60
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drivers/net/e1000.h +25 -30
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drivers/net/npe/IxEthAccMac.c +36 -36
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drivers/net/npe/IxEthDBAPISupport.c +21 -21
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drivers/net/npe/include/IxQMgrAqmIf_p.h +11 -11
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Signature · 1 line
1.7.9.5
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PATCH v7 1/1 Consolidate bool type
Quoted 11 lines · York Sun
'bool' is defined in random places. This patch consolidates them into a single header file
include/linux/types.h, usingstdbool.hintroduced in C99.All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0.
Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php,
lib/*files.Signed-off-by York Sun <[email protected]>Acked-by Allen Martin <[email protected]>
There was a lot of talk from v1 to v6, and nothing to v7. Is everyone happy now?
Signature · 8 lines
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PATCH v7 1/1 Consolidate bool type
Quoted 8 lines · Tom Rini
Quoted 6 lines · York Sun
'bool' is defined in random places. This patch consolidates them into a single header file
include/linux/types.h, usingstdbool.hintroduced in C99.All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0.
Quoted 8 lines
Quoted 5 lines
Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php,
lib/*files.Signed-off-by York Sun <[email protected]>Acked-by Allen Martin <[email protected]>There was a lot of talk from v1 to v6, and nothing to v7. Is everyone happy now?
Changes from v6 to v7 is to remove RFC from the subject and add Acked-byL Allen. I didn't hear any nack for v7.
York