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mmc: sdhci-esdhc-imx: Fix SDIO interrupts

PATCH In review Martin Fuzzey 2 participants 2 messages Apr 15, 2013 – May 26, 2013

Subsystems (4)
Arm i.MX and Layerscape MMC, SD and SDIO Secure digital host controller interface (SDHCI) driver Secure digital host controller interface (SDHCI) NXP i.MX driver
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Martin Fuzzey

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#0 lore raw

PATCH 1/1 mmc: sdhci-esdhc-imx: Fix SDIO interrupts

Currently SDIO interrupts do not work on i.MX53 and maybe others.

This was observed with a Marvell 8787 based SDIO wifi adapter using the mwifiex driver and firmware from the Marvell git repository.
The symptom was a timeout after firmware download.

Observing the SDIO_DAT1 line showed that an interrupt was requested (level 0) but no interrupt was generated in software, the line stayed low until a timeout ocurred and the card was reset.

There is a Freescale errata
ENGcm11186 "eSDHC misses SDIO interrupt when CINT is disabled"

The workaround suggested by this errata is already implemented and involves clearing and then setting the D3CD bit in the host control register [see esdhc_writel_le()]

However, when esdhc_writeb_le() is later used to write to SDHCI_HOST_CONTROL it always resets the D3CD bit.

To fix this simply add the D3CD bit to the set of bits not modified by esdhc_writeb_le().

Signed-off-by Martin Fuzzey <[email protected]>
---
 drivers/mmc/host/sdhci-esdhc-imx.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +3 -1
index 78ac002..3c4c63d 100644
@@ -324,8 +324,10 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
 		/*
 		 * Do not touch buswidth bits here. This is done in
 		 * esdhc_pltfm_bus_width.
+		 * Do not touch the D3CD bit either which is used for the
+		 * SDIO interrupt errata workaround.
 		 */
-		mask = 0xffff & ~ESDHC_CTRL_BUSWIDTH_MASK;
+		mask = 0xffff & ~(ESDHC_CTRL_BUSWIDTH_MASK | ESDHC_CTRL_D3CD);
 
 		esdhc_clrset_le(host, mask, new_val, reg);
 		return;
#1 lore raw

Hi Martin,

Quoted 35 lines · Martin Fuzzey

Currently SDIO interrupts do not work on i.MX53 and maybe others.

This was observed with a Marvell 8787 based SDIO wifi adapter using the mwifiex driver and firmware from the Marvell git repository.
The symptom was a timeout after firmware download.

Observing the SDIO_DAT1 line showed that an interrupt was requested (level 0) but no interrupt was generated in software, the line stayed low until a timeout ocurred and the card was reset.

There is a Freescale errata
ENGcm11186 "eSDHC misses SDIO interrupt when CINT is disabled"

The workaround suggested by this errata is already implemented and involves clearing and then setting the D3CD bit in the host control register [see esdhc_writel_le()]

However, when esdhc_writeb_le() is later used to write to SDHCI_HOST_CONTROL it always resets the D3CD bit.

To fix this simply add the D3CD bit to the set of bits not modified by esdhc_writeb_le().

Signed-off-by Martin Fuzzey <[email protected]>
---
 drivers/mmc/host/sdhci-esdhc-imx.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +0 -0
index 78ac002..3c4c63d 100644
@@ -324,8 +324,10 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
 		/*

drivers/mmc/host/sdhci-esdhc-imx.c static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) · line 333

Quoted 10 lines
drivers/mmc/host/sdhci-esdhc-imx.c +3 -1
 		 * Do not touch buswidth bits here. This is done in
 		 * esdhc_pltfm_bus_width.
+		 * Do not touch the D3CD bit either which is used for the
+		 * SDIO interrupt errata workaround.
 		 */
-		mask = 0xffff & ~ESDHC_CTRL_BUSWIDTH_MASK;
+		mask = 0xffff & ~(ESDHC_CTRL_BUSWIDTH_MASK | ESDHC_CTRL_D3CD);
 
 		esdhc_clrset_le(host, mask, new_val, reg);
 		return;

I didn't see any review comments from other -imx developers -- I've applied this to mmc-next now, hopefully someone will yell if there's any reason not to.

Thanks,

- Chris.

Signature · 2 lines
Chris Ball   <[email protected]>   <http://printf.net/>
One Laptop Per Child